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Searched refs:nv_ro08 (Results 1 – 40 of 40) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Drammap.c40 *ver = nv_ro08(bios, rammap + 0); in nvbios_rammapTe()
44 *hdr = nv_ro08(bios, rammap + 1); in nvbios_rammapTe()
45 *cnt = nv_ro08(bios, rammap + 5); in nvbios_rammapTe()
46 *len = nv_ro08(bios, rammap + 2); in nvbios_rammapTe()
47 *snr = nv_ro08(bios, rammap + 4); in nvbios_rammapTe()
48 *ssz = nv_ro08(bios, rammap + 3); in nvbios_rammapTe()
87 p->rammap_10_04_02 = (nv_ro08(bios, data + 0x04) & 0x02) >> 1; in nvbios_rammapEp()
88 p->rammap_10_04_08 = (nv_ro08(bios, data + 0x04) & 0x08) >> 3; in nvbios_rammapEp()
93 p->rammap_11_08_01 = (nv_ro08(bios, data + 0x08) & 0x01) >> 0; in nvbios_rammapEp()
94 p->rammap_11_08_0c = (nv_ro08(bios, data + 0x08) & 0x0c) >> 2; in nvbios_rammapEp()
[all …]
Dtiming.c43 *ver = nv_ro08(bios, timing + 0); in nvbios_timingTe()
46 *hdr = nv_ro08(bios, timing + 1); in nvbios_timingTe()
47 *cnt = nv_ro08(bios, timing + 2); in nvbios_timingTe()
48 *len = nv_ro08(bios, timing + 3); in nvbios_timingTe()
53 *hdr = nv_ro08(bios, timing + 1); in nvbios_timingTe()
54 *cnt = nv_ro08(bios, timing + 5); in nvbios_timingTe()
55 *len = nv_ro08(bios, timing + 2); in nvbios_timingTe()
56 *snr = nv_ro08(bios, timing + 4); in nvbios_timingTe()
57 *ssz = nv_ro08(bios, timing + 3); in nvbios_timingTe()
93 p->timing_10_WR = nv_ro08(bios, data + 0x00); in nvbios_timingEp()
[all …]
Dperf.c41 *ver = nv_ro08(bios, perf + 0); in nvbios_perf_table()
42 *hdr = nv_ro08(bios, perf + 1); in nvbios_perf_table()
44 *cnt = nv_ro08(bios, perf + 5); in nvbios_perf_table()
45 *len = nv_ro08(bios, perf + 2); in nvbios_perf_table()
46 *snr = nv_ro08(bios, perf + 4); in nvbios_perf_table()
47 *ssz = nv_ro08(bios, perf + 3); in nvbios_perf_table()
51 *cnt = nv_ro08(bios, perf + 2); in nvbios_perf_table()
52 *len = nv_ro08(bios, perf + 3); in nvbios_perf_table()
53 *snr = nv_ro08(bios, perf + 4); in nvbios_perf_table()
54 *ssz = nv_ro08(bios, perf + 5); in nvbios_perf_table()
[all …]
Dvolt.c42 *ver = nv_ro08(bios, volt + 0); in nvbios_volt_table()
46 *cnt = nv_ro08(bios, volt + 2); in nvbios_volt_table()
47 *len = nv_ro08(bios, volt + 1); in nvbios_volt_table()
50 *hdr = nv_ro08(bios, volt + 1); in nvbios_volt_table()
51 *cnt = nv_ro08(bios, volt + 2); in nvbios_volt_table()
52 *len = nv_ro08(bios, volt + 3); in nvbios_volt_table()
57 *hdr = nv_ro08(bios, volt + 1); in nvbios_volt_table()
58 *cnt = nv_ro08(bios, volt + 3); in nvbios_volt_table()
59 *len = nv_ro08(bios, volt + 2); in nvbios_volt_table()
76 info->vidmask = nv_ro08(bios, volt + 0x04); in nvbios_volt_parse()
[all …]
Di2c.c46 *ver = nv_ro08(bios, i2c + 0); in dcb_i2c_table()
47 *hdr = nv_ro08(bios, i2c + 1); in dcb_i2c_table()
48 *cnt = nv_ro08(bios, i2c + 2); in dcb_i2c_table()
49 *len = nv_ro08(bios, i2c + 3); in dcb_i2c_table()
87 info->type = nv_ro08(bios, ent + 0x03); in dcb_i2c_parse()
89 info->type = nv_ro08(bios, ent + 0x03) & 0x07; in dcb_i2c_parse()
101 info->drive = nv_ro08(bios, ent + 0); in dcb_i2c_parse()
102 info->sense = nv_ro08(bios, ent + 1); in dcb_i2c_parse()
105 info->drive = nv_ro08(bios, ent + 1); in dcb_i2c_parse()
108 info->drive = nv_ro08(bios, ent + 0) & 0x0f; in dcb_i2c_parse()
[all …]
Dconn.c35 *ver = nv_ro08(bios, data + 0); in nvbios_connTe()
36 *hdr = nv_ro08(bios, data + 1); in nvbios_connTe()
37 *cnt = nv_ro08(bios, data + 2); in nvbios_connTe()
38 *len = nv_ro08(bios, data + 3); in nvbios_connTe()
80 info->type = nv_ro08(bios, data + 0x00); in nvbios_connEp()
81 info->location = nv_ro08(bios, data + 0x01) & 0x0f; in nvbios_connEp()
82 info->hpd = (nv_ro08(bios, data + 0x01) & 0x30) >> 4; in nvbios_connEp()
83 info->dp = (nv_ro08(bios, data + 0x01) & 0xc0) >> 6; in nvbios_connEp()
86 info->hpd |= (nv_ro08(bios, data + 0x02) & 0x03) << 2; in nvbios_connEp()
87 info->dp |= nv_ro08(bios, data + 0x02) & 0x0c; in nvbios_connEp()
[all …]
Ddp.c37 *ver = nv_ro08(bios, data + 0x00); in nvbios_dp_table()
43 *hdr = nv_ro08(bios, data + 0x01); in nvbios_dp_table()
44 *len = nv_ro08(bios, data + 0x02); in nvbios_dp_table()
45 *cnt = nv_ro08(bios, data + 0x03); in nvbios_dp_table()
67 *hdr = nv_ro08(bios, data + 0x04); in nvbios_dpout_entry()
68 *len = nv_ro08(bios, data + 0x05); in nvbios_dpout_entry()
69 *cnt = nv_ro08(bios, outp + 0x04); in nvbios_dpout_entry()
73 *hdr = nv_ro08(bios, data + 0x04); in nvbios_dpout_entry()
99 info->flags = nv_ro08(bios, data + 0x05); in nvbios_dpout_parse()
112 info->flags = nv_ro08(bios, data + 0x04); in nvbios_dpout_parse()
[all …]
Dpll.c89 *ver = nv_ro08(bios, data + 0); in pll_limits_table()
90 *hdr = nv_ro08(bios, data + 1); in pll_limits_table()
91 *len = nv_ro08(bios, data + 2); in pll_limits_table()
92 *cnt = nv_ro08(bios, data + 3); in pll_limits_table()
100 *ver = nv_ro08(bios, data + 0); in pll_limits_table()
150 *type = nv_ro08(bios, data + 0); in pll_map_reg()
191 if (nv_ro08(bios, data + 0) == type) { in pll_map_type()
302 info->vco1.min_n = nv_ro08(bios, data + 20); in nvbios_pll_parse()
303 info->vco1.max_n = nv_ro08(bios, data + 21); in nvbios_pll_parse()
304 info->vco1.min_m = nv_ro08(bios, data + 22); in nvbios_pll_parse()
[all …]
Dxpio.c35 *ver = nv_ro08(bios, data + 0x00); in dcb_xpiod_table()
36 *hdr = nv_ro08(bios, data + 0x01); in dcb_xpiod_table()
37 *cnt = nv_ro08(bios, data + 0x02); in dcb_xpiod_table()
38 *len = nv_ro08(bios, data + 0x03); in dcb_xpiod_table()
53 *ver = nv_ro08(bios, data + 0x00); in dcb_xpio_table()
54 *hdr = nv_ro08(bios, data + 0x01); in dcb_xpio_table()
55 *cnt = nv_ro08(bios, data + 0x02); in dcb_xpio_table()
56 *len = nv_ro08(bios, data + 0x03); in dcb_xpio_table()
69 info->type = nv_ro08(bios, data + 0x04); in dcb_xpio_parse()
70 info->addr = nv_ro08(bios, data + 0x05); in dcb_xpio_parse()
[all …]
Dinit.c459 return nv_ro08(bios, data + offset); in init_xlat_()
492 u8 index = nv_ro08(bios, table + (cond * 5) + 2); in init_io_condition_met()
493 u8 mask = nv_ro08(bios, table + (cond * 5) + 3); in init_io_condition_met()
494 u8 value = nv_ro08(bios, table + (cond * 5) + 4); in init_io_condition_met()
509 u8 index = nv_ro08(bios, table + (cond * 9) + 2); in init_io_flag_condition_met()
510 u8 mask = nv_ro08(bios, table + (cond * 9) + 3); in init_io_flag_condition_met()
511 u8 shift = nv_ro08(bios, table + (cond * 9) + 4); in init_io_flag_condition_met()
513 u8 dmask = nv_ro08(bios, table + (cond * 9) + 7); in init_io_flag_condition_met()
514 u8 value = nv_ro08(bios, table + (cond * 9) + 8); in init_io_flag_condition_met()
516 return (nv_ro08(bios, data + ioval) & dmask) == value; in init_io_flag_condition_met()
[all …]
Dcstep.c40 *ver = nv_ro08(bios, cstep + 0); in nvbios_cstepTe()
43 *hdr = nv_ro08(bios, cstep + 1); in nvbios_cstepTe()
44 *cnt = nv_ro08(bios, cstep + 3); in nvbios_cstepTe()
45 *len = nv_ro08(bios, cstep + 2); in nvbios_cstepTe()
46 *xnr = nv_ro08(bios, cstep + 5); in nvbios_cstepTe()
47 *xsz = nv_ro08(bios, cstep + 4); in nvbios_cstepTe()
79 info->index = nv_ro08(bios, data + 0x03); in nvbios_cstepEp()
117 info->unkn[0] = nv_ro08(bios, data + 0x02); in nvbios_cstepXp()
118 info->unkn[1] = nv_ro08(bios, data + 0x03); in nvbios_cstepXp()
119 info->voltage = nv_ro08(bios, data + 0x04); in nvbios_cstepXp()
DM0209.c39 *ver = nv_ro08(bios, data + 0x00); in nvbios_M0209Te()
42 *hdr = nv_ro08(bios, data + 0x01); in nvbios_M0209Te()
43 *len = nv_ro08(bios, data + 0x02); in nvbios_M0209Te()
44 *ssz = nv_ro08(bios, data + 0x03); in nvbios_M0209Te()
46 *cnt = nv_ro08(bios, data + 0x04); in nvbios_M0209Te()
81 info->v00_40 = (nv_ro08(bios, data + 0x00) & 0x40) >> 6; in nvbios_M0209Ep()
82 info->bits = nv_ro08(bios, data + 0x00) & 0x3f; in nvbios_M0209Ep()
83 info->modulo = nv_ro08(bios, data + 0x01); in nvbios_M0209Ep()
84 info->v02_40 = (nv_ro08(bios, data + 0x02) & 0x40) >> 6; in nvbios_M0209Ep()
85 info->v02_07 = nv_ro08(bios, data + 0x02) & 0x07; in nvbios_M0209Ep()
[all …]
Dmxm.c81 ver = nv_ro08(bios, map); in mxm_sor_map()
83 if (conn < nv_ro08(bios, map + 3)) { in mxm_sor_map()
84 map += nv_ro08(bios, map + 1); in mxm_sor_map()
86 return nv_ro08(bios, map); in mxm_sor_map()
117 ver = nv_ro08(bios, map); in mxm_ddc_map()
119 if (port < nv_ro08(bios, map + 3)) { in mxm_ddc_map()
120 map += nv_ro08(bios, map + 1); in mxm_ddc_map()
122 return nv_ro08(bios, map); in mxm_ddc_map()
Dfan.c39 *ver = nv_ro08(bios, fan + 0); in nvbios_fan_table()
42 *hdr = nv_ro08(bios, fan + 1); in nvbios_fan_table()
43 *len = nv_ro08(bios, fan + 2); in nvbios_fan_table()
44 *cnt = nv_ro08(bios, fan + 3); in nvbios_fan_table()
72 u8 type = nv_ro08(bios, data + 0x00); in nvbios_fan_parse()
86 fan->min_duty = nv_ro08(bios, data + 0x02); in nvbios_fan_parse()
87 fan->max_duty = nv_ro08(bios, data + 0x03); in nvbios_fan_parse()
Dtherm.c51 *ver = nv_ro08(bios, therm + 0); in therm_table()
52 *hdr = nv_ro08(bios, therm + 1); in therm_table()
53 *len = nv_ro08(bios, therm + 2); in therm_table()
54 *cnt = nv_ro08(bios, therm + 3); in therm_table()
55 return therm + nv_ro08(bios, therm + 1); in therm_table()
88 switch (nv_ro08(bios, entry + 0)) { in nvbios_therm_sensor_parse()
97 offset = ((s8) nv_ro08(bios, entry + 2)) / 2; in nvbios_therm_sensor_parse()
170 switch (nv_ro08(bios, entry + 0)) { in nvbios_therm_fan_parse()
201 fan->linear_min_temp = nv_ro08(bios, entry + 1); in nvbios_therm_fan_parse()
202 fan->linear_max_temp = nv_ro08(bios, entry + 2); in nvbios_therm_fan_parse()
Dextdev.c42 *ver = nv_ro08(bios, extdev + 0); in extdev_table()
43 *hdr = nv_ro08(bios, extdev + 1); in extdev_table()
44 *cnt = nv_ro08(bios, extdev + 2); in extdev_table()
45 *len = nv_ro08(bios, extdev + 3); in extdev_table()
63 entry->type = nv_ro08(bios, offset + 0); in extdev_parse_entry()
64 entry->addr = nv_ro08(bios, offset + 1); in extdev_parse_entry()
65 entry->bus = (nv_ro08(bios, offset + 2) >> 4) & 1; in extdev_parse_entry()
Dgpio.c38 if (*ver >= 0x22 && nv_ro08(bios, dcb - 1) >= 0x13) in dcb_gpio_table()
42 *ver = nv_ro08(bios, data + 0x00); in dcb_gpio_table()
45 *cnt = nv_ro08(bios, data + 0x02); in dcb_gpio_table()
46 *len = nv_ro08(bios, data + 0x01); in dcb_gpio_table()
49 *hdr = nv_ro08(bios, data + 0x01); in dcb_gpio_table()
50 *cnt = nv_ro08(bios, data + 0x02); in dcb_gpio_table()
51 *len = nv_ro08(bios, data + 0x03); in dcb_gpio_table()
134 u8 conf = nv_ro08(bios, data - 5); in dcb_gpio_match()
135 u8 addr = nv_ro08(bios, data - 4); in dcb_gpio_match()
DM0203.c38 *ver = nv_ro08(bios, data + 0x00); in nvbios_M0203Te()
41 *hdr = nv_ro08(bios, data + 0x01); in nvbios_M0203Te()
42 *len = nv_ro08(bios, data + 0x02); in nvbios_M0203Te()
43 *cnt = nv_ro08(bios, data + 0x03); in nvbios_M0203Te()
62 info->type = nv_ro08(bios, data + 0x04); in nvbios_M0203Tp()
92 info->type = (nv_ro08(bios, data + 0x00) & 0x0f) >> 0; in nvbios_M0203Ep()
93 info->strap = (nv_ro08(bios, data + 0x00) & 0xf0) >> 4; in nvbios_M0203Ep()
94 info->group = (nv_ro08(bios, data + 0x01) & 0x0f) >> 0; in nvbios_M0203Ep()
Dbit.c31 u8 entries = nv_ro08(bios, bios->bit_offset + 10); in bit_entry()
34 if (nv_ro08(bios, entry + 0) == id) { in bit_entry()
35 bit->id = nv_ro08(bios, entry + 0); in bit_entry()
36 bit->version = nv_ro08(bios, entry + 1); in bit_entry()
42 entry += nv_ro08(bios, bios->bit_offset + 9); in bit_entry()
Dpcir.c38 *ver = nv_ro08(bios, data + 0x0c); in nvbios_pcirTe()
59 info->class_code[0] = nv_ro08(bios, data + 0x0d); in nvbios_pcirTp()
60 info->class_code[1] = nv_ro08(bios, data + 0x0e); in nvbios_pcirTp()
61 info->class_code[2] = nv_ro08(bios, data + 0x0f); in nvbios_pcirTp()
64 info->image_type = nv_ro08(bios, data + 0x14); in nvbios_pcirTp()
65 info->last = nv_ro08(bios, data + 0x15) & 0x80; in nvbios_pcirTp()
DM0205.c39 *ver = nv_ro08(bios, data + 0x00); in nvbios_M0205Te()
42 *hdr = nv_ro08(bios, data + 0x01); in nvbios_M0205Te()
43 *len = nv_ro08(bios, data + 0x02); in nvbios_M0205Te()
44 *ssz = nv_ro08(bios, data + 0x03); in nvbios_M0205Te()
45 *snr = nv_ro08(bios, data + 0x04); in nvbios_M0205Te()
46 *cnt = nv_ro08(bios, data + 0x05); in nvbios_M0205Te()
99 info->type = nv_ro08(bios, data + 0x00) & 0x0f; in nvbios_M0205Ep()
129 info->data = nv_ro08(bios, data + 0x00); in nvbios_M0205Sp()
Dboost.c40 *ver = nv_ro08(bios, boost + 0); in nvbios_boostTe()
43 *hdr = nv_ro08(bios, boost + 1); in nvbios_boostTe()
44 *cnt = nv_ro08(bios, boost + 5); in nvbios_boostTe()
45 *len = nv_ro08(bios, boost + 2); in nvbios_boostTe()
46 *snr = nv_ro08(bios, boost + 4); in nvbios_boostTe()
47 *ssz = nv_ro08(bios, boost + 3); in nvbios_boostTe()
120 info->domain = nv_ro08(bios, data + 0x00); in nvbios_boostSp()
121 info->percent = nv_ro08(bios, data + 0x01); in nvbios_boostSp()
Dbase.c149 bios->version.major = nv_ro08(bios, bit_i.offset + 3); in nvkm_bios_ctor()
150 bios->version.chip = nv_ro08(bios, bit_i.offset + 2); in nvkm_bios_ctor()
151 bios->version.minor = nv_ro08(bios, bit_i.offset + 1); in nvkm_bios_ctor()
152 bios->version.micro = nv_ro08(bios, bit_i.offset + 0); in nvkm_bios_ctor()
153 bios->version.patch = nv_ro08(bios, bit_i.offset + 4); in nvkm_bios_ctor()
156 bios->version.major = nv_ro08(bios, bios->bmp_offset + 13); in nvkm_bios_ctor()
157 bios->version.chip = nv_ro08(bios, bios->bmp_offset + 12); in nvkm_bios_ctor()
158 bios->version.minor = nv_ro08(bios, bios->bmp_offset + 11); in nvkm_bios_ctor()
159 bios->version.micro = nv_ro08(bios, bios->bmp_offset + 10); in nvkm_bios_ctor()
Dvmap.c38 *ver = nv_ro08(bios, vmap + 0); in nvbios_vmap_table()
42 *hdr = nv_ro08(bios, vmap + 1); in nvbios_vmap_table()
43 *cnt = nv_ro08(bios, vmap + 3); in nvbios_vmap_table()
44 *len = nv_ro08(bios, vmap + 2); in nvbios_vmap_table()
98 info->unk0 = nv_ro08(bios, vmap + 0x00); in nvbios_vmap_entry_parse()
99 info->link = nv_ro08(bios, vmap + 0x01); in nvbios_vmap_entry_parse()
Ddcb.c42 *ver = nv_ro08(bios, dcb); in dcb_table()
50 *hdr = nv_ro08(bios, dcb + 1); in dcb_table()
51 *cnt = nv_ro08(bios, dcb + 2); in dcb_table()
52 *len = nv_ro08(bios, dcb + 3); in dcb_table()
223 if (nv_ro08(bios, outp) == DCB_OUTPUT_UNUSED) in dcb_outp_foreach()
225 if (nv_ro08(bios, outp) == DCB_OUTPUT_EOL) in dcb_outp_foreach()
Dpmu.c54 *ver = nv_ro08(bios, data + 0x00); /* maybe? */ in nvbios_pmuTe()
55 *hdr = nv_ro08(bios, data + 0x01); in nvbios_pmuTe()
56 *len = nv_ro08(bios, data + 0x02); in nvbios_pmuTe()
57 *cnt = nv_ro08(bios, data + 0x03); in nvbios_pmuTe()
98 info->type = nv_ro08(bios, data + 0x00); in nvbios_pmuEp()
Ddisp.c38 *ver = nv_ro08(bios, data + 0x00); in nvbios_disp_table()
43 *hdr = nv_ro08(bios, data + 0x01); in nvbios_disp_table()
44 *len = nv_ro08(bios, data + 0x02); in nvbios_disp_table()
45 *cnt = nv_ro08(bios, data + 0x03); in nvbios_disp_table()
46 *sub = nv_ro08(bios, data + 0x04); in nvbios_disp_table()
88 *cnt = nv_ro08(bios, info.data + 0x05); in nvbios_outp_entry()
DP0260.c39 *ver = nv_ro08(bios, data + 0); in nvbios_P0260Te()
42 *hdr = nv_ro08(bios, data + 1); in nvbios_P0260Te()
43 *cnt = nv_ro08(bios, data + 2); in nvbios_P0260Te()
45 *xnr = nv_ro08(bios, data + 3); in nvbios_P0260Te()
Dramcfg.c42 return nv_ro08(bios, bit_M.offset + 2); in nvbios_ramcfg_count()
44 return nv_ro08(bios, bit_M.offset + 0); in nvbios_ramcfg_count()
76 strap = nv_ro08(bios, xlat + strap); in nvbios_ramcfg_index()
Dnpde.c55 info->last = nv_ro08(bios, data + 0x0a) & 0x80; in nvbios_npdeTp()
/linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
Dbmp.h7 return nv_ro08(bios, bios->bmp_offset + 5) << 8 | in bmp_version()
8 nv_ro08(bios, bios->bmp_offset + 6); in bmp_version()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
Dnv05.c64 ramcfg[0] = nv_ro08(bios, data + 2 * strap + 0); in nv05_devinit_meminit()
65 ramcfg[1] = nv_ro08(bios, data + 2 * strap + 1); in nv05_devinit_meminit()
/linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/core/
Dobject.h138 nv_ro08(void *obj, u64 addr) in nv_ro08() function
196 c1 = nv_ro08(obj, addr++); in nv_memcmp()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/
Dbase.c243 if (!data || !(ver = nv_ro08(bios, data))) { in nvkm_mxm_create_()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Ddport.c76 while ((dp->link_bw / 27000) < nv_ro08(bios, lnkcmp)) in dp_set_link_config()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramnv50.c98 strap = nv_ro08(bios, ramcfg.data + 0x01); in nv50_ram_calc()
Dramgf100.c166 strap = nv_ro08(bios, ramcfg.data + 0x01); in gf100_ram_calc()
Dramgk104.c1337 cnt = nv_ro08(bios, data + 0x14); /* guess at count */ in gk104_ram_init()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/core/
Dioctl.c240 args->v0.data = nv_ro08(object, args->v0.addr); in nvkm_ioctl_rd()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/
Dbase.c180 u8 auxidx = nv_ro08(bios, i2c + 4); in nvkm_i2c_find()