Searched refs:modesIndex (Results 1 - 5 of 5) sorted by relevance

/linux-4.1.27/drivers/net/wireless/ath/ath9k/
H A Dar9003_phy.c885 u32 modesIndex; ar9003_hw_process_ini() local
888 modesIndex = IS_CHAN_HT40(chan) ? 2 : 1; ar9003_hw_process_ini()
890 modesIndex = IS_CHAN_HT40(chan) ? 3 : 4; ar9003_hw_process_ini()
896 ar9003_hw_prog_ini(ah, &ah->iniSOC[i], modesIndex); ar9003_hw_process_ini()
897 ar9003_hw_prog_ini(ah, &ah->iniMac[i], modesIndex); ar9003_hw_process_ini()
898 ar9003_hw_prog_ini(ah, &ah->iniBB[i], modesIndex); ar9003_hw_process_ini()
899 ar9003_hw_prog_ini(ah, &ah->iniRadio[i], modesIndex); ar9003_hw_process_ini()
903 modesIndex); ar9003_hw_process_ini()
921 modesIndex, regWrites); ar9003_hw_process_ini()
930 modesIndex, regWrites); ar9003_hw_process_ini()
935 modesIndex, regWrites); ar9003_hw_process_ini()
939 REG_WRITE_ARRAY(&ah->ini_modes_rx_gain_bounds, modesIndex, ar9003_hw_process_ini()
961 REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites); ar9003_hw_process_ini()
970 modesIndex, regWrites); ar9003_hw_process_ini()
983 ah->modes_index = modesIndex; ar9003_hw_process_ini()
1694 u32 modesIndex, txgain_index; ar9003_hw_fast_chan_change() local
1697 modesIndex = IS_CHAN_HT40(chan) ? 2 : 1; ar9003_hw_fast_chan_change()
1699 modesIndex = IS_CHAN_HT40(chan) ? 3 : 4; ar9003_hw_fast_chan_change()
1701 txgain_index = AR_SREV_9531(ah) ? 1 : modesIndex; ar9003_hw_fast_chan_change()
1703 if (modesIndex == ah->modes_index) { ar9003_hw_fast_chan_change()
1708 ar9003_hw_prog_ini(ah, &ah->iniSOC[ATH_INI_POST], modesIndex); ar9003_hw_fast_chan_change()
1709 ar9003_hw_prog_ini(ah, &ah->iniMac[ATH_INI_POST], modesIndex); ar9003_hw_fast_chan_change()
1710 ar9003_hw_prog_ini(ah, &ah->iniBB[ATH_INI_POST], modesIndex); ar9003_hw_fast_chan_change()
1711 ar9003_hw_prog_ini(ah, &ah->iniRadio[ATH_INI_POST], modesIndex); ar9003_hw_fast_chan_change()
1715 modesIndex); ar9003_hw_fast_chan_change()
1727 modesIndex, regWrites); ar9003_hw_fast_chan_change()
1736 REG_WRITE_ARRAY(&ah->iniModesFastClock, modesIndex, regWrites); ar9003_hw_fast_chan_change()
1747 ah->modes_index = modesIndex; ar9003_hw_fast_chan_change()
H A Dar9002_hw.c430 u32 modesIndex; ar9002_hw_load_ani_reg() local
434 modesIndex = IS_CHAN_HT40(chan) ? 2 : 1; ar9002_hw_load_ani_reg()
436 modesIndex = IS_CHAN_HT40(chan) ? 3 : 4; ar9002_hw_load_ani_reg()
442 u32 val = INI_RA(&ah->iniModes_9271_ANI_reg, i, modesIndex); ar9002_hw_load_ani_reg()
H A Dar5008_phy.c494 * @modesIndex:
504 u16 modesIndex) ar5008_hw_set_rf_regs()
524 ah->analogBank6Data[i] = INI_RA(&ah->iniBank6, i, modesIndex); ar5008_hw_set_rf_regs()
549 REG_WRITE_ARRAY(&bank3, modesIndex, regWrites); ar5008_hw_set_rf_regs()
703 u32 modesIndex, freqIndex; ar5008_hw_process_ini() local
707 modesIndex = IS_CHAN_HT40(chan) ? 2 : 1; ar5008_hw_process_ini()
710 modesIndex = IS_CHAN_HT40(chan) ? 3 : 4; ar5008_hw_process_ini()
731 u32 val = INI_RA(&ah->iniModes, i, modesIndex); ar5008_hw_process_ini()
750 REG_WRITE_ARRAY(&ah->iniModesRxGain, modesIndex, regWrites); ar5008_hw_process_ini()
754 REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites); ar5008_hw_process_ini()
784 REG_WRITE_ARRAY(&ah->iniModesFastClock, modesIndex, ar5008_hw_process_ini()
502 ar5008_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan, u16 modesIndex) ar5008_hw_set_rf_regs() argument
H A Dhw-ops.h154 u16 modesIndex) ath9k_hw_set_rf_regs()
159 return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex); ath9k_hw_set_rf_regs()
152 ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan, u16 modesIndex) ath9k_hw_set_rf_regs() argument
H A Dhw.h646 u16 modesIndex);

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