Searched refs:mode0 (Results 1 - 21 of 21) sorted by relevance

/linux-4.1.27/arch/sh/include/mach-common/mach/
H A Dsdk7780.h46 #define FPGA_INTT0PRTR (PA_FPGA + 0x040) /* Interrupt test mode0 port */
47 #define FPGA_INTT0SELR (PA_FPGA + 0x050) /* Int. test mode0 select */
48 #define FPGA_INTT1POLR (PA_FPGA + 0x060) /* Int. test mode0 polarity */
/linux-4.1.27/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-util.c307 pko_mode.s.mode0 = 4; __cvmx_helper_setup_gmx()
309 pko_mode.s.mode0 = 3; __cvmx_helper_setup_gmx()
311 pko_mode.s.mode0 = 2; __cvmx_helper_setup_gmx()
313 pko_mode.s.mode0 = 1; __cvmx_helper_setup_gmx()
315 pko_mode.s.mode0 = 0; __cvmx_helper_setup_gmx()
/linux-4.1.27/drivers/gpu/drm/radeon/
H A Drv515.c1112 struct drm_display_mode *mode0, rv515_compute_mode_priority()
1123 if (mode0 && mode1) { rv515_compute_mode_priority()
1176 } else if (mode0) { rv515_compute_mode_priority()
1235 struct drm_display_mode *mode0 = NULL; rv515_bandwidth_avivo_update() local
1244 mode0 = &rdev->mode_info.crtcs[0]->base.mode; rv515_bandwidth_avivo_update()
1247 rs690_line_buffer_adjust(rdev, mode0, mode1); rv515_bandwidth_avivo_update()
1261 mode0, mode1, rv515_bandwidth_avivo_update()
1265 mode0, mode1, rv515_bandwidth_avivo_update()
1277 struct drm_display_mode *mode0 = NULL; rv515_bandwidth_update() local
1286 mode0 = &rdev->mode_info.crtcs[0]->base.mode; rv515_bandwidth_update()
1301 if (mode0) rv515_bandwidth_update()
1109 rv515_compute_mode_priority(struct radeon_device *rdev, struct rv515_watermark *wm0, struct rv515_watermark *wm1, struct drm_display_mode *mode0, struct drm_display_mode *mode1, u32 *d1mode_priority_a_cnt, u32 *d2mode_priority_a_cnt) rv515_compute_mode_priority() argument
H A Drs690.c452 struct drm_display_mode *mode0, rs690_compute_mode_priority()
463 if (mode0 && mode1) { rs690_compute_mode_priority()
516 } else if (mode0) { rs690_compute_mode_priority()
575 struct drm_display_mode *mode0 = NULL; rs690_bandwidth_update() local
589 mode0 = &rdev->mode_info.crtcs[0]->base.mode; rs690_bandwidth_update()
602 if (mode0) rs690_bandwidth_update()
608 rs690_line_buffer_adjust(rdev, mode0, mode1); rs690_bandwidth_update()
627 mode0, mode1, rs690_bandwidth_update()
631 mode0, mode1, rs690_bandwidth_update()
449 rs690_compute_mode_priority(struct radeon_device *rdev, struct rs690_watermark *wm0, struct rs690_watermark *wm1, struct drm_display_mode *mode0, struct drm_display_mode *mode1, u32 *d1mode_priority_a_cnt, u32 *d2mode_priority_a_cnt) rs690_compute_mode_priority() argument
H A Drs600.c886 struct drm_display_mode *mode0 = NULL; rs600_bandwidth_update() local
897 mode0 = &rdev->mode_info.crtcs[0]->base.mode; rs600_bandwidth_update()
901 rs690_line_buffer_adjust(rdev, mode0, mode1); rs600_bandwidth_update()
H A Devergreen.c2372 struct drm_display_mode *mode0 = NULL; evergreen_bandwidth_update() local
2387 mode0 = &rdev->mode_info.crtcs[i]->base.mode; evergreen_bandwidth_update()
2389 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); evergreen_bandwidth_update()
2391 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); evergreen_bandwidth_update()
H A Dsi.c2413 struct drm_display_mode *mode0 = NULL; dce6_bandwidth_update() local
2428 mode0 = &rdev->mode_info.crtcs[i]->base.mode; dce6_bandwidth_update()
2430 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); dce6_bandwidth_update()
2432 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); dce6_bandwidth_update()
/linux-4.1.27/drivers/block/
H A Dswim.c231 swim_write(base, mode0, 0xf8); set_swim_mode()
314 swim_write(base, mode0, EXTERNAL_DRIVE); /* clear drive 1 bit */ swim_drive()
317 swim_write(base, mode0, INTERNAL_DRIVE); /* clear drive 0 bit */ swim_drive()
473 swim_write(base, mode0, side); swim_read_sector()
487 swim_write(base, mode0, MOTON); swim_read_sector()
/linux-4.1.27/drivers/video/fbdev/
H A Dauo_k1900fb.c22 * mode0+1 16 step gray (4bit)
H A Dauo_k1901fb.c22 * mode0+1 16 step gray (4bit)
/linux-4.1.27/arch/arm/mach-omap2/
H A Dmux34xx.h12 #define OMAP3_MUX(mode0, mux_value) \
14 .reg_offset = (OMAP3_CONTROL_PADCONF_##mode0##_OFFSET), \
H A Dserial.c155 * Check if uart is used in default tx/rx mode i.e. in mux mode0 omap_serial_check_wakeup()
H A Dmux.c185 /* First check for full name in mode0.muxmode format */ list_for_each_entry()
586 /* REVISIT: Needs to be updated if mode0 names get longer */ omap_mux_dbg_board_show()
/linux-4.1.27/drivers/ide/
H A Dtrm290.c117 * Suggested CDR programming for PIO mode0 (600ns):
H A Dcmd640.c76 * defaults all drives to PIO mode0, prefetch off.
/linux-4.1.27/drivers/staging/sm750fb/
H A Dddk750_chip.c231 /* for 750,always use power mode0*/ ddk750_getVMSize()
/linux-4.1.27/drivers/media/rc/
H A Dwinbond-cir.c773 match[4] = 0x50; /* mode1 = mode0 = 0, ignore toggle */ wbcir_shutdown()
817 match[i] = 0x93; /* mode1 = mode0 = 1, submode = 0 */ wbcir_shutdown()
/linux-4.1.27/drivers/net/wireless/rt2x00/
H A Drt2500usb.h143 * MAC_CSR13: Power mode0.
/linux-4.1.27/arch/mips/include/asm/octeon/
H A Dcvmx-pko-defs.h2447 uint64_t mode0:3; member in struct:cvmx_pko_reg_gmx_port_mode::cvmx_pko_reg_gmx_port_mode_s
2449 uint64_t mode0:3;
/linux-4.1.27/drivers/media/i2c/
H A Dsaa717x.c934 /* saa717x have mode0-mode9 but mode5 is reserved. */ saa717x_s_video_routing()
/linux-4.1.27/drivers/media/usb/gspca/
H A Dzc3xx.c3207 * if mode0 (640x480) */
3226 * if mode0 (640x480) */

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