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Searched refs:max_ref_div (Results 1 – 3 of 3) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
Dradeon_clocks.c300 dcpll->max_ref_div = 0x3ff; in radeon_get_clock_info()
306 p1pll->max_ref_div = 0x3ff; in radeon_get_clock_info()
312 p2pll->max_ref_div = 0x3ff; in radeon_get_clock_info()
321 spll->max_ref_div = 0xff; in radeon_get_clock_info()
330 mpll->max_ref_div = 0xff; in radeon_get_clock_info()
Dradeon_display.c965 ref_div_max = min(pll->max_ref_div, 7u); in radeon_compute_pll_avivo()
967 ref_div_max = pll->max_ref_div; in radeon_compute_pll_avivo()
1090 uint32_t max_ref_div = pll->max_ref_div; in radeon_compute_pll_legacy() local
1106 DRM_DEBUG_KMS("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); in radeon_compute_pll_legacy()
1121 min_ref_div = max_ref_div = pll->reference_div; in radeon_compute_pll_legacy()
1123 while (min_ref_div < max_ref_div-1) { in radeon_compute_pll_legacy()
1124 uint32_t mid = (min_ref_div + max_ref_div) / 2; in radeon_compute_pll_legacy()
1127 max_ref_div = mid; in radeon_compute_pll_legacy()
1162 for (ref_div = min_ref_div; ref_div <= max_ref_div; ++ref_div) { in radeon_compute_pll_legacy()
Dradeon_mode.h184 uint32_t max_ref_div; member