Searched refs:mask_low (Results 1 – 8 of 8) sorted by relevance
179 u8 mask_low; member816 val = (1 << number) & st->mask_low; in max1363_read_event_config()846 if ((st->mask_low | st->mask_high) & 0x0F) { in max1363_monitor_mode_update()849 } else if ((st->mask_low | st->mask_high) & 0x30) { in max1363_monitor_mode_update()874 if (st->mask_low & (1 << j)) { in max1363_monitor_mode_update()967 unifiedmask = st->mask_low | st->mask_high; in max1363_write_event_config()971 st->mask_low &= ~(1 << number); in max1363_write_event_config()977 st->mask_low |= (1 << number); in max1363_write_event_config()991 max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low)); in max1363_write_event_config()
733 u32 mask_low; in calculate_ecc() local742 mask_low = ecc_table[i * 2 + 1]; in calculate_ecc()748 if ((mask_low >> j) & 1) in calculate_ecc()
684 u32 mask_low; member
3840 data = table->mask_low; in si_validate_phase_shedding_tables()3884 voltage_table->mask_low = 0; in si_get_svi2_voltage_table()4005 cpu_to_be32(eg_pi->vddc_voltage_table.mask_low); in si_populate_smc_voltage_tables()4019 cpu_to_be32(eg_pi->vddci_voltage_table.mask_low); in si_populate_smc_voltage_tables()4027 cpu_to_be32(si_pi->mvdd_voltage_table.mask_low); in si_populate_smc_voltage_tables()4036 cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low); in si_populate_smc_voltage_tables()
1537 cpu_to_be32(eg_pi->vddc_voltage_table.mask_low); in cypress_populate_smc_voltage_tables()1555 cpu_to_be32(eg_pi->vddci_voltage_table.mask_low); in cypress_populate_smc_voltage_tables()
1280 cpu_to_be32(eg_pi->vddc_voltage_table.mask_low); in ni_populate_smc_voltage_tables()1295 cpu_to_be32(eg_pi->vddci_voltage_table.mask_low); in ni_populate_smc_voltage_tables()
3749 &voltage_table->mask_low); in radeon_atom_get_voltage_table()3785 voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal); in radeon_atom_get_voltage_table()
2092 voltage_table->mask_low = 0; in ci_get_svi2_voltage_table()