Searched refs:line_control (Results 1 – 4 of 4) sorted by relevance
146 u8 line_control; member270 priv->line_control = MCR_CONTROL_LINE_DTR in spcp8x5_dtr_rts()273 priv->line_control &= ~ (MCR_CONTROL_LINE_DTR in spcp8x5_dtr_rts()275 control = priv->line_control; in spcp8x5_dtr_rts()307 control = priv->line_control; in spcp8x5_set_termios()309 priv->line_control |= MCR_DTR; in spcp8x5_set_termios()311 priv->line_control |= MCR_RTS; in spcp8x5_set_termios()313 if (control != priv->line_control) { in spcp8x5_set_termios()314 control = priv->line_control; in spcp8x5_set_termios()407 spcp8x5_set_ctrl_line(port, priv->line_control); in spcp8x5_open()[all …]
83 u8 line_control; /* set line control value RTS/DTR */ member234 r = ch341_set_handshake(dev, priv->line_control); in ch341_configure()256 priv->line_control = CH341_BIT_RTS | CH341_BIT_DTR; in ch341_port_probe()295 priv->line_control |= CH341_BIT_RTS | CH341_BIT_DTR; in ch341_dtr_rts()297 priv->line_control &= ~(CH341_BIT_RTS | CH341_BIT_DTR); in ch341_dtr_rts()299 ch341_set_handshake(port->serial->dev, priv->line_control); in ch341_dtr_rts()352 priv->line_control |= (CH341_BIT_DTR | CH341_BIT_RTS); in ch341_set_termios()357 priv->line_control &= ~(CH341_BIT_DTR | CH341_BIT_RTS); in ch341_set_termios()361 ch341_set_handshake(port->serial->dev, priv->line_control); in ch341_set_termios()423 priv->line_control |= CH341_BIT_RTS; in ch341_tiocmset()[all …]
154 u8 line_control; member589 control = priv->line_control; in pl2303_set_termios()591 priv->line_control &= ~(CONTROL_DTR | CONTROL_RTS); in pl2303_set_termios()593 priv->line_control |= (CONTROL_DTR | CONTROL_RTS); in pl2303_set_termios()594 if (control != priv->line_control) { in pl2303_set_termios()595 control = priv->line_control; in pl2303_set_termios()622 priv->line_control |= (CONTROL_DTR | CONTROL_RTS); in pl2303_dtr_rts()624 priv->line_control &= ~(CONTROL_DTR | CONTROL_RTS); in pl2303_dtr_rts()625 control = priv->line_control; in pl2303_dtr_rts()684 priv->line_control |= CONTROL_RTS; in pl2303_tiocmset()[all …]
106 __u8 line_control; /* holds dtr / rts value */ member473 priv->line_control = 0; in cypress_generic_port_probe()637 priv->line_control = 0; in cypress_dtr_rts()639 priv->line_control = CONTROL_DTR | CONTROL_RTS; in cypress_dtr_rts()722 port->interrupt_out_buffer[0] = priv->line_control; in cypress_send()727 port->interrupt_out_buffer[0] = priv->line_control; in cypress_send()731 if (priv->line_control & CONTROL_RESET) in cypress_send()732 priv->line_control &= ~CONTROL_RESET; in cypress_send()825 control = priv->line_control; in cypress_tiocmget()851 priv->line_control |= CONTROL_RTS; in cypress_tiocmset()[all …]