Searched refs:jz4740_timer_base (Results 1 – 2 of 2) sorted by relevance
| /linux-4.1.27/arch/mips/include/asm/mach-jz4740/ |
| D | timer.h | 58 extern void __iomem *jz4740_timer_base;
66 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET); in jz4740_timer_stop()
71 writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR); in jz4740_timer_start()
76 return readb(jz4740_timer_base + JZ_REG_TIMER_ENABLE) & BIT(timer); in jz4740_timer_is_enabled()
81 writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET); in jz4740_timer_enable()
86 writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR); in jz4740_timer_disable()
91 writew(period, jz4740_timer_base + JZ_REG_TIMER_DFR(timer)); in jz4740_timer_set_period()
96 writew(duty, jz4740_timer_base + JZ_REG_TIMER_DHR(timer)); in jz4740_timer_set_duty()
101 writew(count, jz4740_timer_base + JZ_REG_TIMER_CNT(timer)); in jz4740_timer_set_count()
106 return readw(jz4740_timer_base + JZ_REG_TIMER_CNT(timer)); in jz4740_timer_get_count()
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| /linux-4.1.27/arch/mips/jz4740/ |
| D | timer.c | 23 void __iomem *jz4740_timer_base; variable
24 EXPORT_SYMBOL_GPL(jz4740_timer_base);
28 writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR); in jz4740_timer_enable_watchdog()
34 writel(BIT(16), jz4740_timer_base + JZ_REG_TIMER_STOP_SET); in jz4740_timer_disable_watchdog()
40 jz4740_timer_base = ioremap(JZ4740_TCU_BASE_ADDR, 0x100); in jz4740_timer_init()
42 if (!jz4740_timer_base) in jz4740_timer_init()
46 writel(0x000100fc, jz4740_timer_base + JZ_REG_TIMER_STOP_SET); in jz4740_timer_init()
49 writel(0x00ff00ff, jz4740_timer_base + JZ_REG_TIMER_MASK_SET); in jz4740_timer_init()
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