Searched refs:input_clock (Results 1 – 16 of 16) sorted by relevance
171 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()246 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()276 chip->input_clock = clock; in set_input_clock()293 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()297 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
261 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()267 set_input_clock(chip, chip->input_clock); in set_sample_rate()339 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()369 chip->input_clock = clock; in set_input_clock()385 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()389 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
166 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()261 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()289 chip->input_clock = clock; in set_input_clock()341 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()346 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
203 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()315 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()358 chip->input_clock = clock; in set_input_clock()374 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()378 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
166 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()212 chip->input_clock = clock_source; in set_input_clock()214 chip->comm_page->input_clock = cpu_to_le16(clock); in set_input_clock()
144 if (chip->input_clock == ECHO_CLOCK_ESYNC) in set_sample_rate()160 chip->input_clock = clock; in set_input_clock()
158 chip->input_clock = clock; in set_input_clock()166 chip->input_clock = clock; in set_input_clock()
134 if (chip->input_clock == ECHO_CLOCK_SPDIF) in set_sample_rate()161 chip->input_clock = clock; in set_input_clock()
101 return set_input_clock(chip, chip->input_clock); in set_input_auto_mute()
680 u16 input_clock; /* Chg. Input clock state 0xb68 2 */ member
376 u8 input_clock; /* Currently selected sample clock member
756 if (set_input_clock(chip, chip->input_clock) < 0) in restore_dsp_rettings()1016 chip->input_clock = ECHO_CLOCK_INTERNAL; in init_line_levels()
1565 clock = chip->input_clock; in snd_echo_clock_source_get()1587 if (chip->input_clock != dclock) { in snd_echo_clock_source_put()
334 input_id = config->input_clock == ADV7511_INPUT_CLOCK_DDR in adv7511_set_link_config()336 else if (config->input_clock == ADV7511_INPUT_CLOCK_DDR) in adv7511_set_link_config()338 else if (config->input_clock == ADV7511_INPUT_CLOCK_2X) in adv7511_set_link_config()798 config->input_clock = ADV7511_INPUT_CLOCK_1X; in adv7511_parse_dt()800 config->input_clock = ADV7511_INPUT_CLOCK_2X; in adv7511_parse_dt()802 config->input_clock = ADV7511_INPUT_CLOCK_DDR; in adv7511_parse_dt()807 config->input_clock != ADV7511_INPUT_CLOCK_1X) { in adv7511_parse_dt()
248 enum adv7511_input_clock input_clock; member
183 u32 input_clock = clk_get_rate(dev->clk); in i2c_davinci_calc_clk_dividers() local202 psc = (input_clock / 7000000) - 1; in i2c_davinci_calc_clk_dividers()203 if ((input_clock / (psc + 1)) > 12000000) in i2c_davinci_calc_clk_dividers()207 clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)) - (d << 1); in i2c_davinci_calc_clk_dividers()215 dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk); in i2c_davinci_calc_clk_dividers()