Searched refs:initialState (Results 1 - 10 of 10) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
H A Drv730_dpm.c242 table->ACPIState = table->initialState; rv730_populate_smc_acpi_state()
327 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = rv730_populate_smc_initial_state()
329 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = rv730_populate_smc_initial_state()
331 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = rv730_populate_smc_initial_state()
333 table->initialState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = rv730_populate_smc_initial_state()
335 table->initialState.levels[0].mclk.mclk730.vDLL_CNTL = rv730_populate_smc_initial_state()
337 table->initialState.levels[0].mclk.mclk730.vMPLL_SS = rv730_populate_smc_initial_state()
339 table->initialState.levels[0].mclk.mclk730.vMPLL_SS2 = rv730_populate_smc_initial_state()
342 table->initialState.levels[0].mclk.mclk730.mclk_value = rv730_populate_smc_initial_state()
345 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = rv730_populate_smc_initial_state()
347 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = rv730_populate_smc_initial_state()
349 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = rv730_populate_smc_initial_state()
351 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = rv730_populate_smc_initial_state()
353 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = rv730_populate_smc_initial_state()
356 table->initialState.levels[0].sclk.sclk_value = rv730_populate_smc_initial_state()
359 table->initialState.levels[0].arbValue = MC_CG_ARB_FREQ_F0; rv730_populate_smc_initial_state()
361 table->initialState.levels[0].seqValue = rv730_populate_smc_initial_state()
366 &table->initialState.levels[0].vddc); rv730_populate_smc_initial_state()
368 &table->initialState.levels[0].mvdd); rv730_populate_smc_initial_state()
372 table->initialState.levels[0].aT = cpu_to_be32(a_t); rv730_populate_smc_initial_state()
374 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); rv730_populate_smc_initial_state()
377 table->initialState.levels[0].gen2PCIE = 1; rv730_populate_smc_initial_state()
379 table->initialState.levels[0].gen2PCIE = 0; rv730_populate_smc_initial_state()
381 table->initialState.levels[0].gen2XSP = 1; rv730_populate_smc_initial_state()
383 table->initialState.levels[0].gen2XSP = 0; rv730_populate_smc_initial_state()
385 table->initialState.levels[1] = table->initialState.levels[0]; rv730_populate_smc_initial_state()
386 table->initialState.levels[2] = table->initialState.levels[0]; rv730_populate_smc_initial_state()
388 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC; rv730_populate_smc_initial_state()
H A Dcypress_dpm.c1243 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cypress_populate_smc_initial_state()
1245 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cypress_populate_smc_initial_state()
1247 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cypress_populate_smc_initial_state()
1249 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cypress_populate_smc_initial_state()
1251 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cypress_populate_smc_initial_state()
1253 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL = cypress_populate_smc_initial_state()
1256 table->initialState.levels[0].mclk.mclk770.vMPLL_SS = cypress_populate_smc_initial_state()
1258 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 = cypress_populate_smc_initial_state()
1261 table->initialState.levels[0].mclk.mclk770.mclk_value = cypress_populate_smc_initial_state()
1264 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cypress_populate_smc_initial_state()
1266 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cypress_populate_smc_initial_state()
1268 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cypress_populate_smc_initial_state()
1270 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = cypress_populate_smc_initial_state()
1272 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = cypress_populate_smc_initial_state()
1275 table->initialState.levels[0].sclk.sclk_value = cypress_populate_smc_initial_state()
1278 table->initialState.levels[0].arbValue = MC_CG_ARB_FREQ_F0; cypress_populate_smc_initial_state()
1280 table->initialState.levels[0].ACIndex = 0; cypress_populate_smc_initial_state()
1285 &table->initialState.levels[0].vddc); cypress_populate_smc_initial_state()
1291 &table->initialState.levels[0].vddci); cypress_populate_smc_initial_state()
1294 &table->initialState.levels[0].mvdd); cypress_populate_smc_initial_state()
1297 table->initialState.levels[0].aT = cpu_to_be32(a_t); cypress_populate_smc_initial_state()
1299 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); cypress_populate_smc_initial_state()
1303 table->initialState.levels[0].gen2PCIE = 1; cypress_populate_smc_initial_state()
1305 table->initialState.levels[0].gen2PCIE = 0; cypress_populate_smc_initial_state()
1307 table->initialState.levels[0].gen2XSP = 1; cypress_populate_smc_initial_state()
1309 table->initialState.levels[0].gen2XSP = 0; cypress_populate_smc_initial_state()
1312 table->initialState.levels[0].strobeMode = cypress_populate_smc_initial_state()
1317 table->initialState.levels[0].mcFlags = SMC_MC_EDC_RD_FLAG | SMC_MC_EDC_WR_FLAG; cypress_populate_smc_initial_state()
1319 table->initialState.levels[0].mcFlags = 0; cypress_populate_smc_initial_state()
1322 table->initialState.levels[1] = table->initialState.levels[0]; cypress_populate_smc_initial_state()
1323 table->initialState.levels[2] = table->initialState.levels[0]; cypress_populate_smc_initial_state()
1325 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC; cypress_populate_smc_initial_state()
1354 table->ACPIState = table->initialState; cypress_populate_smc_acpi_state()
1655 table->driverState = table->initialState; cypress_init_smc_table()
H A Drv770_dpm.c937 table->ACPIState = table->initialState; rv770_populate_smc_acpi_state()
1031 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = rv770_populate_smc_initial_state()
1033 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = rv770_populate_smc_initial_state()
1035 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = rv770_populate_smc_initial_state()
1037 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = rv770_populate_smc_initial_state()
1039 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = rv770_populate_smc_initial_state()
1041 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL = rv770_populate_smc_initial_state()
1044 table->initialState.levels[0].mclk.mclk770.vMPLL_SS = rv770_populate_smc_initial_state()
1046 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 = rv770_populate_smc_initial_state()
1049 table->initialState.levels[0].mclk.mclk770.mclk_value = rv770_populate_smc_initial_state()
1052 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = rv770_populate_smc_initial_state()
1054 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = rv770_populate_smc_initial_state()
1056 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = rv770_populate_smc_initial_state()
1058 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = rv770_populate_smc_initial_state()
1060 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = rv770_populate_smc_initial_state()
1063 table->initialState.levels[0].sclk.sclk_value = rv770_populate_smc_initial_state()
1066 table->initialState.levels[0].arbValue = MC_CG_ARB_FREQ_F0; rv770_populate_smc_initial_state()
1068 table->initialState.levels[0].seqValue = rv770_populate_smc_initial_state()
1073 &table->initialState.levels[0].vddc); rv770_populate_smc_initial_state()
1075 &table->initialState.levels[0].mvdd); rv770_populate_smc_initial_state()
1078 table->initialState.levels[0].aT = cpu_to_be32(a_t); rv770_populate_smc_initial_state()
1080 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); rv770_populate_smc_initial_state()
1083 table->initialState.levels[0].gen2PCIE = 1; rv770_populate_smc_initial_state()
1085 table->initialState.levels[0].gen2PCIE = 0; rv770_populate_smc_initial_state()
1087 table->initialState.levels[0].gen2XSP = 1; rv770_populate_smc_initial_state()
1089 table->initialState.levels[0].gen2XSP = 0; rv770_populate_smc_initial_state()
1094 table->initialState.levels[0].strobeMode = rv770_populate_smc_initial_state()
1097 table->initialState.levels[0].strobeMode = 0; rv770_populate_smc_initial_state()
1100 table->initialState.levels[0].mcFlags = SMC_MC_EDC_RD_FLAG | SMC_MC_EDC_WR_FLAG; rv770_populate_smc_initial_state()
1102 table->initialState.levels[0].mcFlags = 0; rv770_populate_smc_initial_state()
1106 table->initialState.levels[1] = table->initialState.levels[0]; rv770_populate_smc_initial_state()
1107 table->initialState.levels[2] = table->initialState.levels[0]; rv770_populate_smc_initial_state()
1109 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC; rv770_populate_smc_initial_state()
1223 table->driverState = table->initialState; rv770_init_smc_table()
H A Dni_dpm.c1692 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = ni_populate_smc_initial_state()
1694 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = ni_populate_smc_initial_state()
1696 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = ni_populate_smc_initial_state()
1698 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = ni_populate_smc_initial_state()
1700 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL = ni_populate_smc_initial_state()
1702 table->initialState.levels[0].mclk.vDLL_CNTL = ni_populate_smc_initial_state()
1704 table->initialState.levels[0].mclk.vMPLL_SS = ni_populate_smc_initial_state()
1706 table->initialState.levels[0].mclk.vMPLL_SS2 = ni_populate_smc_initial_state()
1708 table->initialState.levels[0].mclk.mclk_value = ni_populate_smc_initial_state()
1711 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = ni_populate_smc_initial_state()
1713 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = ni_populate_smc_initial_state()
1715 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = ni_populate_smc_initial_state()
1717 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 = ni_populate_smc_initial_state()
1719 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = ni_populate_smc_initial_state()
1721 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = ni_populate_smc_initial_state()
1723 table->initialState.levels[0].sclk.sclk_value = ni_populate_smc_initial_state()
1725 table->initialState.levels[0].arbRefreshState = ni_populate_smc_initial_state()
1728 table->initialState.levels[0].ACIndex = 0; ni_populate_smc_initial_state()
1732 &table->initialState.levels[0].vddc); ni_populate_smc_initial_state()
1737 &table->initialState.levels[0].vddc, ni_populate_smc_initial_state()
1741 table->initialState.levels[0].vddc.index, ni_populate_smc_initial_state()
1742 &table->initialState.levels[0].std_vddc); ni_populate_smc_initial_state()
1749 &table->initialState.levels[0].vddci); ni_populate_smc_initial_state()
1751 ni_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); ni_populate_smc_initial_state()
1754 table->initialState.levels[0].aT = cpu_to_be32(reg); ni_populate_smc_initial_state()
1756 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); ni_populate_smc_initial_state()
1759 table->initialState.levels[0].gen2PCIE = 1; ni_populate_smc_initial_state()
1761 table->initialState.levels[0].gen2PCIE = 0; ni_populate_smc_initial_state()
1764 table->initialState.levels[0].strobeMode = ni_populate_smc_initial_state()
1769 table->initialState.levels[0].mcFlags = NISLANDS_SMC_MC_EDC_RD_FLAG | NISLANDS_SMC_MC_EDC_WR_FLAG; ni_populate_smc_initial_state()
1771 table->initialState.levels[0].mcFlags = 0; ni_populate_smc_initial_state()
1774 table->initialState.levelCount = 1; ni_populate_smc_initial_state()
1776 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC; ni_populate_smc_initial_state()
1778 table->initialState.levels[0].dpm2.MaxPS = 0; ni_populate_smc_initial_state()
1779 table->initialState.levels[0].dpm2.NearTDPDec = 0; ni_populate_smc_initial_state()
1780 table->initialState.levels[0].dpm2.AboveSafeInc = 0; ni_populate_smc_initial_state()
1781 table->initialState.levels[0].dpm2.BelowSafeInc = 0; ni_populate_smc_initial_state()
1784 table->initialState.levels[0].SQPowerThrottle = cpu_to_be32(reg); ni_populate_smc_initial_state()
1787 table->initialState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg); ni_populate_smc_initial_state()
1811 table->ACPIState = table->initialState; ni_populate_smc_acpi_state()
1985 table->driverState = table->initialState; ni_init_smc_table()
1987 table->ULVState = table->initialState; ni_init_smc_table()
H A Dsi_dpm.c4315 table->initialState.levels[0].mclk.vDLL_CNTL = si_populate_smc_initial_state()
4317 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL = si_populate_smc_initial_state()
4319 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = si_populate_smc_initial_state()
4321 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = si_populate_smc_initial_state()
4323 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL = si_populate_smc_initial_state()
4325 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_1 = si_populate_smc_initial_state()
4327 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_2 = si_populate_smc_initial_state()
4329 table->initialState.levels[0].mclk.vMPLL_SS = si_populate_smc_initial_state()
4331 table->initialState.levels[0].mclk.vMPLL_SS2 = si_populate_smc_initial_state()
4334 table->initialState.levels[0].mclk.mclk_value = si_populate_smc_initial_state()
4337 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = si_populate_smc_initial_state()
4339 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = si_populate_smc_initial_state()
4341 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = si_populate_smc_initial_state()
4343 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 = si_populate_smc_initial_state()
4345 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = si_populate_smc_initial_state()
4347 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = si_populate_smc_initial_state()
4350 table->initialState.levels[0].sclk.sclk_value = si_populate_smc_initial_state()
4353 table->initialState.levels[0].arbRefreshState = si_populate_smc_initial_state()
4356 table->initialState.levels[0].ACIndex = 0; si_populate_smc_initial_state()
4360 &table->initialState.levels[0].vddc); si_populate_smc_initial_state()
4366 &table->initialState.levels[0].vddc, si_populate_smc_initial_state()
4370 table->initialState.levels[0].vddc.index, si_populate_smc_initial_state()
4371 &table->initialState.levels[0].std_vddc); si_populate_smc_initial_state()
4378 &table->initialState.levels[0].vddci); si_populate_smc_initial_state()
4386 &table->initialState.levels[0].vddc); si_populate_smc_initial_state()
4388 si_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); si_populate_smc_initial_state()
4391 table->initialState.levels[0].aT = cpu_to_be32(reg); si_populate_smc_initial_state()
4393 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); si_populate_smc_initial_state()
4395 table->initialState.levels[0].gen2PCIE = (u8)si_pi->boot_pcie_gen; si_populate_smc_initial_state()
4398 table->initialState.levels[0].strobeMode = si_populate_smc_initial_state()
4403 table->initialState.levels[0].mcFlags = SISLANDS_SMC_MC_EDC_RD_FLAG | SISLANDS_SMC_MC_EDC_WR_FLAG; si_populate_smc_initial_state()
4405 table->initialState.levels[0].mcFlags = 0; si_populate_smc_initial_state()
4408 table->initialState.levelCount = 1; si_populate_smc_initial_state()
4410 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC; si_populate_smc_initial_state()
4412 table->initialState.levels[0].dpm2.MaxPS = 0; si_populate_smc_initial_state()
4413 table->initialState.levels[0].dpm2.NearTDPDec = 0; si_populate_smc_initial_state()
4414 table->initialState.levels[0].dpm2.AboveSafeInc = 0; si_populate_smc_initial_state()
4415 table->initialState.levels[0].dpm2.BelowSafeInc = 0; si_populate_smc_initial_state()
4416 table->initialState.levels[0].dpm2.PwrEfficiencyRatio = 0; si_populate_smc_initial_state()
4419 table->initialState.levels[0].SQPowerThrottle = cpu_to_be32(reg); si_populate_smc_initial_state()
4422 table->initialState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg); si_populate_smc_initial_state()
4447 table->ACPIState = table->initialState; si_populate_smc_acpi_state()
4690 table->driverState = table->initialState; si_init_smc_table()
4712 table->ULVState = table->initialState; si_init_smc_table()
H A Drv770_smc.h164 RV770_SMC_SWSTATE initialState; member in struct:RV770_SMC_STATETABLE
H A Dnislands_smc.h171 NISLANDS_SMC_SWSTATE initialState; member in struct:NISLANDS_SMC_STATETABLE
H A Dsislands_smc.h218 SISLANDS_SMC_SWSTATE initialState; member in struct:SISLANDS_SMC_STATETABLE
H A Drv740_dpm.c329 table->ACPIState = table->initialState; rv740_populate_smc_acpi_state()
H A Dbtc_dpm.c1682 table->driverState = table->initialState; btc_init_smc_table()

Completed in 395 milliseconds