Searched refs:hwpwm (Results 1 - 27 of 27) sorted by relevance

/linux-4.1.27/drivers/pwm/
H A Dpwm-jz4740.c52 unsigned int gpio = jz4740_pwm_gpio_list[pwm->hwpwm]; jz4740_pwm_request()
59 if (pwm->hwpwm < 2) jz4740_pwm_request()
71 jz4740_timer_start(pwm->hwpwm); jz4740_pwm_request()
78 unsigned int gpio = jz4740_pwm_gpio_list[pwm->hwpwm]; jz4740_pwm_free()
80 jz4740_timer_set_ctrl(pwm->hwpwm, 0); jz4740_pwm_free()
85 jz4740_timer_stop(pwm->hwpwm); jz4740_pwm_free()
93 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl); jz4740_pwm_enable()
94 jz4740_timer_enable(pwm->hwpwm); jz4740_pwm_enable()
101 uint32_t ctrl = jz4740_timer_get_ctrl(pwm->hwpwm); jz4740_pwm_disable()
104 jz4740_timer_disable(pwm->hwpwm); jz4740_pwm_disable()
105 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl); jz4740_pwm_disable()
137 is_enabled = jz4740_timer_is_enabled(pwm->hwpwm); jz4740_pwm_config()
141 jz4740_timer_set_count(pwm->hwpwm, 0); jz4740_pwm_config()
142 jz4740_timer_set_duty(pwm->hwpwm, duty); jz4740_pwm_config()
143 jz4740_timer_set_period(pwm->hwpwm, period); jz4740_pwm_config()
148 jz4740_timer_set_ctrl(pwm->hwpwm, ctrl); jz4740_pwm_config()
H A Dpwm-pca9685.c77 if (pwm->hwpwm >= PCA9685_MAXCHAN) pca9685_pwm_config()
80 reg = LED_N_OFF_H(pwm->hwpwm); pca9685_pwm_config()
88 if (pwm->hwpwm >= PCA9685_MAXCHAN) pca9685_pwm_config()
91 reg = LED_N_ON_H(pwm->hwpwm); pca9685_pwm_config()
101 if (pwm->hwpwm >= PCA9685_MAXCHAN) pca9685_pwm_config()
104 reg = LED_N_OFF_L(pwm->hwpwm); pca9685_pwm_config()
108 if (pwm->hwpwm >= PCA9685_MAXCHAN) pca9685_pwm_config()
111 reg = LED_N_OFF_H(pwm->hwpwm); pca9685_pwm_config()
127 if (pwm->hwpwm >= PCA9685_MAXCHAN) pca9685_pwm_enable()
130 reg = LED_N_ON_L(pwm->hwpwm); pca9685_pwm_enable()
134 if (pwm->hwpwm >= PCA9685_MAXCHAN) pca9685_pwm_enable()
137 reg = LED_N_ON_H(pwm->hwpwm); pca9685_pwm_enable()
145 if (pwm->hwpwm >= PCA9685_MAXCHAN) pca9685_pwm_enable()
148 reg = LED_N_OFF_H(pwm->hwpwm); pca9685_pwm_enable()
160 if (pwm->hwpwm >= PCA9685_MAXCHAN) pca9685_pwm_disable()
163 reg = LED_N_OFF_H(pwm->hwpwm); pca9685_pwm_disable()
168 if (pwm->hwpwm >= PCA9685_MAXCHAN) pca9685_pwm_disable()
171 reg = LED_N_OFF_L(pwm->hwpwm); pca9685_pwm_disable()
H A Dpwm-vt8500.c116 writel(prescale, vt8500->base + REG_SCALAR(pwm->hwpwm)); vt8500_pwm_config()
117 pwm_busy_wait(vt8500, pwm->hwpwm, STATUS_SCALAR_UPDATE); vt8500_pwm_config()
119 writel(pv, vt8500->base + REG_PERIOD(pwm->hwpwm)); vt8500_pwm_config()
120 pwm_busy_wait(vt8500, pwm->hwpwm, STATUS_PERIOD_UPDATE); vt8500_pwm_config()
122 writel(dc, vt8500->base + REG_DUTY(pwm->hwpwm)); vt8500_pwm_config()
123 pwm_busy_wait(vt8500, pwm->hwpwm, STATUS_DUTY_UPDATE); vt8500_pwm_config()
125 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_config()
127 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_config()
128 pwm_busy_wait(vt8500, pwm->hwpwm, STATUS_CTRL_UPDATE); vt8500_pwm_config()
146 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_enable()
148 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_enable()
149 pwm_busy_wait(vt8500, pwm->hwpwm, STATUS_CTRL_UPDATE); vt8500_pwm_enable()
159 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_disable()
161 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_disable()
162 pwm_busy_wait(vt8500, pwm->hwpwm, STATUS_CTRL_UPDATE); vt8500_pwm_disable()
174 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_set_polarity()
181 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); vt8500_pwm_set_polarity()
182 pwm_busy_wait(vt8500, pwm->hwpwm, STATUS_CTRL_UPDATE); vt8500_pwm_set_polarity()
H A Dpwm-bcm2835.c48 value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm)); bcm2835_pwm_request()
49 value |= (PWM_MODE << PWM_CONTROL_SHIFT(pwm->hwpwm)); bcm2835_pwm_request()
61 value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm)); bcm2835_pwm_free()
76 writel(duty_ns / pc->scaler, pc->base + DUTY(pwm->hwpwm)); bcm2835_pwm_config()
77 writel(period_ns / pc->scaler, pc->base + PERIOD(pwm->hwpwm)); bcm2835_pwm_config()
88 value |= PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm); bcm2835_pwm_enable()
100 value &= ~(PWM_ENABLE << PWM_CONTROL_SHIFT(pwm->hwpwm)); bcm2835_pwm_disable()
113 value &= ~(PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm)); bcm2835_set_polarity()
115 value |= PWM_POLARITY << PWM_CONTROL_SHIFT(pwm->hwpwm); bcm2835_set_polarity()
H A Dpwm-lpc32xx.c72 val = readl(lpc32xx->base + (pwm->hwpwm << 2)); lpc32xx_pwm_config()
75 writel(val, lpc32xx->base + (pwm->hwpwm << 2)); lpc32xx_pwm_config()
90 val = readl(lpc32xx->base + (pwm->hwpwm << 2)); lpc32xx_pwm_enable()
92 writel(val, lpc32xx->base + (pwm->hwpwm << 2)); lpc32xx_pwm_enable()
102 val = readl(lpc32xx->base + (pwm->hwpwm << 2)); lpc32xx_pwm_disable()
104 writel(val, lpc32xx->base + (pwm->hwpwm << 2)); lpc32xx_pwm_disable()
H A Dpwm-sun4i.c156 if (sun4i_pwm->data->has_rdy && (val & PWM_RDY(pwm->hwpwm))) { sun4i_pwm_config()
162 clk_gate = val & BIT_CH(PWM_CLK_GATING, pwm->hwpwm); sun4i_pwm_config()
164 val &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm); sun4i_pwm_config()
169 val &= ~BIT_CH(PWM_PRESCAL_MASK, pwm->hwpwm); sun4i_pwm_config()
170 val |= BIT_CH(prescaler, pwm->hwpwm); sun4i_pwm_config()
174 sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm)); sun4i_pwm_config()
205 val &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm); sun4i_pwm_set_polarity()
207 val |= BIT_CH(PWM_ACT_STATE, pwm->hwpwm); sun4i_pwm_set_polarity()
231 val |= BIT_CH(PWM_EN, pwm->hwpwm); sun4i_pwm_enable()
232 val |= BIT_CH(PWM_CLK_GATING, pwm->hwpwm); sun4i_pwm_enable()
246 val &= ~BIT_CH(PWM_EN, pwm->hwpwm); sun4i_pwm_disable()
247 val &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm); sun4i_pwm_disable()
H A Dpwm-twl.c94 base = pwm->hwpwm * 3; twl_pwm_config()
118 val |= TWL4030_PWM_TOGGLE(pwm->hwpwm, TWL4030_PWMXCLK_ENABLE); twl4030_pwm_enable()
124 val |= TWL4030_PWM_TOGGLE(pwm->hwpwm, TWL4030_PWMX_ENABLE); twl4030_pwm_enable()
148 val &= ~TWL4030_PWM_TOGGLE(pwm->hwpwm, TWL4030_PWMX_ENABLE); twl4030_pwm_disable()
154 val &= ~TWL4030_PWM_TOGGLE(pwm->hwpwm, TWL4030_PWMXCLK_ENABLE); twl4030_pwm_disable()
170 if (pwm->hwpwm == 1) { twl4030_pwm_request()
208 if (pwm->hwpwm == 1) twl4030_pwm_free()
240 val |= TWL6030_PWM_TOGGLE(pwm->hwpwm, TWL6030_PWMXS | TWL6030_PWMXEN); twl6030_pwm_enable()
241 val &= ~TWL6030_PWM_TOGGLE(pwm->hwpwm, TWL6030_PWMXR); twl6030_pwm_enable()
263 val |= TWL6030_PWM_TOGGLE(pwm->hwpwm, TWL6030_PWMXR); twl6030_pwm_disable()
264 val &= ~TWL6030_PWM_TOGGLE(pwm->hwpwm, TWL6030_PWMXS | TWL6030_PWMXEN); twl6030_pwm_disable()
H A Dpwm-atmel.c143 val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR); atmel_pwm_config()
145 atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val); atmel_pwm_config()
163 atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CUPD, dty); atmel_pwm_config_v1()
165 val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR); atmel_pwm_config_v1()
167 atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val); atmel_pwm_config_v1()
173 atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CDTY, dty); atmel_pwm_config_v1()
174 atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV1_CPRD, prd); atmel_pwm_config_v1()
188 atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CDTYUPD, dty); atmel_pwm_config_v2()
194 atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CDTY, dty); atmel_pwm_config_v2()
195 atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWMV2_CPRD, prd); atmel_pwm_config_v2()
206 val = atmel_pwm_ch_readl(atmel_pwm, pwm->hwpwm, PWM_CMR); atmel_pwm_set_polarity()
219 atmel_pwm_ch_writel(atmel_pwm, pwm->hwpwm, PWM_CMR, val); atmel_pwm_set_polarity()
237 atmel_pwm_writel(atmel_pwm, PWM_ENA, 1 << pwm->hwpwm); atmel_pwm_enable()
246 atmel_pwm_writel(atmel_pwm, PWM_DIS, 1 << pwm->hwpwm); atmel_pwm_disable()
H A Dpwm-atmel-tcb.c70 unsigned group = pwm->hwpwm / 2; atmel_tcb_pwm_request()
71 unsigned index = pwm->hwpwm % 2; atmel_tcb_pwm_request()
116 tcbpwmc->pwms[pwm->hwpwm] = tcbpwm; atmel_tcb_pwm_request()
127 clk_disable_unprepare(tc->clk[pwm->hwpwm / 2]); atmel_tcb_pwm_free()
128 tcbpwmc->pwms[pwm->hwpwm] = NULL; atmel_tcb_pwm_free()
138 unsigned group = pwm->hwpwm / 2; atmel_tcb_pwm_disable()
139 unsigned index = pwm->hwpwm % 2; atmel_tcb_pwm_disable()
194 unsigned group = pwm->hwpwm / 2; atmel_tcb_pwm_enable()
195 unsigned index = pwm->hwpwm % 2; atmel_tcb_pwm_enable()
275 unsigned group = pwm->hwpwm / 2; atmel_tcb_pwm_config()
276 unsigned index = pwm->hwpwm % 2; atmel_tcb_pwm_config()
321 atcbpwm = tcbpwmc->pwms[pwm->hwpwm + 1]; atmel_tcb_pwm_config()
323 atcbpwm = tcbpwmc->pwms[pwm->hwpwm - 1]; atmel_tcb_pwm_config()
H A Dsysfs.c201 dev_set_name(&export->child, "pwm%u", pwm->hwpwm); pwm_export_child()
243 unsigned int hwpwm; pwm_export_store() local
246 ret = kstrtouint(buf, 0, &hwpwm); pwm_export_store()
250 if (hwpwm >= chip->npwm) pwm_export_store()
253 pwm = pwm_request_from_chip(chip, hwpwm, "sysfs"); pwm_export_store()
270 unsigned int hwpwm; pwm_unexport_store() local
273 ret = kstrtouint(buf, 0, &hwpwm); pwm_unexport_store()
277 if (hwpwm >= chip->npwm) pwm_unexport_store()
280 ret = pwm_unexport_child(parent, &chip->pwms[hwpwm]); pwm_unexport_store()
H A Dpwm-spear.c128 spear_pwm_writel(pc, pwm->hwpwm, PWMCR, spear_pwm_config()
130 spear_pwm_writel(pc, pwm->hwpwm, PWMDCR, dc); spear_pwm_config()
131 spear_pwm_writel(pc, pwm->hwpwm, PWMPCR, pv); spear_pwm_config()
147 val = spear_pwm_readl(pc, pwm->hwpwm, PWMCR); spear_pwm_enable()
149 spear_pwm_writel(pc, pwm->hwpwm, PWMCR, val); spear_pwm_enable()
159 val = spear_pwm_readl(pc, pwm->hwpwm, PWMCR); spear_pwm_disable()
161 spear_pwm_writel(pc, pwm->hwpwm, PWMCR, val); spear_pwm_disable()
H A Dpwm-mxs.c87 mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20); mxs_pwm_config()
90 mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20); mxs_pwm_config()
110 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET); mxs_pwm_enable()
119 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); mxs_pwm_disable()
H A Dpwm-sti.c143 ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) || sti_pwm_config()
144 ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) || sti_pwm_config()
177 ret = regmap_write(pc->regmap, STI_DS_REG(pwm->hwpwm), pwmvalx); sti_pwm_config()
183 set_bit(pwm->hwpwm, &pc->configured); sti_pwm_config()
216 pwm->hwpwm); sti_pwm_enable()
245 clear_bit(pwm->hwpwm, &pc->configured); sti_pwm_free()
H A Dpwm-img.c127 val &= ~(PWM_CTRL_CFG_DIV_MASK << PWM_CTRL_CFG_DIV_SHIFT(pwm->hwpwm)); img_pwm_config()
129 PWM_CTRL_CFG_DIV_SHIFT(pwm->hwpwm); img_pwm_config()
134 img_pwm_writel(pwm_chip, PWM_CH_CFG(pwm->hwpwm), val); img_pwm_config()
145 val |= BIT(pwm->hwpwm); img_pwm_enable()
150 PERIP_PWM_PDM_CONTROL_CH_SHIFT(pwm->hwpwm), 0); img_pwm_enable()
161 val &= ~BIT(pwm->hwpwm); img_pwm_disable()
H A Dpwm-lp3943.c37 lp3943_pwm_request_map(struct lp3943_pwm *lp3943_pwm, int hwpwm) lp3943_pwm_request_map() argument
48 pwm_map->output = pdata->pwms[hwpwm]->output; lp3943_pwm_request_map()
49 pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs; lp3943_pwm_request_map()
69 pwm_map = lp3943_pwm_request_map(lp3943_pwm, pwm->hwpwm); lp3943_pwm_request()
116 if (pwm->hwpwm == 0) { lp3943_pwm_config()
162 if (pwm->hwpwm == 0) lp3943_pwm_enable()
H A Dpwm-tegra.c122 pwm_writel(pc, pwm->hwpwm, val); tegra_pwm_config()
143 val = pwm_readl(pc, pwm->hwpwm); tegra_pwm_enable()
145 pwm_writel(pc, pwm->hwpwm, val); tegra_pwm_enable()
155 val = pwm_readl(pc, pwm->hwpwm); tegra_pwm_disable()
157 pwm_writel(pc, pwm->hwpwm, val); tegra_pwm_disable()
H A Dpwm-clps711x.c78 clps711x_pwm_update_val(priv, pwm->hwpwm, duty); clps711x_pwm_config()
89 clps711x_pwm_update_val(priv, pwm->hwpwm, duty); clps711x_pwm_enable()
98 clps711x_pwm_update_val(priv, pwm->hwpwm, 0); clps711x_pwm_disable()
H A Dpwm-bfin.c35 if (pwm->hwpwm >= ARRAY_SIZE(pwm_to_gptimer_per)) bfin_pwm_request()
42 priv->pin = pwm_to_gptimer_per[pwm->hwpwm]; bfin_pwm_request()
H A Dpwm-fsl-ftm.c249 pwm->hwpwm); fsl_pwm_config()
273 regmap_write(fpc->regmap, FTM_CSC(pwm->hwpwm), fsl_pwm_config()
275 regmap_write(fpc->regmap, FTM_CV(pwm->hwpwm), duty); fsl_pwm_config()
290 val |= BIT(pwm->hwpwm); fsl_pwm_set_polarity()
292 val &= ~BIT(pwm->hwpwm); fsl_pwm_set_polarity()
329 regmap_update_bits(fpc->regmap, FTM_OUTMASK, BIT(pwm->hwpwm), 0); fsl_pwm_enable()
362 regmap_update_bits(fpc->regmap, FTM_OUTMASK, BIT(pwm->hwpwm), fsl_pwm_disable()
363 BIT(pwm->hwpwm)); fsl_pwm_disable()
H A Dpwm-tiehrpwm.c274 if (i == pwm->hwpwm) ehrpwm_pwm_config()
283 pc->period_cycles[pwm->hwpwm] = period_cycles; ehrpwm_pwm_config()
310 if (pwm->hwpwm == 1) ehrpwm_pwm_config()
329 pc->polarity[pwm->hwpwm] = polarity; ehrpwm_pwm_set_polarity()
343 if (pwm->hwpwm) { ehrpwm_pwm_enable()
358 configure_polarity(pc, pwm->hwpwm); ehrpwm_pwm_enable()
379 if (pwm->hwpwm) { ehrpwm_pwm_disable()
416 pc->period_cycles[pwm->hwpwm] = 0; ehrpwm_pwm_free()
H A Dpwm-samsung.c210 if (!(our_chip->variant.output_mask & BIT(pwm->hwpwm))) { pwm_samsung_request()
213 pwm->hwpwm); pwm_samsung_request()
235 unsigned int tcon_chan = to_tcon_channel(pwm->hwpwm); pwm_samsung_enable()
259 unsigned int tcon_chan = to_tcon_channel(pwm->hwpwm); pwm_samsung_disable()
275 unsigned int tcon_chan = to_tcon_channel(pwm->hwpwm); pwm_samsung_manual_update()
309 tcnt = readl(our_chip->base + REG_TCNTB(pwm->hwpwm)); pwm_samsung_config()
310 oldtcmp = readl(our_chip->base + REG_TCMPB(pwm->hwpwm)); pwm_samsung_config()
325 tin_rate = pwm_samsung_calc_tin(our_chip, pwm->hwpwm, period); pwm_samsung_config()
355 writel(tcnt, our_chip->base + REG_TCNTB(pwm->hwpwm)); pwm_samsung_config()
356 writel(tcmp, our_chip->base + REG_TCMPB(pwm->hwpwm)); pwm_samsung_config()
407 pwm_samsung_set_invert(our_chip, pwm->hwpwm, invert); pwm_samsung_set_polarity()
H A Dpwm-twl-led.c92 base = pwm->hwpwm * 2 + TWL4030_PWMA_REG; twl4030_pwmled_config()
116 val |= TWL4030_LED_TOGGLE(pwm->hwpwm, TWL4030_LED_PINS); twl4030_pwmled_enable()
141 val &= ~TWL4030_LED_TOGGLE(pwm->hwpwm, TWL4030_LED_PINS); twl4030_pwmled_disable()
H A Dpwm-bcm-kona.c100 unsigned int value, chan = pwm->hwpwm; kona_pwmc_config()
157 unsigned int chan = pwm->hwpwm; kona_pwmc_set_polarity()
209 unsigned int chan = pwm->hwpwm; kona_pwmc_disable()
H A Dpwm-pxa.c72 offset = pwm->hwpwm ? 0x10 : 0; pxa_pwm_config()
H A Dpwm-renesas-tpu.c223 if (_pwm->hwpwm >= TPU_CHANNEL_MAX) tpu_pwm_request()
231 pwm->channel = _pwm->hwpwm; tpu_pwm_request()
H A Dcore.c261 pwm->hwpwm = i; pwmchip_add()
/linux-4.1.27/include/linux/
H A Dpwm.h85 unsigned int hwpwm; member in struct:pwm_device

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