Searched refs:hdmi_write_reg (Results 1 – 6 of 6) sorted by relevance
/linux-4.1.27/drivers/video/fbdev/omap2/dss/ |
D | hdmi4_core.c | 243 hdmi_write_reg(core_sys_base, HDMI_CORE_SYS_SYS_CTRL1, r); in hdmi_core_video_config() 259 hdmi_write_reg(core_sys_base, HDMI_CORE_SYS_VID_MODE, r); in hdmi_core_video_config() 266 hdmi_write_reg(core_av_base, HDMI_CORE_AV_HDMI_CTRL, r); in hdmi_core_video_config() 286 hdmi_write_reg(av_base, HDMI_CORE_AV_AVI_BASE + i * 4, in hdmi_core_write_avi_infoframe() 295 hdmi_write_reg(hdmi_av_base(core), HDMI_CORE_AV_PB_CTRL1, in hdmi_core_av_packet_config() 302 hdmi_write_reg(hdmi_av_base(core), HDMI_CORE_AV_PB_CTRL2, in hdmi_core_av_packet_config() 572 hdmi_write_reg(av_base, HDMI_CORE_AV_ACR_CTRL, r); in hdmi_core_audio_config() 587 hdmi_write_reg(av_base, HDMI_CORE_AV_I2S_CHST0, in hdmi_core_audio_config() 589 hdmi_write_reg(av_base, HDMI_CORE_AV_I2S_CHST1, in hdmi_core_audio_config() 591 hdmi_write_reg(av_base, HDMI_CORE_AV_I2S_CHST2, in hdmi_core_audio_config() [all …]
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D | hdmi_wp.c | 53 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus() 60 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable() 65 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_CLR, mask); in hdmi_wp_clear_irqenable() 126 hdmi_write_reg(wp->base, HDMI_WP_VIDEO_SIZE, l); in hdmi_wp_video_config_format() 144 hdmi_write_reg(wp->base, HDMI_WP_VIDEO_CFG, r); in hdmi_wp_video_config_interface() 158 hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_H, timing_h); in hdmi_wp_video_config_timing() 163 hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_V, timing_v); in hdmi_wp_video_config_timing() 208 hdmi_write_reg(wp->base, HDMI_WP_AUDIO_CFG, r); in hdmi_wp_audio_config_format() 221 hdmi_write_reg(wp->base, HDMI_WP_AUDIO_CFG2, r); in hdmi_wp_audio_config_dma() 226 hdmi_write_reg(wp->base, HDMI_WP_AUDIO_CTRL, r); in hdmi_wp_audio_config_dma()
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D | hdmi5_core.c | 336 hdmi_write_reg(base, HDMI_CORE_FC_INVIDCONF, r); in hdmi_core_video_config() 458 hdmi_write_reg(base, HDMI_CORE_FC_AVICONF0, in hdmi_core_write_avi_infoframe() 461 hdmi_write_reg(base, HDMI_CORE_FC_AVICONF1, in hdmi_core_write_avi_infoframe() 464 hdmi_write_reg(base, HDMI_CORE_FC_AVICONF2, in hdmi_core_write_avi_infoframe() 467 hdmi_write_reg(base, HDMI_CORE_FC_AVIVID, vic); in hdmi_core_write_avi_infoframe() 469 hdmi_write_reg(base, HDMI_CORE_FC_AVICONF3, in hdmi_core_write_avi_infoframe() 710 hdmi_write_reg(base, HDMI_CORE_FC_AUDSCHNLS(1), in hdmi5_core_audio_config() 739 hdmi_write_reg(base, HDMI_CORE_FC_AUDSCHNLS(7), in hdmi5_core_audio_config() 743 hdmi_write_reg(base, HDMI_CORE_FC_AUDSCHNLS(8), in hdmi5_core_audio_config() 787 hdmi_write_reg(base, HDMI_CORE_FC_AUDICONF0, in hdmi5_core_audio_infoframe_cfg() [all …]
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D | hdmi.h | 257 static inline void hdmi_write_reg(void __iomem *base_addr, const u32 idx, in hdmi_write_reg() function 269 hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
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D | hdmi_phy.c | 169 hdmi_write_reg(phy->base, HDMI_TXPHY_DIGITAL_CTRL, 0xF0000000); in hdmi_phy_configure()
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D | hdmi5.c | 101 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); in hdmi_irq_handler()
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