Searched refs:gen_synth0_1_parents (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/drivers/clk/spear/
H A Dspear1310_clock.c371 static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk", variable
813 clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents, spear1310_clk_init()
814 ARRAY_SIZE(gen_synth0_1_parents), spear1310_clk_init()
H A Dspear1340_clock.c438 static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk", variable
898 clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents, spear1340_clk_init()
899 ARRAY_SIZE(gen_synth0_1_parents), spear1340_clk_init()

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