Searched refs:gart_size (Results 1 – 9 of 9) sorted by relevance
68 u64 gart_size; member108 hp->gart_size = HP_ZX1_GART_SIZE; in hp_zx1_ioc_shared()109 hp->gatt_entries = hp->gart_size / hp->io_page_size; in hp_zx1_ioc_shared()153 hp->gart_size = HP_ZX1_GART_SIZE; in hp_zx1_ioc_owner()154 hp->gart_base = hp->iova_base + HP_ZX1_IOVA_SIZE - hp->gart_size; in hp_zx1_ioc_owner()156 hp->gatt_entries = hp->gart_size / hp->io_page_size; in hp_zx1_ioc_owner()234 size = hp_private.gart_size / MB(1); in hp_zx1_fetch_size()286 writeq(hp->gart_base | ilog2(hp->gart_size), hp->ioc_regs+HP_ZX1_PCOM); in hp_zx1_tlbflush()
49 u64 gart_size; member73 size = parisc_agp_info.gart_size / MB(1); in parisc_agp_fetch_size()97 writeq(info->gart_base | ilog2(info->gart_size), info->ioc_regs+IOC_PCOM); in parisc_agp_tlbflush()271 info->gart_size = PLUTO_GART_SIZE; in agp_ioc_init()272 info->gatt_entries = info->gart_size / info->io_page_size; in agp_ioc_init()
771 dev_priv->gart_size) & 0xffff0000) | in radeon_cp_init_ring_buffer()917 dev_priv->gart_size); in radeon_set_igpgart()946 dev_priv->gart_size = 32*1024*1024; in radeon_set_igpgart()947 temp = (((dev_priv->gart_vm_start - 1 + dev_priv->gart_size) & in radeon_set_igpgart()989 dev_priv->gart_size); in rs600_set_igpgart()1016 (dev_priv->gart_vm_start + dev_priv->gart_size - 1)); in rs600_set_igpgart()1023 (dev_priv->gart_vm_start + dev_priv->gart_size - 1)); in rs600_set_igpgart()1063 dev_priv->gart_size); in radeon_set_pciegart()1072 dev_priv->gart_size - 1); in radeon_set_pciegart()1120 + dev_priv->gart_size - 1); in radeon_set_pcigart()[all …]
41 int gart_size; member74 || __put_user(init32.gart_size, &init->gart_size) in compat_radeon_cp_init()
237 …600_VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size - 1) >> 12); in r600_vm_flush_gart_range()256 …RADEON_WRITE(R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size … in r600_vm_init()307 …RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_END_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size … in r600_vm_init()441 …RADEON_WRITE(R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size … in r700_vm_init()479 …RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_END_ADDR, (dev_priv->gart_vm_start + dev_priv->gart_size … in r700_vm_init()1874 dev_priv->gart_size) & 0xffff0000) | in r600_cp_init_ring_buffer()2139 dev_priv->gart_size = init->gart_size; in r600_do_init_cp()2156 if ((base + dev_priv->gart_size - 1) >= dev_priv->fb_location && in r600_do_init_cp()2168 ((base + dev_priv->gart_size) & 0xfffffffful) < base) in r600_do_init_cp()2170 - dev_priv->gart_size; in r600_do_init_cp()[all …]
226 args->gart_size = rdev->mc.gtt_size; in radeon_gem_info_ioctl()227 args->gart_size -= rdev->gart_pin_size; in radeon_gem_info_ioctl()
206 int gart_size; member356 u32 gart_end = gart_start + dev_priv->gart_size - 1; in radeon_check_offset()
74 if (off < (dev_priv->fb_size + dev_priv->gart_size)) { in radeon_check_and_fixup_offset()
571 int gart_size; member796 uint64_t gart_size; member