| /linux-4.1.27/drivers/iommu/ |
| D | tegra-gart.c | 68 struct gart_device *gart; /* link to gart device */ member
86 #define FLUSH_GART_REGS(gart) ((void)readl((gart)->regs + GART_CONFIG)) argument
88 #define for_each_gart_pte(gart, iova) \ argument
89 for (iova = gart->iovmm_base; \
90 iova < gart->iovmm_base + GART_PAGE_SIZE * gart->page_count; \
93 static inline void gart_set_pte(struct gart_device *gart, in gart_set_pte() argument
96 writel(offs, gart->regs + GART_ENTRY_ADDR); in gart_set_pte()
97 writel(pte, gart->regs + GART_ENTRY_DATA); in gart_set_pte()
99 dev_dbg(gart->dev, "%s %08lx:%08x\n", in gart_set_pte()
103 static inline unsigned long gart_read_pte(struct gart_device *gart, in gart_read_pte() argument
[all …]
|
| D | Makefile | 19 obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o
|
| /linux-4.1.27/drivers/gpu/drm/radeon/ |
| D | radeon_gart.c | 69 ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size, in radeon_gart_table_ram_alloc()
70 &rdev->gart.table_addr); in radeon_gart_table_ram_alloc()
78 rdev->gart.table_size >> PAGE_SHIFT); in radeon_gart_table_ram_alloc()
81 rdev->gart.ptr = ptr; in radeon_gart_table_ram_alloc()
82 memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size); in radeon_gart_table_ram_alloc()
97 if (rdev->gart.ptr == NULL) { in radeon_gart_table_ram_free()
103 set_memory_wb((unsigned long)rdev->gart.ptr, in radeon_gart_table_ram_free()
104 rdev->gart.table_size >> PAGE_SHIFT); in radeon_gart_table_ram_free()
107 pci_free_consistent(rdev->pdev, rdev->gart.table_size, in radeon_gart_table_ram_free()
108 (void *)rdev->gart.ptr, in radeon_gart_table_ram_free()
[all …]
|
| D | rs400.c | 80 if (rdev->gart.ptr) { in rs400_gart_init()
103 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in rs400_gart_init()
161 tmp = (u32)rdev->gart.table_addr & 0xfffff000; in rs400_gart_enable()
162 tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4; in rs400_gart_enable()
189 (unsigned long long)rdev->gart.table_addr); in rs400_gart_enable()
190 rdev->gart.ready = true; in rs400_gart_enable()
233 u32 *gtt = rdev->gart.ptr; in rs400_gart_set_page()
|
| D | radeon_asic.c | 166 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; in radeon_agp_disable()
167 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; in radeon_agp_disable()
168 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; in radeon_agp_disable()
172 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; in radeon_agp_disable()
173 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; in radeon_agp_disable()
174 rdev->asic->gart.set_page = &r100_pci_gart_set_page; in radeon_agp_disable()
208 .gart = {
276 .gart = {
372 .gart = {
440 .gart = {
[all …]
|
| D | r300.c | 92 void __iomem *ptr = rdev->gart.ptr; in rv370_pcie_gart_set_page()
104 if (rdev->gart.robj) { in rv370_pcie_gart_init()
115 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in rv370_pcie_gart_init()
116 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; in rv370_pcie_gart_init()
117 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; in rv370_pcie_gart_init()
118 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; in rv370_pcie_gart_init()
128 if (rdev->gart.robj == NULL) { in rv370_pcie_gart_enable()
143 table_addr = rdev->gart.table_addr; in rv370_pcie_gart_enable()
158 rdev->gart.ready = true; in rv370_pcie_gart_enable()
|
| D | rs600.c | 534 if (rdev->gart.robj) { in rs600_gart_init()
543 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; in rs600_gart_init()
552 if (rdev->gart.robj == NULL) { in rs600_gart_enable()
589 rdev->gart.table_addr); in rs600_gart_enable()
606 (unsigned long long)rdev->gart.table_addr); in rs600_gart_enable()
607 rdev->gart.ready = true; in rs600_gart_enable()
647 void __iomem *ptr = (void *)rdev->gart.ptr; in rs600_gart_set_page()
|
| D | r100.c | 637 if (rdev->gart.ptr) { in r100_pci_gart_init()
645 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in r100_pci_gart_init()
646 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; in r100_pci_gart_init()
647 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; in r100_pci_gart_init()
648 rdev->asic->gart.set_page = &r100_pci_gart_set_page; in r100_pci_gart_init()
663 WREG32(RADEON_AIC_PT_BASE, rdev->gart.table_addr); in r100_pci_gart_enable()
669 (unsigned long long)rdev->gart.table_addr); in r100_pci_gart_enable()
670 rdev->gart.ready = true; in r100_pci_gart_enable()
693 u32 *gtt = rdev->gart.ptr; in r100_pci_gart_set_page()
|
| D | rv770.c | 896 if (rdev->gart.robj == NULL) { in rv770_pcie_gart_enable()
925 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in rv770_pcie_gart_enable()
936 (unsigned long long)rdev->gart.table_addr); in rv770_pcie_gart_enable()
937 rdev->gart.ready = true; in rv770_pcie_gart_enable()
|
| D | radeon_ttm.c | 1118 if (p >= rdev->gart.num_cpu_pages) in radeon_ttm_gtt_read()
1121 page = rdev->gart.pages[p]; in radeon_ttm_gtt_read()
1127 kunmap(rdev->gart.pages[p]); in radeon_ttm_gtt_read()
|
| D | ni.c | 1257 if (rdev->gart.robj == NULL) { in cayman_pcie_gart_enable()
1286 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in cayman_pcie_gart_enable()
1332 (unsigned long long)rdev->gart.table_addr); in cayman_pcie_gart_enable()
1333 rdev->gart.ready = true; in cayman_pcie_gart_enable()
|
| D | radeon_vm.c | 369 uint64_t src = rdev->gart.table_addr + (addr >> 12) * 8; in radeon_vm_set_pages()
602 result = rdev->gart.pages_entry[addr >> RADEON_GPU_PAGE_SHIFT]; in radeon_vm_map_gart()
|
| D | r600.c | 1027 void __iomem *ptr = (void *)rdev->gart.ptr; in r600_pcie_gart_tlb_flush()
1062 if (rdev->gart.robj) { in r600_pcie_gart_init()
1070 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; in r600_pcie_gart_init()
1079 if (rdev->gart.robj == NULL) { in r600_pcie_gart_enable()
1116 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in r600_pcie_gart_enable()
1127 (unsigned long long)rdev->gart.table_addr); in r600_pcie_gart_enable()
1128 rdev->gart.ready = true; in r600_pcie_gart_enable()
|
| D | radeon.h | 1871 } gart; member
2372 struct radeon_gart gart; member
2880 #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev))
2881 #define radeon_gart_get_page_entry(a, f) (rdev)->asic->gart.get_page_entry((a), (f))
2882 #define radeon_gart_set_page(rdev, i, e) (rdev)->asic->gart.set_page((rdev), (i), (e))
|
| D | evergreen.c | 2451 if (rdev->gart.robj == NULL) { in evergreen_pcie_gart_enable()
2489 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in evergreen_pcie_gart_enable()
2499 (unsigned long long)rdev->gart.table_addr); in evergreen_pcie_gart_enable()
2500 rdev->gart.ready = true; in evergreen_pcie_gart_enable()
|
| D | si.c | 4278 if (rdev->gart.robj == NULL) { in si_pcie_gart_enable()
4307 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in si_pcie_gart_enable()
4357 (unsigned long long)rdev->gart.table_addr); in si_pcie_gart_enable()
4358 rdev->gart.ready = true; in si_pcie_gart_enable()
|
| D | cik.c | 5831 if (rdev->gart.robj == NULL) { in cik_pcie_gart_enable()
5860 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in cik_pcie_gart_enable()
5934 (unsigned long long)rdev->gart.table_addr); in cik_pcie_gart_enable()
5935 rdev->gart.ready = true; in cik_pcie_gart_enable()
|
| /linux-4.1.27/Documentation/devicetree/bindings/iommu/ |
| D | nvidia,tegra20-gart.txt | 4 - compatible: "nvidia,tegra20-gart"
10 gart {
11 compatible = "nvidia,tegra20-gart";
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/ |
| D | nouveau_chan.c | 71 nvif_object_fini(&chan->gart); in nouveau_channel_del()
281 nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) in nouveau_channel_init() argument
331 ret = nvif_object_init(chan->object, NULL, gart, in nouveau_channel_init()
333 sizeof(args), &chan->gart); in nouveau_channel_init()
|
| D | nouveau_chan.h | 14 struct nvif_object gart; member
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ |
| D | nv44.c | 212 struct nvkm_gpuobj *gart = priv->vm->pgt[0].obj[0]; in nv44_mmu_init() local
225 addr -= ((gart->addr >> 19) + 1) << 19; in nv44_mmu_init()
|
| /linux-4.1.27/arch/arm/boot/dts/ |
| D | tegra20.dtsi | 552 compatible = "nvidia,tegra20-gart";
|