/linux-4.1.27/drivers/iommu/ |
H A D | tegra-gart.c | 68 struct gart_device *gart; /* link to gart device */ member in struct:gart_domain 86 #define FLUSH_GART_REGS(gart) ((void)readl((gart)->regs + GART_CONFIG)) 88 #define for_each_gart_pte(gart, iova) \ 89 for (iova = gart->iovmm_base; \ 90 iova < gart->iovmm_base + GART_PAGE_SIZE * gart->page_count; \ 93 static inline void gart_set_pte(struct gart_device *gart, gart_set_pte() argument 96 writel(offs, gart->regs + GART_ENTRY_ADDR); gart_set_pte() 97 writel(pte, gart->regs + GART_ENTRY_DATA); gart_set_pte() 99 dev_dbg(gart->dev, "%s %08lx:%08x\n", gart_set_pte() 103 static inline unsigned long gart_read_pte(struct gart_device *gart, gart_read_pte() argument 108 writel(offs, gart->regs + GART_ENTRY_ADDR); gart_read_pte() 109 pte = readl(gart->regs + GART_ENTRY_DATA); gart_read_pte() 114 static void do_gart_setup(struct gart_device *gart, const u32 *data) do_gart_setup() argument 118 for_each_gart_pte(gart, iova) do_gart_setup() 119 gart_set_pte(gart, iova, data ? *(data++) : 0); do_gart_setup() 121 writel(1, gart->regs + GART_CONFIG); do_gart_setup() 122 FLUSH_GART_REGS(gart); do_gart_setup() 126 static void gart_dump_table(struct gart_device *gart) gart_dump_table() argument 131 spin_lock_irqsave(&gart->pte_lock, flags); for_each_gart_pte() 132 for_each_gart_pte(gart, iova) { for_each_gart_pte() 135 pte = gart_read_pte(gart, iova); for_each_gart_pte() 137 dev_dbg(gart->dev, "%s %08lx:%08lx\n", for_each_gart_pte() 141 spin_unlock_irqrestore(&gart->pte_lock, flags); 144 static inline void gart_dump_table(struct gart_device *gart) gart_dump_table() argument 149 static inline bool gart_iova_range_valid(struct gart_device *gart, gart_iova_range_valid() argument 156 gart_start = gart->iovmm_base; gart_iova_range_valid() 157 gart_end = gart_start + gart->page_count * GART_PAGE_SIZE - 1; gart_iova_range_valid() 170 struct gart_device *gart = gart_domain->gart; gart_iommu_attach_dev() local 174 client = devm_kzalloc(gart->dev, sizeof(*c), GFP_KERNEL); gart_iommu_attach_dev() 179 spin_lock(&gart->client_lock); gart_iommu_attach_dev() 180 list_for_each_entry(c, &gart->client, list) { gart_iommu_attach_dev() 182 dev_err(gart->dev, gart_iommu_attach_dev() 188 list_add(&client->list, &gart->client); gart_iommu_attach_dev() 189 spin_unlock(&gart->client_lock); gart_iommu_attach_dev() 190 dev_dbg(gart->dev, "Attached %s\n", dev_name(dev)); gart_iommu_attach_dev() 194 devm_kfree(gart->dev, client); gart_iommu_attach_dev() 195 spin_unlock(&gart->client_lock); gart_iommu_attach_dev() 203 struct gart_device *gart = gart_domain->gart; gart_iommu_detach_dev() local 206 spin_lock(&gart->client_lock); gart_iommu_detach_dev() 208 list_for_each_entry(c, &gart->client, list) { gart_iommu_detach_dev() 211 devm_kfree(gart->dev, c); gart_iommu_detach_dev() 212 dev_dbg(gart->dev, "Detached %s\n", dev_name(dev)); gart_iommu_detach_dev() 216 dev_err(gart->dev, "Couldn't find\n"); gart_iommu_detach_dev() 218 spin_unlock(&gart->client_lock); gart_iommu_detach_dev() 224 struct gart_device *gart; gart_iommu_domain_alloc() local 229 gart = gart_handle; gart_iommu_domain_alloc() 230 if (!gart) gart_iommu_domain_alloc() 237 gart_domain->gart = gart; gart_iommu_domain_alloc() 238 gart_domain->domain.geometry.aperture_start = gart->iovmm_base; gart_iommu_domain_alloc() 239 gart_domain->domain.geometry.aperture_end = gart->iovmm_base + gart_iommu_domain_alloc() 240 gart->page_count * GART_PAGE_SIZE - 1; gart_iommu_domain_alloc() 249 struct gart_device *gart = gart_domain->gart; gart_iommu_domain_free() local 251 if (gart) { gart_iommu_domain_free() 252 spin_lock(&gart->client_lock); gart_iommu_domain_free() 253 if (!list_empty(&gart->client)) { gart_iommu_domain_free() 256 list_for_each_entry(c, &gart->client, list) gart_iommu_domain_free() 259 spin_unlock(&gart->client_lock); gart_iommu_domain_free() 269 struct gart_device *gart = gart_domain->gart; gart_iommu_map() local 273 if (!gart_iova_range_valid(gart, iova, bytes)) gart_iommu_map() 276 spin_lock_irqsave(&gart->pte_lock, flags); gart_iommu_map() 279 dev_err(gart->dev, "Invalid page: %pa\n", &pa); gart_iommu_map() 280 spin_unlock_irqrestore(&gart->pte_lock, flags); gart_iommu_map() 283 gart_set_pte(gart, iova, GART_PTE(pfn)); gart_iommu_map() 284 FLUSH_GART_REGS(gart); gart_iommu_map() 285 spin_unlock_irqrestore(&gart->pte_lock, flags); gart_iommu_map() 293 struct gart_device *gart = gart_domain->gart; gart_iommu_unmap() local 296 if (!gart_iova_range_valid(gart, iova, bytes)) gart_iommu_unmap() 299 spin_lock_irqsave(&gart->pte_lock, flags); gart_iommu_unmap() 300 gart_set_pte(gart, iova, 0); gart_iommu_unmap() 301 FLUSH_GART_REGS(gart); gart_iommu_unmap() 302 spin_unlock_irqrestore(&gart->pte_lock, flags); gart_iommu_unmap() 310 struct gart_device *gart = gart_domain->gart; gart_iommu_iova_to_phys() local 315 if (!gart_iova_range_valid(gart, iova, 0)) gart_iommu_iova_to_phys() 318 spin_lock_irqsave(&gart->pte_lock, flags); gart_iommu_iova_to_phys() 319 pte = gart_read_pte(gart, iova); gart_iommu_iova_to_phys() 320 spin_unlock_irqrestore(&gart->pte_lock, flags); gart_iommu_iova_to_phys() 324 dev_err(gart->dev, "No entry for %08llx:%pa\n", gart_iommu_iova_to_phys() 326 gart_dump_table(gart); gart_iommu_iova_to_phys() 352 struct gart_device *gart = dev_get_drvdata(dev); tegra_gart_suspend() local 354 u32 *data = gart->savedata; tegra_gart_suspend() 357 spin_lock_irqsave(&gart->pte_lock, flags); tegra_gart_suspend() 358 for_each_gart_pte(gart, iova) tegra_gart_suspend() 359 *(data++) = gart_read_pte(gart, iova); tegra_gart_suspend() 360 spin_unlock_irqrestore(&gart->pte_lock, flags); tegra_gart_suspend() 366 struct gart_device *gart = dev_get_drvdata(dev); tegra_gart_resume() local 369 spin_lock_irqsave(&gart->pte_lock, flags); tegra_gart_resume() 370 do_gart_setup(gart, gart->savedata); tegra_gart_resume() 371 spin_unlock_irqrestore(&gart->pte_lock, flags); tegra_gart_resume() 377 struct gart_device *gart; tegra_gart_probe() local 395 gart = devm_kzalloc(dev, sizeof(*gart), GFP_KERNEL); tegra_gart_probe() 396 if (!gart) { tegra_gart_probe() 407 gart->dev = &pdev->dev; tegra_gart_probe() 408 spin_lock_init(&gart->pte_lock); tegra_gart_probe() 409 spin_lock_init(&gart->client_lock); tegra_gart_probe() 410 INIT_LIST_HEAD(&gart->client); tegra_gart_probe() 411 gart->regs = gart_regs; tegra_gart_probe() 412 gart->iovmm_base = (dma_addr_t)res_remap->start; tegra_gart_probe() 413 gart->page_count = (resource_size(res_remap) >> GART_PAGE_SHIFT); tegra_gart_probe() 415 gart->savedata = vmalloc(sizeof(u32) * gart->page_count); tegra_gart_probe() 416 if (!gart->savedata) { tegra_gart_probe() 421 platform_set_drvdata(pdev, gart); tegra_gart_probe() 422 do_gart_setup(gart, NULL); tegra_gart_probe() 424 gart_handle = gart; tegra_gart_probe() 431 struct gart_device *gart = platform_get_drvdata(pdev); tegra_gart_remove() local 433 writel(0, gart->regs + GART_CONFIG); tegra_gart_remove() 434 if (gart->savedata) tegra_gart_remove() 435 vfree(gart->savedata); tegra_gart_remove() 446 { .compatible = "nvidia,tegra20-gart", }, 455 .name = "tegra-gart", 476 MODULE_ALIAS("platform:tegra-gart");
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H A D | amd_iommu_init.c | 32 #include <asm/gart.h>
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H A D | amd_iommu.c | 44 #include <asm/gart.h>
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/linux-4.1.27/drivers/gpu/drm/radeon/ |
H A D | radeon_gart.c | 56 * radeon_gart_table_ram_alloc - allocate system ram for gart page table 62 * gart table to be in system memory. 69 ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size, radeon_gart_table_ram_alloc() 70 &rdev->gart.table_addr); radeon_gart_table_ram_alloc() 78 rdev->gart.table_size >> PAGE_SHIFT); radeon_gart_table_ram_alloc() 81 rdev->gart.ptr = ptr; radeon_gart_table_ram_alloc() 82 memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size); radeon_gart_table_ram_alloc() 87 * radeon_gart_table_ram_free - free system ram for gart page table 93 * gart table to be in system memory. 97 if (rdev->gart.ptr == NULL) { radeon_gart_table_ram_free() 103 set_memory_wb((unsigned long)rdev->gart.ptr, radeon_gart_table_ram_free() 104 rdev->gart.table_size >> PAGE_SHIFT); radeon_gart_table_ram_free() 107 pci_free_consistent(rdev->pdev, rdev->gart.table_size, radeon_gart_table_ram_free() 108 (void *)rdev->gart.ptr, radeon_gart_table_ram_free() 109 rdev->gart.table_addr); radeon_gart_table_ram_free() 110 rdev->gart.ptr = NULL; radeon_gart_table_ram_free() 111 rdev->gart.table_addr = 0; radeon_gart_table_ram_free() 115 * radeon_gart_table_vram_alloc - allocate vram for gart page table 121 * gart table to be in video memory. 128 if (rdev->gart.robj == NULL) { radeon_gart_table_vram_alloc() 129 r = radeon_bo_create(rdev, rdev->gart.table_size, radeon_gart_table_vram_alloc() 131 0, NULL, NULL, &rdev->gart.robj); radeon_gart_table_vram_alloc() 140 * radeon_gart_table_vram_pin - pin gart page table in vram 146 * gart table to be in video memory. 154 r = radeon_bo_reserve(rdev->gart.robj, false); radeon_gart_table_vram_pin() 157 r = radeon_bo_pin(rdev->gart.robj, radeon_gart_table_vram_pin() 160 radeon_bo_unreserve(rdev->gart.robj); radeon_gart_table_vram_pin() 163 r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr); radeon_gart_table_vram_pin() 165 radeon_bo_unpin(rdev->gart.robj); radeon_gart_table_vram_pin() 166 radeon_bo_unreserve(rdev->gart.robj); radeon_gart_table_vram_pin() 167 rdev->gart.table_addr = gpu_addr; radeon_gart_table_vram_pin() 175 for (i = 0; i < rdev->gart.num_gpu_pages; i++) radeon_gart_table_vram_pin() 176 radeon_gart_set_page(rdev, i, rdev->gart.pages_entry[i]); radeon_gart_table_vram_pin() 185 * radeon_gart_table_vram_unpin - unpin gart page table in vram 190 * These asics require the gart table to be in video memory. 196 if (rdev->gart.robj == NULL) { radeon_gart_table_vram_unpin() 199 r = radeon_bo_reserve(rdev->gart.robj, false); radeon_gart_table_vram_unpin() 201 radeon_bo_kunmap(rdev->gart.robj); radeon_gart_table_vram_unpin() 202 radeon_bo_unpin(rdev->gart.robj); radeon_gart_table_vram_unpin() 203 radeon_bo_unreserve(rdev->gart.robj); radeon_gart_table_vram_unpin() 204 rdev->gart.ptr = NULL; radeon_gart_table_vram_unpin() 209 * radeon_gart_table_vram_free - free gart page table vram 214 * (pcie r4xx, r5xx+). These asics require the gart table to 219 if (rdev->gart.robj == NULL) { radeon_gart_table_vram_free() 222 radeon_bo_unref(&rdev->gart.robj); radeon_gart_table_vram_free() 226 * Common gart functions. 229 * radeon_gart_unbind - unbind pages from the gart page table 232 * @offset: offset into the GPU's gart aperture 235 * Unbinds the requested pages from the gart page table and 245 if (!rdev->gart.ready) { radeon_gart_unbind() 252 if (rdev->gart.pages[p]) { radeon_gart_unbind() 253 rdev->gart.pages[p] = NULL; radeon_gart_unbind() 255 rdev->gart.pages_entry[t] = rdev->dummy_page.entry; radeon_gart_unbind() 256 if (rdev->gart.ptr) { radeon_gart_unbind() 263 if (rdev->gart.ptr) { radeon_gart_unbind() 270 * radeon_gart_bind - bind pages into the gart page table 273 * @offset: offset into the GPU's gart aperture 279 * Binds the requested pages to the gart page table 292 if (!rdev->gart.ready) { radeon_gart_bind() 300 rdev->gart.pages[p] = pagelist[i]; radeon_gart_bind() 304 rdev->gart.pages_entry[t] = page_entry; radeon_gart_bind() 305 if (rdev->gart.ptr) { radeon_gart_bind() 311 if (rdev->gart.ptr) { radeon_gart_bind() 319 * radeon_gart_init - init the driver info for managing the gart 323 * Allocate the dummy page and init the gart driver info (all asics). 330 if (rdev->gart.pages) { radeon_gart_init() 342 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE; radeon_gart_init() 343 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE; radeon_gart_init() 345 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); radeon_gart_init() 347 rdev->gart.pages = vzalloc(sizeof(void *) * rdev->gart.num_cpu_pages); radeon_gart_init() 348 if (rdev->gart.pages == NULL) { radeon_gart_init() 352 rdev->gart.pages_entry = vmalloc(sizeof(uint64_t) * radeon_gart_init() 353 rdev->gart.num_gpu_pages); radeon_gart_init() 354 if (rdev->gart.pages_entry == NULL) { radeon_gart_init() 359 for (i = 0; i < rdev->gart.num_gpu_pages; i++) radeon_gart_init() 360 rdev->gart.pages_entry[i] = rdev->dummy_page.entry; radeon_gart_init() 365 * radeon_gart_fini - tear down the driver info for managing the gart 369 * Tear down the gart driver info and free the dummy page (all asics). 373 if (rdev->gart.ready) { radeon_gart_fini() 375 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages); radeon_gart_fini() 377 rdev->gart.ready = false; radeon_gart_fini() 378 vfree(rdev->gart.pages); radeon_gart_fini() 379 vfree(rdev->gart.pages_entry); radeon_gart_fini() 380 rdev->gart.pages = NULL; radeon_gart_fini() 381 rdev->gart.pages_entry = NULL; radeon_gart_fini()
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H A D | rs400.c | 40 /* Check gart size */ rs400_gart_adjust_size() 80 if (rdev->gart.ptr) { rs400_gart_init() 84 /* Check gart size */ rs400_gart_init() 97 /* Initialize common gart structure */ rs400_gart_init() 103 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; rs400_gart_init() 115 /* Check gart size */ rs400_gart_enable() 161 tmp = (u32)rdev->gart.table_addr & 0xfffff000; rs400_gart_enable() 162 tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4; rs400_gart_enable() 184 /* Enable gart */ rs400_gart_enable() 189 (unsigned long long)rdev->gart.table_addr); rs400_gart_enable() 190 rdev->gart.ready = true; rs400_gart_enable() 233 u32 *gtt = rdev->gart.ptr; rs400_gart_set_page()
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H A D | radeon_asic.c | 151 * Removes AGP flags and changes the gart callbacks on AGP 152 * cards when using the internal gart rather than AGP (all asics). 166 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; radeon_agp_disable() 167 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; radeon_agp_disable() 168 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; radeon_agp_disable() 172 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; radeon_agp_disable() 173 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; radeon_agp_disable() 174 rdev->asic->gart.set_page = &r100_pci_gart_set_page; radeon_agp_disable() 208 .gart = { 276 .gart = { 372 .gart = { 440 .gart = { 508 .gart = { 576 .gart = { 644 .gart = { 712 .gart = { 780 .gart = { 848 .gart = { 944 .gart = { 1029 .gart = { 1122 .gart = { 1228 .gart = { 1348 .gart = { 1442 .gart = { 1535 .gart = { 1672 .gart = { 1777 .gart = { 1912 .gart = { 2079 .gart = { 2192 .gart = {
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H A D | r300.c | 92 void __iomem *ptr = rdev->gart.ptr; rv370_pcie_gart_set_page() 104 if (rdev->gart.robj) { rv370_pcie_gart_init() 108 /* Initialize common gart structure */ rv370_pcie_gart_init() 114 DRM_ERROR("Failed to register debugfs file for PCIE gart !\n"); rv370_pcie_gart_init() 115 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; rv370_pcie_gart_init() 116 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; rv370_pcie_gart_init() 117 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; rv370_pcie_gart_init() 118 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; rv370_pcie_gart_init() 128 if (rdev->gart.robj == NULL) { rv370_pcie_gart_enable() 143 table_addr = rdev->gart.table_addr; rv370_pcie_gart_enable() 158 rdev->gart.ready = true; rv370_pcie_gart_enable()
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H A D | rs600.c | 534 if (rdev->gart.robj) { rs600_gart_init() 538 /* Initialize common gart structure */ rs600_gart_init() 543 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; rs600_gart_init() 552 if (rdev->gart.robj == NULL) { rs600_gart_enable() 589 rdev->gart.table_addr); rs600_gart_enable() 606 (unsigned long long)rdev->gart.table_addr); rs600_gart_enable() 607 rdev->gart.ready = true; rs600_gart_enable() 615 /* FIXME: disable out of gart access */ rs600_gart_disable() 647 void __iomem *ptr = (void *)rdev->gart.ptr; rs600_gart_set_page()
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H A D | radeon_vm.c | 35 * GPUVM is similar to the legacy gart on older asics, however 36 * rather than there being a single global gart table 369 uint64_t src = rdev->gart.table_addr + (addr >> 12) * 8; radeon_vm_set_pages() 588 * radeon_vm_map_gart - get the physical address of a gart page 602 result = rdev->gart.pages_entry[addr >> RADEON_GPU_PAGE_SHIFT]; radeon_vm_map_gart()
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H A D | ni.c | 1257 if (rdev->gart.robj == NULL) { cayman_pcie_gart_enable() 1286 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); cayman_pcie_gart_enable() 1332 (unsigned long long)rdev->gart.table_addr); cayman_pcie_gart_enable() 1333 rdev->gart.ready = true; cayman_pcie_gart_enable() 1391 /* flush read cache over gart for this vmid */ cayman_fence_ring_emit() 1434 /* flush read cache over gart for this vmid */ cayman_ring_ib_execute()
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H A D | radeon_device.c | 758 * This dummy page is used by the driver as a filler for gart entries 1100 /* default to a larger gart size on newer asics */ radeon_check_arguments() 1108 dev_warn(rdev->dev, "gart size (%d) too small\n", radeon_check_arguments() 1115 dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n", radeon_check_arguments() 1330 /* all of the newer IGP chips have an internal gart radeon_device_init() 1357 * PCI - dma32 for legacy pci gart, 40 bits on newer asics radeon_device_init()
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H A D | radeon.h | 37 * - r600/r700: gart & cp 40 * - Barrier in gart code 1865 /* gart */ 1871 } gart; member in struct:radeon_asic 2372 struct radeon_gart gart; member in struct:radeon_device 2880 #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev)) 2881 #define radeon_gart_get_page_entry(a, f) (rdev)->asic->gart.get_page_entry((a), (f)) 2882 #define radeon_gart_set_page(rdev, i, e) (rdev)->asic->gart.set_page((rdev), (i), (e))
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H A D | rv770.c | 896 if (rdev->gart.robj == NULL) { rv770_pcie_gart_enable() 925 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); rv770_pcie_gart_enable() 936 (unsigned long long)rdev->gart.table_addr); rv770_pcie_gart_enable() 937 rdev->gart.ready = true; rv770_pcie_gart_enable()
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H A D | radeon_ttm.c | 1118 if (p >= rdev->gart.num_cpu_pages) radeon_ttm_gtt_read() 1121 page = rdev->gart.pages[p]; radeon_ttm_gtt_read() 1127 kunmap(rdev->gart.pages[p]); radeon_ttm_gtt_read()
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H A D | r100.c | 637 if (rdev->gart.ptr) { r100_pci_gart_init() 641 /* Initialize common gart structure */ r100_pci_gart_init() 645 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; r100_pci_gart_init() 646 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; r100_pci_gart_init() 647 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; r100_pci_gart_init() 648 rdev->asic->gart.set_page = &r100_pci_gart_set_page; r100_pci_gart_init() 663 WREG32(RADEON_AIC_PT_BASE, rdev->gart.table_addr); r100_pci_gart_enable() 669 (unsigned long long)rdev->gart.table_addr); r100_pci_gart_enable() 670 rdev->gart.ready = true; r100_pci_gart_enable() 693 u32 *gtt = rdev->gart.ptr; r100_pci_gart_set_page()
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H A D | r600.c | 1027 void __iomem *ptr = (void *)rdev->gart.ptr; r600_pcie_gart_tlb_flush() 1062 if (rdev->gart.robj) { r600_pcie_gart_init() 1066 /* Initialize common gart structure */ r600_pcie_gart_init() 1070 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; r600_pcie_gart_init() 1079 if (rdev->gart.robj == NULL) { r600_pcie_gart_enable() 1116 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); r600_pcie_gart_enable() 1127 (unsigned long long)rdev->gart.table_addr); r600_pcie_gart_enable() 1128 rdev->gart.ready = true; r600_pcie_gart_enable() 2829 /* flush read cache over gart */ r600_fence_ring_emit() 2843 /* flush read cache over gart */ r600_fence_ring_emit()
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H A D | r600_cp.c | 2217 /* XXX turn off pcie gart */ r600_do_init_cp() 2224 DRM_ERROR("Need gart offset from userspace\n"); r600_do_init_cp() 2229 DRM_DEBUG("Using gart offset 0x%08lx\n", dev_priv->pcigart_offset); r600_do_init_cp()
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H A D | radeon_drv.h | 97 * 1.19- Add support for gart table in FB memory and PCIE r300 105 * 1.26- Add support for variable size PCI(E) gart aperture 567 /* switch between MCIND GART and MM GART registers. 0 = mmgart, 1 = mcind gart */
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H A D | radeon_drv.c | 215 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); radeon_unregister_atpx_handler()
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H A D | cik.c | 5654 * Set the location of vram, gart, and AGP in the GPU's 5711 * vram and gart within the GPU's physical address space (CIK). 5779 * cik_pcie_gart_tlb_flush - gart tlb flush callback 5817 * cik_pcie_gart_enable - gart enable 5831 if (rdev->gart.robj == NULL) { cik_pcie_gart_enable() 5860 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); cik_pcie_gart_enable() 5934 (unsigned long long)rdev->gart.table_addr); cik_pcie_gart_enable() 5935 rdev->gart.ready = true; cik_pcie_gart_enable() 5940 * cik_pcie_gart_disable - gart disable
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H A D | si.c | 3374 /* flush read cache over gart */ si_fence_ring_emit() 3440 /* flush read cache over gart for this vmid */ si_ring_ib_execute() 4278 if (rdev->gart.robj == NULL) { si_pcie_gart_enable() 4307 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); si_pcie_gart_enable() 4357 (unsigned long long)rdev->gart.table_addr); si_pcie_gart_enable() 4358 rdev->gart.ready = true; si_pcie_gart_enable()
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H A D | radeon_cp.c | 914 DRM_DEBUG("programming igp gart %08X %08lX %08X\n", radeon_set_igpgart() 986 DRM_DEBUG("programming igp gart %08X %08lX %08X\n", rs600_set_igpgart()
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H A D | evergreen.c | 2451 if (rdev->gart.robj == NULL) { evergreen_pcie_gart_enable() 2489 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); evergreen_pcie_gart_enable() 2499 (unsigned long long)rdev->gart.table_addr); evergreen_pcie_gart_enable() 2500 rdev->gart.ready = true; evergreen_pcie_gart_enable()
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H A D | radeon_state.c | 71 * offset that fits in the framebuffer + gart space, apply the radeon_check_and_fixup_offset()
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/linux-4.1.27/drivers/gpu/drm/nouveau/ |
H A D | nouveau_chan.h | 14 struct nvif_object gart; member in struct:nouveau_channel
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H A D | nouveau_chan.c | 71 nvif_object_fini(&chan->gart); nouveau_channel_del() 281 nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) nouveau_channel_init() argument 292 /* allocate dma objects to cover all allowed vram, and gart */ nouveau_channel_init() 331 ret = nvif_object_init(chan->object, NULL, gart, nouveau_channel_init() 333 sizeof(args), &chan->gart); nouveau_channel_init()
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/linux-4.1.27/arch/ia64/include/asm/sn/ |
H A D | tioca_provider.h | 60 u32 ca_gart_entries; /* # u64 entries in gart */ 63 u64 ca_gart_size; /* gart size in bytes */ 64 u64 *ca_gart; /* gart table vaddr */ 65 u64 ca_gart_coretalk_addr; /* gart coretalk addr */
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H A D | tioca.h | 496 * manipulate the gart, but management of the AGP portion of the aperature
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/linux-4.1.27/arch/x86/kernel/ |
H A D | aperture_64.c | 27 #include <asm/gart.h> 36 * with the gart aperture that is used. 39 * ==> kexec (with kdump trigger path or gart still enabled) 40 * ==> kernel_small (gart area become e820_reserved) 41 * ==> kexec (with kdump trigger path or gart still enabled) 43 * So don't use 512M below as gart iommu, leave the space for kernel 138 /* old_order could be the value from NB gart setting */ read_agp()
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H A D | crash.c | 202 /* Not expecting more than 1 gart aperture */ get_gart_ranges_callback() 223 * If gart aperture is present, one needs to exclude that region fill_up_crash_elf_data() 230 * If we have gart region, excluding that could potentially split fill_up_crash_elf_data()
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H A D | pci-dma.c | 13 #include <asm/gart.h>
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H A D | amd_gart_64.c | 38 #include <asm/gart.h> 92 static bool need_flush; /* global flush state. set for each gart wrap */
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H A D | early-quirks.c | 22 #include <asm/gart.h>
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H A D | setup.c | 99 #include <asm/gart.h>
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/linux-4.1.27/drivers/gpu/drm/amd/include/ |
H A D | kgd_kfd_interface.h | 82 * @init_gtt_mem_allocation: Allocate a buffer on the gart aperture. 85 * @free_gtt_mem: Frees a buffer that was allocated on the gart aperture
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/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ |
H A D | nv44.c | 212 struct nvkm_gpuobj *gart = priv->vm->pgt[0].obj[0]; nv44_mmu_init() local 225 addr -= ((gart->addr >> 19) + 1) << 19; nv44_mmu_init()
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/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/ |
H A D | nv40.c | 85 priv->base.reserved += 512 * 1024; /* pci(e)gart table */ nv40_instmem_ctor()
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/linux-4.1.27/drivers/char/agp/ |
H A D | ati-agp.c | 183 /* Write back the previous size and disable gart translation */ ati_cleanup() 384 * Get the address for the gart region. ati_create_gatt_table()
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H A D | nvidia-agp.c | 151 /* gart control */ nvidia_configure() 171 /* gart control */ nvidia_cleanup()
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H A D | amd-k7-agp.c | 146 /* Get the address for the gart region. amd_create_gatt_table() 262 /* Write back the previous size and disable gart translation */ amd_irongate_cleanup()
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H A D | sgi-agp.c | 69 * Given an address of a host physical page, turn it into a valid gart
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H A D | amd64-agp.c | 19 #include <asm/gart.h> 207 /* disable gart translation */ amd64_cleanup()
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H A D | sworks-agp.c | 172 /* Get the address for the gart region. serverworks_create_gatt_table()
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H A D | generic.c | 1202 /* agp_free_memory() needs gart address */ agp_generic_alloc_pages() 1392 /* set gart pointer */ agp3_generic_configure()
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/linux-4.1.27/drivers/gpu/drm/amd/amdkfd/ |
H A D | kfd_device.c | 206 /* add another 512KB for all other allocations on gart (HPD, fences) */ kgd2kfd_device_init() 219 "Allocated %d bytes on gart for device(%x:%x)\n", kgd2kfd_device_init()
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H A D | kfd_priv.h | 315 * @gart_mqd_addr: The MQD gart mc address.
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H A D | kfd_device_queue_manager.c | 745 /* allocate fence memory on the gart */ start_cpsch()
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/linux-4.1.27/include/linux/ |
H A D | mmu_notifier.h | 40 * be immediately reallocated by the gart at an alias physical 48 * through the gart alias address, so leading to memory
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/linux-4.1.27/drivers/video/fbdev/intelfb/ |
H A D | intelfb.h | 285 /* use a gart reserved fb mem */
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/linux-4.1.27/arch/ia64/sn/pci/ |
H A D | tioca_provider.c | 199 * Program the aperature and gart registers in TIOCA tioca_gart_init()
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