Searched refs:frequency (Results 1 - 200 of 1636) sorted by relevance

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/linux-4.1.27/arch/arm/mach-s3c24xx/
H A Dpll-s3c2440-16934400.c24 { .frequency = 78019200, .driver_data = PLLVAL(121, 5, 3), }, /* FVco 624.153600 */
25 { .frequency = 84067200, .driver_data = PLLVAL(131, 5, 3), }, /* FVco 672.537600 */
26 { .frequency = 90115200, .driver_data = PLLVAL(141, 5, 3), }, /* FVco 720.921600 */
27 { .frequency = 96163200, .driver_data = PLLVAL(151, 5, 3), }, /* FVco 769.305600 */
28 { .frequency = 102135600, .driver_data = PLLVAL(185, 6, 3), }, /* FVco 817.084800 */
29 { .frequency = 108259200, .driver_data = PLLVAL(171, 5, 3), }, /* FVco 866.073600 */
30 { .frequency = 114307200, .driver_data = PLLVAL(127, 3, 3), }, /* FVco 914.457600 */
31 { .frequency = 120234240, .driver_data = PLLVAL(134, 3, 3), }, /* FVco 961.873920 */
32 { .frequency = 126161280, .driver_data = PLLVAL(141, 3, 3), }, /* FVco 1009.290240 */
33 { .frequency = 132088320, .driver_data = PLLVAL(148, 3, 3), }, /* FVco 1056.706560 */
34 { .frequency = 138015360, .driver_data = PLLVAL(155, 3, 3), }, /* FVco 1104.122880 */
35 { .frequency = 144789120, .driver_data = PLLVAL(163, 3, 3), }, /* FVco 1158.312960 */
36 { .frequency = 150100363, .driver_data = PLLVAL(187, 9, 2), }, /* FVco 600.401454 */
37 { .frequency = 156038400, .driver_data = PLLVAL(121, 5, 2), }, /* FVco 624.153600 */
38 { .frequency = 162086400, .driver_data = PLLVAL(126, 5, 2), }, /* FVco 648.345600 */
39 { .frequency = 168134400, .driver_data = PLLVAL(131, 5, 2), }, /* FVco 672.537600 */
40 { .frequency = 174048000, .driver_data = PLLVAL(177, 7, 2), }, /* FVco 696.192000 */
41 { .frequency = 180230400, .driver_data = PLLVAL(141, 5, 2), }, /* FVco 720.921600 */
42 { .frequency = 186278400, .driver_data = PLLVAL(124, 4, 2), }, /* FVco 745.113600 */
43 { .frequency = 192326400, .driver_data = PLLVAL(151, 5, 2), }, /* FVco 769.305600 */
44 { .frequency = 198132480, .driver_data = PLLVAL(109, 3, 2), }, /* FVco 792.529920 */
45 { .frequency = 204271200, .driver_data = PLLVAL(185, 6, 2), }, /* FVco 817.084800 */
46 { .frequency = 210268800, .driver_data = PLLVAL(141, 4, 2), }, /* FVco 841.075200 */
47 { .frequency = 216518400, .driver_data = PLLVAL(171, 5, 2), }, /* FVco 866.073600 */
48 { .frequency = 222264000, .driver_data = PLLVAL(97, 2, 2), }, /* FVco 889.056000 */
49 { .frequency = 228614400, .driver_data = PLLVAL(127, 3, 2), }, /* FVco 914.457600 */
50 { .frequency = 234259200, .driver_data = PLLVAL(158, 4, 2), }, /* FVco 937.036800 */
51 { .frequency = 240468480, .driver_data = PLLVAL(134, 3, 2), }, /* FVco 961.873920 */
52 { .frequency = 246960000, .driver_data = PLLVAL(167, 4, 2), }, /* FVco 987.840000 */
53 { .frequency = 252322560, .driver_data = PLLVAL(141, 3, 2), }, /* FVco 1009.290240 */
54 { .frequency = 258249600, .driver_data = PLLVAL(114, 2, 2), }, /* FVco 1032.998400 */
55 { .frequency = 264176640, .driver_data = PLLVAL(148, 3, 2), }, /* FVco 1056.706560 */
56 { .frequency = 270950400, .driver_data = PLLVAL(120, 2, 2), }, /* FVco 1083.801600 */
57 { .frequency = 276030720, .driver_data = PLLVAL(155, 3, 2), }, /* FVco 1104.122880 */
58 { .frequency = 282240000, .driver_data = PLLVAL(92, 1, 2), }, /* FVco 1128.960000 */
59 { .frequency = 289578240, .driver_data = PLLVAL(163, 3, 2), }, /* FVco 1158.312960 */
60 { .frequency = 294235200, .driver_data = PLLVAL(131, 2, 2), }, /* FVco 1176.940800 */
61 { .frequency = 300200727, .driver_data = PLLVAL(187, 9, 1), }, /* FVco 600.401454 */
62 { .frequency = 306358690, .driver_data = PLLVAL(191, 9, 1), }, /* FVco 612.717380 */
63 { .frequency = 312076800, .driver_data = PLLVAL(121, 5, 1), }, /* FVco 624.153600 */
64 { .frequency = 318366720, .driver_data = PLLVAL(86, 3, 1), }, /* FVco 636.733440 */
65 { .frequency = 324172800, .driver_data = PLLVAL(126, 5, 1), }, /* FVco 648.345600 */
66 { .frequency = 330220800, .driver_data = PLLVAL(109, 4, 1), }, /* FVco 660.441600 */
67 { .frequency = 336268800, .driver_data = PLLVAL(131, 5, 1), }, /* FVco 672.537600 */
68 { .frequency = 342074880, .driver_data = PLLVAL(93, 3, 1), }, /* FVco 684.149760 */
69 { .frequency = 348096000, .driver_data = PLLVAL(177, 7, 1), }, /* FVco 696.192000 */
70 { .frequency = 355622400, .driver_data = PLLVAL(118, 4, 1), }, /* FVco 711.244800 */
71 { .frequency = 360460800, .driver_data = PLLVAL(141, 5, 1), }, /* FVco 720.921600 */
72 { .frequency = 366206400, .driver_data = PLLVAL(165, 6, 1), }, /* FVco 732.412800 */
73 { .frequency = 372556800, .driver_data = PLLVAL(124, 4, 1), }, /* FVco 745.113600 */
74 { .frequency = 378201600, .driver_data = PLLVAL(126, 4, 1), }, /* FVco 756.403200 */
75 { .frequency = 384652800, .driver_data = PLLVAL(151, 5, 1), }, /* FVco 769.305600 */
76 { .frequency = 391608000, .driver_data = PLLVAL(177, 6, 1), }, /* FVco 783.216000 */
77 { .frequency = 396264960, .driver_data = PLLVAL(109, 3, 1), }, /* FVco 792.529920 */
78 { .frequency = 402192000, .driver_data = PLLVAL(87, 2, 1), }, /* FVco 804.384000 */
H A Dpll-s3c2410.c36 { .frequency = 34000000, .driver_data = PLLVAL(82, 2, 3), },
37 { .frequency = 45000000, .driver_data = PLLVAL(82, 1, 3), },
38 { .frequency = 51000000, .driver_data = PLLVAL(161, 3, 3), },
39 { .frequency = 48000000, .driver_data = PLLVAL(120, 2, 3), },
40 { .frequency = 56000000, .driver_data = PLLVAL(142, 2, 3), },
41 { .frequency = 68000000, .driver_data = PLLVAL(82, 2, 2), },
42 { .frequency = 79000000, .driver_data = PLLVAL(71, 1, 2), },
43 { .frequency = 85000000, .driver_data = PLLVAL(105, 2, 2), },
44 { .frequency = 90000000, .driver_data = PLLVAL(112, 2, 2), },
45 { .frequency = 101000000, .driver_data = PLLVAL(127, 2, 2), },
46 { .frequency = 113000000, .driver_data = PLLVAL(105, 1, 2), },
47 { .frequency = 118000000, .driver_data = PLLVAL(150, 2, 2), },
48 { .frequency = 124000000, .driver_data = PLLVAL(116, 1, 2), },
49 { .frequency = 135000000, .driver_data = PLLVAL(82, 2, 1), },
50 { .frequency = 147000000, .driver_data = PLLVAL(90, 2, 1), },
51 { .frequency = 152000000, .driver_data = PLLVAL(68, 1, 1), },
52 { .frequency = 158000000, .driver_data = PLLVAL(71, 1, 1), },
53 { .frequency = 170000000, .driver_data = PLLVAL(77, 1, 1), },
54 { .frequency = 180000000, .driver_data = PLLVAL(82, 1, 1), },
55 { .frequency = 186000000, .driver_data = PLLVAL(85, 1, 1), },
56 { .frequency = 192000000, .driver_data = PLLVAL(88, 1, 1), },
57 { .frequency = 203000000, .driver_data = PLLVAL(161, 3, 1), },
61 { .frequency = 210000000, .driver_data = PLLVAL(132, 2, 1), },
62 { .frequency = 226000000, .driver_data = PLLVAL(105, 1, 1), },
63 { .frequency = 266000000, .driver_data = PLLVAL(125, 1, 1), },
64 { .frequency = 268000000, .driver_data = PLLVAL(126, 1, 1), },
65 { .frequency = 270000000, .driver_data = PLLVAL(127, 1, 1), },
H A Dpll-s3c2440-12000000.c24 { .frequency = 75000000, .driver_data = PLLVAL(0x75, 3, 3), }, /* FVco 600.000000 */
25 { .frequency = 80000000, .driver_data = PLLVAL(0x98, 4, 3), }, /* FVco 640.000000 */
26 { .frequency = 90000000, .driver_data = PLLVAL(0x70, 2, 3), }, /* FVco 720.000000 */
27 { .frequency = 100000000, .driver_data = PLLVAL(0x5c, 1, 3), }, /* FVco 800.000000 */
28 { .frequency = 110000000, .driver_data = PLLVAL(0x66, 1, 3), }, /* FVco 880.000000 */
29 { .frequency = 120000000, .driver_data = PLLVAL(0x70, 1, 3), }, /* FVco 960.000000 */
30 { .frequency = 150000000, .driver_data = PLLVAL(0x75, 3, 2), }, /* FVco 600.000000 */
31 { .frequency = 160000000, .driver_data = PLLVAL(0x98, 4, 2), }, /* FVco 640.000000 */
32 { .frequency = 170000000, .driver_data = PLLVAL(0x4d, 1, 2), }, /* FVco 680.000000 */
33 { .frequency = 180000000, .driver_data = PLLVAL(0x70, 2, 2), }, /* FVco 720.000000 */
34 { .frequency = 190000000, .driver_data = PLLVAL(0x57, 1, 2), }, /* FVco 760.000000 */
35 { .frequency = 200000000, .driver_data = PLLVAL(0x5c, 1, 2), }, /* FVco 800.000000 */
36 { .frequency = 210000000, .driver_data = PLLVAL(0x84, 2, 2), }, /* FVco 840.000000 */
37 { .frequency = 220000000, .driver_data = PLLVAL(0x66, 1, 2), }, /* FVco 880.000000 */
38 { .frequency = 230000000, .driver_data = PLLVAL(0x6b, 1, 2), }, /* FVco 920.000000 */
39 { .frequency = 240000000, .driver_data = PLLVAL(0x70, 1, 2), }, /* FVco 960.000000 */
40 { .frequency = 300000000, .driver_data = PLLVAL(0x75, 3, 1), }, /* FVco 600.000000 */
41 { .frequency = 310000000, .driver_data = PLLVAL(0x93, 4, 1), }, /* FVco 620.000000 */
42 { .frequency = 320000000, .driver_data = PLLVAL(0x98, 4, 1), }, /* FVco 640.000000 */
43 { .frequency = 330000000, .driver_data = PLLVAL(0x66, 2, 1), }, /* FVco 660.000000 */
44 { .frequency = 340000000, .driver_data = PLLVAL(0x4d, 1, 1), }, /* FVco 680.000000 */
45 { .frequency = 350000000, .driver_data = PLLVAL(0xa7, 4, 1), }, /* FVco 700.000000 */
46 { .frequency = 360000000, .driver_data = PLLVAL(0x70, 2, 1), }, /* FVco 720.000000 */
47 { .frequency = 370000000, .driver_data = PLLVAL(0xb1, 4, 1), }, /* FVco 740.000000 */
48 { .frequency = 380000000, .driver_data = PLLVAL(0x57, 1, 1), }, /* FVco 760.000000 */
49 { .frequency = 390000000, .driver_data = PLLVAL(0x7a, 2, 1), }, /* FVco 780.000000 */
50 { .frequency = 400000000, .driver_data = PLLVAL(0x5c, 1, 1), }, /* FVco 800.000000 */
H A Dcpufreq-utils.c28 * @cfg: The frequency configuration
31 * frequency.
39 /* Reduce both the refresh time (in ns) and the frequency (in MHz) s3c2410_cpufreq_setrefresh()
60 * @cfg: The frequency configuration
65 clk_set_rate(cfg->mpll, cfg->pll.frequency); s3c2410_set_fvco()
/linux-4.1.27/include/media/
H A Dmt9p031.h8 * @ext_freq: Input clock frequency
9 * @target_freq: Pixel clock frequency
H A Dsi4713.h34 __u32 frequency; /* frequency to peform rnl measurement */ member in struct:si4713_rnl
41 * struct si4713_rnl pointer specifying desired frequency in 'frequency' field
H A Dsr030pc30.h17 unsigned long clk_rate; /* master clock frequency in Hz */
H A Dnoon010pc30.h17 * @clk_rate: the clock frequency in Hz
H A Dov9650.h15 * @mclk_frequency: the sensor's master clock frequency in Hz
H A Dov2659.h28 * @link_frequency: target pixel clock frequency
H A Ds3c_camif.h20 * @clock_frequency: frequency of the clock the host provides to a sensor
/linux-4.1.27/arch/powerpc/sysdev/
H A Dmpc5xxx_clocks.c2 * mpc5xxx_get_bus_frequency - Find the bus frequency for a device
5 * Returns bus frequency (IPS on MPC512x, IPB on MPC52xx),
6 * or 0 if the bus frequency cannot be found.
21 p_bus_freq = of_get_property(node, "bus-frequency", NULL); mpc5xxx_get_bus_frequency()
H A Dfsl_soc.c94 prop = of_get_property(soc, "clock-frequency", &size); fsl_get_sys_freq()
96 prop = of_get_property(soc, "bus-frequency", &size); fsl_get_sys_freq()
121 prop = of_get_property(node, "clock-frequency", &size); get_brgfreq()
137 prop = of_get_property(node, "brg-frequency", &size); get_brgfreq()
142 prop = of_get_property(node, "bus-frequency", &size); get_brgfreq()
/linux-4.1.27/drivers/cpufreq/
H A Dat32ap-cpufreq.c34 new_freq = freq_table[index].frequency; at32_set_target()
54 unsigned int frequency, rate, min_freq; at32_cpufreq_driver_init() local
69 frequency = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000; at32_cpufreq_driver_init()
73 * AVR32 CPU frequency rate scales in power of two between maximum and at32_cpufreq_driver_init()
76 * Further validate that the frequency is usable, and append it to the at32_cpufreq_driver_init()
77 * frequency table. at32_cpufreq_driver_init()
79 steps = fls(frequency / min_freq) + 1; at32_cpufreq_driver_init()
88 rate = clk_round_rate(cpuclk, frequency * 1000) / 1000; at32_cpufreq_driver_init()
90 if (rate != frequency) at32_cpufreq_driver_init()
91 freq_table[i].frequency = CPUFREQ_ENTRY_INVALID; at32_cpufreq_driver_init()
93 freq_table[i].frequency = frequency; at32_cpufreq_driver_init()
95 frequency /= 2; at32_cpufreq_driver_init()
99 freq_table[steps - 1].frequency = CPUFREQ_TABLE_END; at32_cpufreq_driver_init()
103 printk("cpufreq: AT32AP CPU frequency driver\n"); at32_cpufreq_driver_init()
H A Dqoriq-cpufreq.c31 * @table: frequency table
66 * the minimum allowed core frequency, in Hz
67 * for chassis v1.0, >= platform frequency
68 * for chassis v2.0, >= platform frequency / 2
94 if (of_property_read_u32(soc, "bus-frequency", &sysfreq)) get_bus_freq()
146 /* reduce the duplicated frequencies in frequency table */ freq_table_redup()
154 if (freq_table[j].frequency == CPUFREQ_ENTRY_INVALID || freq_table_redup()
155 freq_table[j].frequency != freq_table_redup()
156 freq_table[i].frequency) freq_table_redup()
159 freq_table[i].frequency = CPUFREQ_ENTRY_INVALID; freq_table_redup()
165 /* sort the frequencies in frequency table in descenting order */ freq_table_sort()
174 max_freq = freq_table[i].frequency; freq_table_sort()
177 freq = freq_table[j].frequency; freq_table_sort()
188 table.frequency = freq_table[i].frequency; freq_table_sort()
190 freq_table[i].frequency = freq_table[ind].frequency; freq_table_sort()
192 freq_table[ind].frequency = table.frequency; freq_table_sort()
244 * the clock is valid if its frequency is not masked qoriq_cpufreq_cpu_init()
245 * and large than minimum allowed frequency. qoriq_cpufreq_cpu_init()
248 table[i].frequency = CPUFREQ_ENTRY_INVALID; qoriq_cpufreq_cpu_init()
250 table[i].frequency = freq / 1000; qoriq_cpufreq_cpu_init()
255 table[i].frequency = CPUFREQ_TABLE_END; qoriq_cpufreq_cpu_init()
257 /* set the min and max frequency properly */ qoriq_cpufreq_cpu_init()
260 pr_err("invalid frequency table: %d\n", ret); qoriq_cpufreq_cpu_init()
360 pr_info("Freescale QorIQ CPU frequency scaling driver\n"); qoriq_cpufreq_init()
H A Dtegra-cpufreq.c31 { .frequency = 216000 },
32 { .frequency = 312000 },
33 { .frequency = 456000 },
34 { .frequency = 608000 },
35 { .frequency = 760000 },
36 { .frequency = 816000 },
37 { .frequency = 912000 },
38 { .frequency = 1000000 },
39 { .frequency = CPUFREQ_TABLE_END },
60 if ((freq_table[index].frequency == ifreq) || (policy->cur == ifreq)) tegra_get_intermediate()
94 unsigned long rate = freq_table[index].frequency; tegra_target()
99 * Vote on memory bus frequency based on cpu frequency tegra_target()
100 * This sets the minimum frequency, display or avp may request higher tegra_target()
117 /* Restore to earlier frequency on error, i.e. pll_x */ tegra_target()
127 * earlier while transitioning to a target frequency. tegra_target()
156 policy->suspend_freq = freq_table[0].frequency; tegra_cpu_init()
H A Dfreq_table.c30 freq = pos->frequency; cpufreq_for_each_valid_entry()
67 freq = pos->frequency; cpufreq_for_each_valid_entry()
91 * Generic routine to verify policy & frequency table, requires driver to set
113 .frequency = 0, cpufreq_frequency_table_target()
117 .frequency = 0, cpufreq_frequency_table_target()
127 suboptimal.frequency = ~0; cpufreq_frequency_table_target()
131 optimal.frequency = ~0; cpufreq_frequency_table_target()
136 freq = pos->frequency; cpufreq_for_each_valid_entry()
148 if (freq >= optimal.frequency) { cpufreq_for_each_valid_entry()
149 optimal.frequency = freq; cpufreq_for_each_valid_entry()
153 if (freq <= suboptimal.frequency) { cpufreq_for_each_valid_entry()
154 suboptimal.frequency = freq; cpufreq_for_each_valid_entry()
161 if (freq <= optimal.frequency) { cpufreq_for_each_valid_entry()
162 optimal.frequency = freq; cpufreq_for_each_valid_entry()
166 if (freq >= suboptimal.frequency) { cpufreq_for_each_valid_entry()
167 suboptimal.frequency = freq; cpufreq_for_each_valid_entry()
174 if (diff < optimal.frequency || cpufreq_for_each_valid_entry()
175 (diff == optimal.frequency && cpufreq_for_each_valid_entry()
176 freq > table[optimal.driver_data].frequency)) { cpufreq_for_each_valid_entry()
177 optimal.frequency = diff; cpufreq_for_each_valid_entry()
191 table[*index].frequency);
204 pr_debug("%s: Unable to find frequency table\n", __func__); cpufreq_frequency_table_get_index()
209 if (pos->frequency == freq) cpufreq_frequency_table_get_index()
243 count += sprintf(&buf[count], "%d ", pos->frequency); cpufreq_for_each_valid_entry()
310 MODULE_DESCRIPTION("CPUfreq frequency table helpers");
H A Dppc_cbe_cpufreq.c33 /* the CBE supports an 8 step frequency scaling */
92 max_freqp = of_get_property(cpu, "clock-frequency", NULL); cbe_cpufreq_cpu_init()
102 pr_debug("max clock-frequency is at %u kHz\n", max_freq); cbe_cpufreq_cpu_init()
103 pr_debug("initializing frequency table\n"); cbe_cpufreq_cpu_init()
105 /* initialize frequency table */ cpufreq_for_each_entry()
107 pos->frequency = max_freq / pos->driver_data; cpufreq_for_each_entry()
108 pr_debug("%d: %d\n", (int)(pos - cbe_freqs), pos->frequency); cpufreq_for_each_entry()
118 policy->cur = cbe_freqs[cur_pmode].frequency;
132 pr_debug("setting frequency for cpu %d to %d kHz, " \ cbe_cpufreq_target()
133 "1/%d of max frequency\n", cbe_cpufreq_target()
135 cbe_freqs[cbe_pmode_new].frequency, cbe_cpufreq_target()
H A Dexynos-cpufreq.c5 * EXYNOS - CPU frequency scaling support for EXYNOS series
37 if (pos->frequency == freq) exynos_cpufreq_get_index()
40 if (pos->frequency == CPUFREQ_TABLE_END) exynos_cpufreq_get_index()
63 * policy and get the index from the raw frequency table. exynos_cpufreq_scale()
84 (freq_table[index].frequency < mpll_freq_khz) && exynos_cpufreq_scale()
85 (freq_table[old_index].frequency < mpll_freq_khz)) exynos_cpufreq_scale()
90 /* When the new frequency is higher than current frequency */ exynos_cpufreq_scale()
92 /* Firstly, voltage up to increase frequency */ exynos_cpufreq_scale()
113 /* When the new frequency is lower than current frequency */ exynos_cpufreq_scale()
116 /* down the voltage after frequency change */ exynos_cpufreq_scale()
134 return exynos_cpufreq_scale(exynos_info->freq_table[index].frequency); exynos_target()
202 /* Done here as we want to capture boot frequency */ exynos_cpufreq_probe()
H A Ds3c64xx-cpufreq.c64 new_freq = s3c64xx_freq_table[index].frequency; s3c64xx_cpufreq_set_target()
103 pr_debug("Set actual frequency %lukHz\n", s3c64xx_cpufreq_set_target()
136 freq->frequency); cpufreq_for_each_valid_entry()
137 freq->frequency = CPUFREQ_ENTRY_INVALID; cpufreq_for_each_valid_entry()
157 pr_err("No frequency information for this CPU\n"); s3c64xx_cpufreq_driver_init()
173 pr_err("Only frequency scaling available\n"); s3c64xx_cpufreq_driver_init()
184 r = clk_round_rate(policy->clk, freq->frequency * 1000); cpufreq_for_each_entry()
186 if (r != freq->frequency) { cpufreq_for_each_entry()
188 freq->frequency); cpufreq_for_each_entry()
189 freq->frequency = CPUFREQ_ENTRY_INVALID; cpufreq_for_each_entry()
193 * frequency is the maximum we can support. */ cpufreq_for_each_entry()
194 if (!vddarm && freq->frequency > clk_get_rate(policy->clk) / 1000) cpufreq_for_each_entry()
195 freq->frequency = CPUFREQ_ENTRY_INVALID; cpufreq_for_each_entry()
205 pr_err("Failed to configure frequency table: %d\n",
H A Dpmac64-cpufreq.c146 * SCOM based frequency switching for 970FX rev3
153 /* If frequency is going up, first ramp up the voltage */ g5_scom_switch_freq()
183 /* If frequency is going down, last ramp the voltage */ g5_scom_switch_freq()
188 ppc_proc_freq = g5_cpu_freqs[speed_mode].frequency * 1000ul; g5_scom_switch_freq()
241 * Platform function based frequency switching for PowerMac7,2 & 7,3
258 /* If frequency is going up, first ramp up the voltage */ g5_pfunc_switch_freq()
287 /* If frequency is going down, last ramp the voltage */ g5_pfunc_switch_freq()
292 ppc_proc_freq = g5_cpu_freqs[speed_mode].frequency * 1000ul; g5_pfunc_switch_freq()
320 return g5_cpu_freqs[g5_pmode_cur].frequency; g5_cpufreq_get_speed()
428 * From what I see, clock-frequency is always the maximal frequency. g5_neo2_cpufreq_init()
434 valp = of_get_property(cpunode, "clock-frequency", NULL); g5_neo2_cpufreq_init()
438 g5_cpu_freqs[0].frequency = max_freq; g5_neo2_cpufreq_init()
439 g5_cpu_freqs[1].frequency = max_freq/2; g5_neo2_cpufreq_init()
447 /* Force apply current frequency to make sure everything is in g5_neo2_cpufreq_init()
456 printk(KERN_INFO "Registering G5 CPU frequency driver\n"); g5_neo2_cpufreq_init()
460 g5_cpu_freqs[1].frequency/1000, g5_neo2_cpufreq_init()
461 g5_cpu_freqs[0].frequency/1000, g5_neo2_cpufreq_init()
462 g5_cpu_freqs[g5_pmode_cur].frequency/1000); g5_neo2_cpufreq_init()
509 if (!of_get_property(hwclock, "platform-get-frequency", NULL)) g5_pm72_cpufreq_init()
523 pmf_find_function(hwclock, "get-frequency"); g5_pm72_cpufreq_init()
525 pmf_find_function(hwclock, "set-frequency-high"); g5_pm72_cpufreq_init()
527 pmf_find_function(hwclock, "set-frequency-low"); g5_pm72_cpufreq_init()
567 /* Get max frequency from device-tree */ g5_pm72_cpufreq_init()
568 valp = of_get_property(cpunode, "clock-frequency", NULL); g5_pm72_cpufreq_init()
570 printk(KERN_ERR "cpufreq: Can't find CPU frequency !\n"); g5_pm72_cpufreq_init()
577 /* Now calculate reduced frequency by using the cpuid input freq g5_pm72_cpufreq_init()
586 printk(KERN_WARNING "cpufreq: No low frequency mode available" g5_pm72_cpufreq_init()
598 printk(KERN_ERR "cpufreq: Can't calculate low frequency !\n"); g5_pm72_cpufreq_init()
602 g5_cpu_freqs[0].frequency = max_freq; g5_pm72_cpufreq_init()
603 g5_cpu_freqs[1].frequency = min_freq; g5_pm72_cpufreq_init()
613 /* Force apply current frequency to make sure everything is in g5_pm72_cpufreq_init()
622 printk(KERN_INFO "Registering G5 CPU frequency driver\n"); g5_pm72_cpufreq_init()
626 g5_cpu_freqs[1].frequency/1000, g5_pm72_cpufreq_init()
627 g5_cpu_freqs[0].frequency/1000, g5_pm72_cpufreq_init()
628 g5_cpu_freqs[g5_pmode_cur].frequency/1000); g5_pm72_cpufreq_init()
H A Dexynos5440-cpufreq.c7 * EXYNOS5440 - CPU frequency scaling support
84 /* frequency unit is 20MHZ */
124 pos->frequency * 1000, true); cpufreq_for_each_entry()
129 pos->frequency); cpufreq_for_each_entry()
133 freq = pos->frequency / 1000; /* In MHZ */ cpufreq_for_each_entry()
186 if (pos->frequency == cur_frequency) cpufreq_for_each_entry()
189 if (pos->frequency == CPUFREQ_TABLE_END) { cpufreq_for_each_entry()
190 dev_crit(dvfs_info->dev, "Boot up frequency not supported\n"); cpufreq_for_each_entry()
191 /* Assign the highest frequency */ cpufreq_for_each_entry()
193 cur_frequency = pos->frequency; cpufreq_for_each_entry()
196 dev_info(dvfs_info->dev, "Setting dvfs initial frequency = %uKHZ",
220 freqs.new = freq_table[index].frequency; exynos_target()
224 /* Set the target frequency in all C0_3_PSTATE register */ exynos_target()
256 freqs.new = freq_table[index].frequency; exynos_cpufreq_work()
258 dev_crit(dvfs_info->dev, "New frequency out of range\n"); exynos_cpufreq_work()
295 tmp_freq = freq_tbl[i].frequency; exynos_sort_descend_freq_table()
296 freq_tbl[i].frequency = freq_tbl[index].frequency; exynos_sort_descend_freq_table()
297 freq_tbl[index].frequency = tmp_freq; exynos_sort_descend_freq_table()
H A Dpxa2xx-cpufreq.c121 MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table, !0 = turbo table)");
131 * Run mode frequency = 13 MHz * L
132 * Turbo mode frequency = 13 MHz * L * N
133 * System bus frequency = 13 MHz * L / (B + 1)
146 * PXA27x Processor Family Developer's Manual to simplify frequency
236 printk(KERN_INFO "PXA CPU 27x max frequency not defined " pxa27x_guess_max_freq()
286 pr_debug("Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n", pxa_set_target()
345 * Even if voltage setting fails, we don't report it, as the frequency pxa_set_target()
379 pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz; pxa_cpufreq_init()
382 pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END; pxa_cpufreq_init()
386 pxa255_turbo_freq_table[i].frequency = pxa_cpufreq_init()
390 pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; pxa_cpufreq_init()
399 pxa27x_freq_table[i].frequency = freq; pxa_cpufreq_init()
403 pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END; pxa_cpufreq_init()
411 pr_info("PXA255 cpufreq using %s frequency table\n", pxa_cpufreq_init()
420 printk(KERN_INFO "PXA CPU frequency change support initialized\n"); pxa_cpufreq_init()
449 MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture");
H A Ds3c2416-cpufreq.c50 /* pseudo-frequency for dvs mode */
53 /* frequency to sleep and reboot in
97 /* return our pseudo-frequency when in dvs mode */ s3c2416_cpufreq_get_speed()
191 /* force armdiv to hclk frequency for transition from dvs*/ s3c2416_cpufreq_leave_dvs()
193 pr_debug("cpufreq: force armdiv to hclk frequency (%lukHz)\n", s3c2416_cpufreq_leave_dvs()
246 : s3c_freq->freq_table[index].frequency; s3c2416_cpufreq_set_target()
294 pos->frequency); s3c2416_cpufreq_cfg_regulator()
295 pos->frequency = CPUFREQ_ENTRY_INVALID; s3c2416_cpufreq_cfg_regulator()
361 pr_info("cpufreq: msysclk running at %lukHz, using S3C2416 frequency table\n", s3c2416_cpufreq_driver_init()
366 pr_info("cpufreq: msysclk running at %lukHz, using S3C2450 frequency table\n", s3c2416_cpufreq_driver_init()
376 pr_err("cpufreq: No frequency information for this CPU, msysclk at %lukHz\n", s3c2416_cpufreq_driver_init()
433 pos->frequency); s3c2416_cpufreq_driver_init()
434 pos->frequency = CPUFREQ_ENTRY_INVALID; s3c2416_cpufreq_driver_init()
442 pos->frequency * 1000); s3c2416_cpufreq_driver_init()
444 if (rate != pos->frequency) { s3c2416_cpufreq_driver_init()
446 pos->frequency, rate); s3c2416_cpufreq_driver_init()
447 pos->frequency = CPUFREQ_ENTRY_INVALID; s3c2416_cpufreq_driver_init()
H A Dmaple-cpufreq.c76 * SCOM based frequency switching for 970FX rev3
110 ppc_proc_freq = maple_cpu_freqs[speed_mode].frequency * 1000ul; maple_scom_switch_freq()
139 return maple_cpu_freqs[maple_pmode_cur].frequency; maple_cpufreq_get_speed()
204 * From what I see, clock-frequency is always the maximal frequency. maple_cpufreq_init()
210 valp = of_get_property(cpunode, "clock-frequency", NULL); maple_cpufreq_init()
214 maple_cpu_freqs[0].frequency = max_freq; maple_cpufreq_init()
215 maple_cpu_freqs[1].frequency = max_freq/2; maple_cpufreq_init()
217 /* Force apply current frequency to make sure everything is in maple_cpufreq_init()
225 printk(KERN_INFO "Registering Maple CPU frequency driver\n"); maple_cpufreq_init()
227 maple_cpu_freqs[1].frequency/1000, maple_cpufreq_init()
228 maple_cpu_freqs[0].frequency/1000, maple_cpufreq_init()
229 maple_cpu_freqs[maple_pmode_cur].frequency/1000); maple_cpufreq_init()
H A Dblackfin-cpufreq.c26 .frequency = CPUFREQ_TABLE_END,
30 .frequency = CPUFREQ_TABLE_END,
34 .frequency = CPUFREQ_TABLE_END,
38 .frequency = CPUFREQ_TABLE_END,
50 * normalized to maximum frequency offset for CYCLES,
81 bfin_freq_table[index].frequency = cclk >> index; bfin_init_tables()
90 bfin_freq_table[index].frequency, bfin_init_tables()
145 new_freq = bfin_freq_table[index].frequency; bfin_target()
H A Delanfreq.c38 int clock; /* frequency in kHz */
74 * Finds out at which frequency the CPU of the Elan SOC runs
120 * Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency) elanfreq_target()
163 if (pos->frequency > max_freq) elanfreq_cpu_init()
164 pos->frequency = CPUFREQ_ENTRY_INVALID; elanfreq_cpu_init()
179 * to set the maximum CPU frequency to 66 MHz. Note that in
181 * frequency will fall back to _current_ CPU frequency which
H A Ddbx500-cpufreq.c25 /* update armss clk frequency */ dbx500_cpufreq_target()
26 return clk_set_rate(armss_clk, freq_table[index].frequency * 1000); dbx500_cpufreq_target()
64 pr_info(" %d Mhz\n", pos->frequency / 1000); dbx500_cpufreq_probe()
H A Damd_freq_sensitivity.c2 * amd_freq_sensitivity.c: AMD frequency sensitivity feedback powersave bias
63 /* counter wrapped around, so stay on current frequency */ amd_powersave_bias_target()
72 /* divide by 0, so stay on current frequency as well */ amd_powersave_bias_target()
98 freq_next = od_info->freq_table[index].frequency; amd_powersave_bias_target()
146 MODULE_DESCRIPTION("AMD frequency sensitivity feedback powersave bias for "
H A Dspeedstep-centrino.c81 frequency/voltage operating point; frequency in MHz, volts in mV.
85 .frequency = (mhz) * 1000, \
102 { .frequency = CPUFREQ_TABLE_END }
112 { .frequency = CPUFREQ_TABLE_END }
123 { .frequency = CPUFREQ_TABLE_END }
136 { .frequency = CPUFREQ_TABLE_END }
147 { .frequency = CPUFREQ_TABLE_END }
158 { .frequency = CPUFREQ_TABLE_END }
170 { .frequency = CPUFREQ_TABLE_END }
182 { .frequency = CPUFREQ_TABLE_END }
194 { .frequency = CPUFREQ_TABLE_END }
206 /* CPU models, their operating frequency range, and freq/voltage
261 pr_debug("found \"%s\": max frequency: %dkHz\n", centrino_cpu_init_table()
307 per_cpu(centrino_model, cpu)->op_points[i].frequency extract_clock()
312 op_points[i].frequency; extract_clock()
315 return per_cpu(centrino_model, cpu)->op_points[i-1].frequency; extract_clock()
320 /* Return the current CPU frequency in kHz */ get_cur_freq()
417 * @index: index of target frequency
489 * We have failed halfway through the frequency change. centrino_target()
H A Dpasemi-cpufreq.c188 max_freqp = of_get_property(cpu, "clock-frequency", NULL); pas_cpufreq_cpu_init()
197 pr_debug("max clock-frequency is at %u kHz\n", max_freq); pas_cpufreq_cpu_init()
198 pr_debug("initializing frequency table\n"); pas_cpufreq_cpu_init()
200 /* initialize frequency table */ cpufreq_for_each_entry()
202 pos->frequency = get_astate_freq(pos->driver_data) * 100000; cpufreq_for_each_entry()
203 pr_debug("%d: %d\n", (int)(pos - pas_freqs), pos->frequency); cpufreq_for_each_entry()
209 policy->cur = pas_freqs[cur_astate].frequency;
245 pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n", pas_cpufreq_target()
247 pas_freqs[pas_astate_new].frequency, pas_cpufreq_target()
255 ppc_proc_freq = pas_freqs[pas_astate_new].frequency * 1000ul; pas_cpufreq_target()
H A Dimx6q-cpufreq.c48 new_freq = freq_table[index].frequency; imx6q_set_target()
68 /* scaling up? scale voltage before frequency */ imx6q_set_target()
92 * reprogram PLL for frequency scaling. The procedure of reprogramming imx6q_set_target()
114 /* scaling down? scale voltage after frequency */ imx6q_set_target()
240 * Each OPP is a set of tuples consisting of frequency and imx6q_cpufreq_probe()
252 if (freq_table[j].frequency == freq) { imx6q_cpufreq_probe()
265 if (freq_table[num - 1].frequency * 1000 == FREQ_1P2_GHZ) imx6q_cpufreq_probe()
286 * OPP is maintained in order of increasing frequency, and imx6q_cpufreq_probe()
292 freq_table[0].frequency * 1000, true); imx6q_cpufreq_probe()
295 freq_table[--num].frequency * 1000, true); imx6q_cpufreq_probe()
H A Dpowernow-k6.c36 MODULE_PARM_DESC(bus_frequency, "Bus frequency in kHz");
80 * Returns the current setting of the frequency multiplier. Core clock
81 * speed is frequency of the Front-Side Bus multiplied with this value.
111 * frequency, so we must disable cache. powernow_k6_set_cpu_multiplier()
144 printk(KERN_ERR PFX "invalid target frequency\n"); powernow_k6_target()
183 printk(KERN_WARNING "powernow-k6: unknown frequency %u, cannot determine current multiplier\n", khz);
208 pos->frequency = CPUFREQ_ENTRY_INVALID; cpufreq_for_each_entry()
210 pos->frequency = busfreq * f; cpufreq_for_each_entry()
224 for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) { powernow_k6_cpu_exit()
229 freqs.new = clock_ratio[i].frequency; powernow_k6_cpu_exit()
H A Dls1x-cpufreq.c52 new_freq = policy->freq_table[index].frequency; ls1x_cpufreq_target()
96 freq_tbl[i].frequency = CPUFREQ_ENTRY_INVALID; ls1x_cpufreq_init()
98 freq_tbl[i].frequency = freq; ls1x_cpufreq_init()
100 "cpufreq table: index %d: frequency %d\n", i, ls1x_cpufreq_init()
101 freq_tbl[i].frequency); ls1x_cpufreq_init()
103 freq_tbl[i].frequency = CPUFREQ_TABLE_END; ls1x_cpufreq_init()
H A Dcpufreq_userspace.c25 * cpufreq_set - set the CPU frequency
27 * @freq: target frequency in kHz
29 * Sets the CPU frequency to freq.
H A De_powersaver.c101 /* Return current frequency */ eps_get()
165 /* Make frequency transition */ eps_target()
280 "frequency then its maximum. Aborting.\n"); eps_cpu_init()
334 /* Allocate private data and frequency table for current cpu */ eps_cpu_init()
348 /* Fill frequency and MSR value table */ eps_cpu_init()
351 f_table[0].frequency = fsb * min_multiplier; eps_cpu_init()
353 f_table[1].frequency = fsb * max_multiplier; eps_cpu_init()
355 f_table[2].frequency = CPUFREQ_TABLE_END; eps_cpu_init()
362 f_table[k].frequency = fsb * i; eps_cpu_init()
366 f_table[k].frequency = CPUFREQ_TABLE_END; eps_cpu_init()
423 /* Allow user to overclock his machine or to change frequency to higher after
426 MODULE_PARM_DESC(freq_failsafe_off, "Disable current vs max frequency check");
H A Dlongrun.c155 * longrun_determine_freqs - determines the lowest and highest possible core frequency
156 * @low_freq: an int to put the lowest frequency into
157 * @high_freq: an int to put the highest frequency into
179 * For minimum frequency, read out the maximum longrun_determine_freqs()
181 * selected level", and read out the frequency. longrun_determine_freqs()
182 * For maximum frequency, read out level zero. longrun_determine_freqs()
206 pr_debug("high frequency is %u kHz\n", *high_freq); longrun_determine_freqs()
248 pr_debug("low frequency is %u kHz\n", *low_freq); longrun_determine_freqs()
265 /* detect low and high frequency */ longrun_cpu_init()
H A Dloongson2_cpufreq.c64 /* setting the cpu frequency */ loongson2_cpufreq_target()
91 (loongson2_clockmod_table[i].frequency != CPUFREQ_TABLE_END); loongson2_cpufreq_cpu_init()
93 loongson2_clockmod_table[i].frequency = (rate * i) / 8; loongson2_cpufreq_cpu_init()
166 pr_info("cpufreq: Loongson-2F CPU frequency driver.\n"); cpufreq_init()
H A Dsh-cpufreq.c65 dev_dbg(dev, "requested frequency %u Hz\n", target_freq * 1000); sh_cpufreq_target()
76 dev_dbg(dev, "set frequency %lu Hz\n", freq); sh_cpufreq_target()
122 dev_notice(dev, "no frequency table found, falling back " sh_cpufreq_cpu_init()
163 pr_notice("SuperH CPU frequency driver.\n"); sh_cpufreq_module_init()
H A Dspeedstep-smi.c41 * There are only two frequency states for each processor. Values
93 * @low: the low frequency value is placed here
94 * @high: the high frequency value is placed here
145 * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
164 pr_debug("trying to set frequency to state %u " speedstep_set_state()
204 (speedstep_freqs[new_state].frequency / 1000), speedstep_set_state()
245 /* detect low and high frequency */ speedstep_cpu_init()
246 low = &speedstep_freqs[SPEEDSTEP_LOW].frequency; speedstep_cpu_init()
247 high = &speedstep_freqs[SPEEDSTEP_HIGH].frequency; speedstep_cpu_init()
H A Darm_big_little.c61 static unsigned int clk_little_max; /* Maximum clock frequency (Little) */
192 /* Set clock frequency */ bL_cpufreq_set_target()
202 freqs_new = freq_table[cur_cluster][index].frequency; bL_cpufreq_set_target()
221 for (count = 0; table[count].frequency != CPUFREQ_TABLE_END; count++) get_table_count()
227 /* get the minimum frequency in the cpufreq_frequency_table */ get_table_min()
233 if (pos->frequency < min_freq) get_table_min()
234 min_freq = pos->frequency; get_table_min()
238 /* get the maximum frequency in the cpufreq_frequency_table */ get_table_max()
244 if (pos->frequency > max_freq) get_table_max()
245 max_freq = pos->frequency; get_table_max()
265 for (j = 0; freq_table[i][j].frequency != CPUFREQ_TABLE_END; merge_cluster_tables()
267 table[k].frequency = VIRT_FREQ(i, merge_cluster_tables()
268 freq_table[i][j].frequency); merge_cluster_tables()
270 table[k].frequency); merge_cluster_tables()
276 table[k].frequency = CPUFREQ_TABLE_END; merge_cluster_tables()
H A Dpowernv-cpufreq.c125 powernv_freqs[i].frequency = freq * 1000; /* kHz */ init_powernv_pstates()
129 powernv_freqs[i].frequency = CPUFREQ_TABLE_END; init_powernv_pstates()
139 /* Returns the CPU frequency corresponding to the pstate_id. */ pstate_id_to_freq()
152 return powernv_freqs[i].frequency; pstate_id_to_freq()
156 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
218 * powernv_read_cpu_freq: Reads the current frequency on this CPU.
225 * The current frequency on this CPU will be returned via
244 pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n", powernv_read_cpu_freq()
250 * powernv_cpufreq_get: Returns the CPU frequency as reported by the
324 pr_info("Pstate set to safe frequency\n"); powernv_cpufreq_throttle_check()
340 * powernv_cpufreq_target_index: Sets the frequency corresponding to
H A Dp4-clockmod.c129 "voltage scaling in addition to frequency " cpufreq_p4_get_frequency()
150 /* on P-4s, the TSC runs with constant frequency independent whether cpufreq_p4_get_frequency()
157 "voltage scaling in addition of frequency scaling. " cpufreq_p4_get_frequency()
191 /* switch to maximum frequency and measure result */ cpufreq_p4_cpu_init()
195 /* get max frequency */ cpufreq_p4_cpu_init()
201 for (i = 1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) { cpufreq_p4_cpu_init()
203 p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID; cpufreq_p4_cpu_init()
205 p4clockmod_table[i].frequency = (stock_freq * i)/8; cpufreq_p4_cpu_init()
H A Dpowernow-k7.c12 * CPU with half frequency multipliers may hang upon wakeup from disconnect.
150 printk("frequency"); check_powernow()
169 powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; invalidate_entry()
187 powernow_table[j].frequency = (fsb * fid_codes[fid]) / 10; get_ranges()
190 speed = powernow_table[j].frequency; get_ranges()
213 powernow_table[number_scales].frequency = CPUFREQ_TABLE_END; get_ranges()
258 * the cpufreq frequency table in powernow_decode_bios, powernow_target()
269 freqs.new = powernow_table[index].frequency; powernow_target()
371 powernow_table[i].frequency = fsb * fid_codes[fid] / 10; powernow_acpi_init()
375 speed = powernow_table[i].frequency; powernow_acpi_init()
402 pr_debug(" Corrected ACPI frequency to %d\n", powernow_acpi_init()
415 powernow_table[i].frequency = CPUFREQ_TABLE_END; powernow_acpi_init()
534 * We use the fact that the bus frequency is somehow
619 printk(KERN_WARNING PFX "can not determine bus frequency\n"); powernow_cpu_init()
H A Domap-cpufreq.c2 * CPU frequency scaling for OMAP using OPP information
50 new_freq = freq_table[index].frequency; omap_target()
56 "CPUfreq: Cannot find matching frequency for %lu\n", omap_target()
81 /* scaling up? scale voltage before frequency */ omap_target()
93 /* scaling down? scale voltage after frequency */ omap_target()
H A Dsparc-us3-cpufreq.c1 /* us3_cpufreq.c: UltraSPARC-III cpu frequency support
143 table[0].frequency = clock_tick / 1; us3_freq_cpu_init()
145 table[1].frequency = clock_tick / 2; us3_freq_cpu_init()
147 table[2].frequency = clock_tick / 32; us3_freq_cpu_init()
149 table[3].frequency = CPUFREQ_TABLE_END; us3_freq_cpu_init()
H A Dsparc-us2e-cpufreq.c1 /* us2e_cpufreq.c: UltraSPARC-IIe cpu frequency support
284 table[0].frequency = clock_tick / 1; us2e_freq_cpu_init()
286 table[1].frequency = clock_tick / 2; us2e_freq_cpu_init()
288 table[2].frequency = clock_tick / 4; us2e_freq_cpu_init()
290 table[2].frequency = clock_tick / 6; us2e_freq_cpu_init()
292 table[2].frequency = clock_tick / 8; us2e_freq_cpu_init()
294 table[3].frequency = CPUFREQ_TABLE_END; us2e_freq_cpu_init()
H A Dspeedstep-ich.c48 * There are only two frequency states for each processor. Values
87 * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
247 pr_debug("detected %u kHz as current frequency\n", speed); speedstep_get()
254 * @index: index of target frequency
282 &speedstep_freqs[SPEEDSTEP_LOW].frequency, get_freqs_on_cpu()
283 &speedstep_freqs[SPEEDSTEP_HIGH].frequency, get_freqs_on_cpu()
299 /* detect low and high frequency and transition latency */ speedstep_cpu_init()
H A Dcpufreq_conservative.c40 * (default), then we try to increase frequency. Every sampling_rate *
42 * (default), then we try to decrease frequency
44 * Any frequency increase takes it to the maximum frequency. Frequency reduction
45 * happens at minimum steps of 5% (default) of maximum frequency
61 /* Check for frequency increase */ cs_check_cpu()
84 /* Check for frequency decrease */ cs_check_cpu()
88 * if we cannot reduce the frequency anymore, break out early cs_check_cpu()
142 * ranges of frequency available to us otherwise we do not change it dbs_cpufreq_notifier()
H A Dpmac32-cpufreq.c62 * Different models uses different mechanisms to switch the frequency
77 /* There are only two frequency states for each processor. Values
166 /* set frequency */ dfs_set_cpu_speed()
203 /* Set frequency */ gpios_set_cpu_speed()
454 "frequency-gpio"); pmac_cpufreq_init_MacRISC3()
474 /* If we use the frequency GPIOs, calculate the min/max speeds based pmac_cpufreq_init_MacRISC3()
499 * frequency, it claims it to be around 84Mhz on some models while pmac_cpufreq_init_MacRISC3()
523 value = of_get_property(cpunode, "min-clock-frequency", NULL); pmac_cpufreq_init_MacRISC3()
532 value = of_get_property(cpunode, "max-clock-frequency", NULL); pmac_cpufreq_init_MacRISC3()
557 /* OF only reports the high frequency */ pmac_cpufreq_init_7447A()
561 /* Read actual frequency from CPU */ pmac_cpufreq_init_7447A()
579 value = of_get_property(cpunode, "reduced-clock-frequency", NULL); pmac_cpufreq_init_750FX()
623 value = of_get_property(cpunode, "clock-frequency", NULL); pmac_cpufreq_setup()
657 * they both have 300 MHz as low frequency pmac_cpufreq_setup()
674 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq; pmac_cpufreq_setup()
675 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq; pmac_cpufreq_setup()
678 printk(KERN_INFO "Registering PowerMac CPU frequency driver\n"); pmac_cpufreq_setup()
H A Dpxa3xx-cpufreq.c102 table[i].frequency = freqs[i].cpufreq_mhz * 1000; setup_freqs_table()
105 table[num].frequency = CPUFREQ_TABLE_END; setup_freqs_table()
195 pr_err("failed to setup frequency table\n"); pxa3xx_cpufreq_init()
227 MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx");
/linux-4.1.27/arch/alpha/include/asm/
H A Dparam.h9 # define CLOCKS_PER_SEC USER_HZ /* frequency at which times() counts */
/linux-4.1.27/drivers/media/dvb-frontends/
H A Dtda665x.c33 u32 frequency; member in struct:tda665x_state
78 tstate->frequency = state->frequency; tda665x_get_state()
120 u32 frequency, status = 0; tda665x_set_state() local
126 frequency = tstate->frequency; tda665x_set_state()
127 if ((frequency < config->frequency_max) || (frequency > config->frequency_min)) { tda665x_set_state()
128 printk(KERN_ERR "%s: Frequency beyond limits, frequency=%d\n", __func__, frequency); tda665x_set_state()
132 frequency += config->frequency_offst; tda665x_set_state()
133 frequency *= config->ref_multiplier; tda665x_set_state()
134 frequency += config->ref_divider >> 1; tda665x_set_state()
135 frequency /= config->ref_divider; tda665x_set_state()
137 buf[0] = (u8) ((frequency & 0x7f00) >> 8); tda665x_set_state()
138 buf[1] = (u8) (frequency & 0x00ff) >> 0; tda665x_set_state()
142 /* restore frequency */ tda665x_set_state()
143 frequency = tstate->frequency; tda665x_set_state()
145 if (frequency < 153000000) { tda665x_set_state()
148 if (frequency < 68000000) tda665x_set_state()
150 if (frequency < 1040000000) tda665x_set_state()
152 if (frequency < 1250000000) tda665x_set_state()
156 } else if (frequency < 438000000) { tda665x_set_state()
159 if (frequency < 230000000) tda665x_set_state()
161 if (frequency < 300000000) tda665x_set_state()
168 if (frequency < 470000000) tda665x_set_state()
170 if (frequency < 526000000) tda665x_set_state()
191 state->frequency = frequency; /* cache successful state */ tda665x_set_state()
H A Dtdhd1.h51 div = (p->frequency + 36166666) / 166666; alps_tdhd1_204a_tuner_set_params()
57 if (p->frequency >= 174000000 && p->frequency <= 230000000) alps_tdhd1_204a_tuner_set_params()
59 else if (p->frequency >= 470000000 && p->frequency <= 823000000) alps_tdhd1_204a_tuner_set_params()
61 else if (p->frequency > 823000000 && p->frequency <= 862000000) alps_tdhd1_204a_tuner_set_params()
H A Dtda8261.c35 u32 frequency; member in struct:tda8261_state
95 tstate->frequency = state->frequency; tda8261_get_state()
115 u32 frequency, N, status = 0; tda8261_set_state() local
122 * Max VCO Frequency = VCO frequency + (channel spacing - 1) tda8261_set_state()
125 frequency = tstate->frequency; tda8261_set_state()
126 if ((frequency < 950000) || (frequency > 2150000)) { tda8261_set_state()
127 pr_warn("%s: Frequency beyond limits, frequency=%d\n", __func__, frequency); tda8261_set_state()
130 N = (frequency + (div_tab[config->step_size] - 1)) / div_tab[config->step_size]; tda8261_set_state()
138 if (frequency < 1450000) tda8261_set_state()
140 else if (frequency < 2000000) tda8261_set_state()
142 else if (frequency < 2150000) tda8261_set_state()
160 state->frequency = frequency; /* cache successful state */ tda8261_set_state()
H A Dtda8261_cfg.h20 static int tda8261_get_frequency(struct dvb_frontend *fe, u32 *frequency) tda8261_get_frequency() argument
33 *frequency = t_state.frequency; tda8261_get_frequency()
34 printk("%s: Frequency=%d\n", __func__, t_state.frequency); tda8261_get_frequency()
39 static int tda8261_set_frequency(struct dvb_frontend *fe, u32 frequency) tda8261_set_frequency() argument
46 t_state.frequency = frequency; tda8261_set_frequency()
55 printk("%s: Frequency=%d\n", __func__, t_state.frequency); tda8261_set_frequency()
H A Dix2505v.c40 u32 frequency; member in struct:ix2505v_state
136 u32 frequency = c->frequency; ix2505v_set_params() local
143 if ((frequency < fe->ops.info.frequency_min) ix2505v_set_params()
144 || (frequency > fe->ops.info.frequency_max)) ix2505v_set_params()
161 div_factor = (frequency * ref) / 40; /* local osc = 4Mhz */ ix2505v_set_params()
170 deb_info("Frq=%d x=%d N=%d A=%d\n", frequency, x, N, A); ix2505v_set_params()
172 if (frequency <= 1065000) ix2505v_set_params()
174 else if (frequency <= 1170000) ix2505v_set_params()
176 else if (frequency <= 1300000) ix2505v_set_params()
178 else if (frequency <= 1445000) ix2505v_set_params()
180 else if (frequency <= 1607000) ix2505v_set_params()
182 else if (frequency <= 1778000) ix2505v_set_params()
184 else if (frequency <= 1942000) ix2505v_set_params()
186 else /*frequency up to 2150000*/ ix2505v_set_params()
247 state->frequency = frequency; ix2505v_set_params()
252 static int ix2505v_get_frequency(struct dvb_frontend *fe, u32 *frequency) ix2505v_get_frequency() argument
256 *frequency = state->frequency; ix2505v_get_frequency()
H A Dtua6100.c42 u32 frequency; member in struct:tua6100_priv
88 if (c->frequency < 2000000) tua6100_set_params()
94 if (c->frequency < 1630000) tua6100_set_params()
101 if (c->frequency >= 1525000) tua6100_set_params()
107 if (c->frequency < 1455000) tua6100_set_params()
109 else if (c->frequency < 1630000) tua6100_set_params()
115 * The N divisor ratio (note: c->frequency is in kHz, but we tua6100_set_params()
118 prediv = (c->frequency * _R) / (_ri / 1000); tua6100_set_params()
123 priv->frequency = ((div * _P) * (_ri / 1000)) / _R; tua6100_set_params()
153 static int tua6100_get_frequency(struct dvb_frontend *fe, u32 *frequency) tua6100_get_frequency() argument
156 *frequency = priv->frequency; tua6100_get_frequency()
H A Dstb6100_cfg.h22 static int stb6100_get_frequency(struct dvb_frontend *fe, u32 *frequency) stb6100_get_frequency() argument
35 *frequency = t_state.frequency; stb6100_get_frequency()
40 static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency) stb6100_set_frequency() argument
47 t_state.frequency = frequency; stb6100_set_frequency()
H A Dstb6100_proc.h20 static int stb6100_get_freq(struct dvb_frontend *fe, u32 *frequency) stb6100_get_freq() argument
40 *frequency = state.frequency; stb6100_get_freq()
46 static int stb6100_set_freq(struct dvb_frontend *fe, u32 frequency) stb6100_set_freq() argument
53 state.frequency = frequency; stb6100_set_freq()
H A Dzl10036.c48 u32 frequency; member in struct:zl10036_state
184 static int zl10036_set_frequency(struct zl10036_state *state, u32 frequency) zl10036_set_frequency() argument
189 div = (frequency + _FR/2) / _FR; zl10036_set_frequency()
190 state->frequency = div * _FR; zl10036_set_frequency()
192 foffset = frequency - state->frequency; zl10036_set_frequency()
198 frequency, state->frequency, foffset, div); zl10036_set_frequency()
313 u32 frequency = p->frequency; zl10036_set_params() local
320 if ((frequency < fe->ops.info.frequency_min) zl10036_set_params()
321 || (frequency > fe->ops.info.frequency_max)) zl10036_set_params()
338 if (frequency < 950000) zl10036_set_params()
340 else if (frequency < 1250000) zl10036_set_params()
342 else if (frequency < 1750000) zl10036_set_params()
344 else if (frequency < 2175000) zl10036_set_params()
356 ret = zl10036_set_frequency(state, p->frequency); zl10036_set_params()
384 static int zl10036_get_frequency(struct dvb_frontend *fe, u32 *frequency) zl10036_get_frequency() argument
388 *frequency = state->frequency; zl10036_get_frequency()
H A Dstb6100.c307 static int stb6100_get_frequency(struct dvb_frontend *fe, u32 *frequency) stb6100_get_frequency() argument
324 *frequency = state->frequency = fvco >> (odiv + 1); stb6100_get_frequency()
327 "frequency = %u kHz, odiv = %u, psd2 = %u, fxtal = %u kHz, fvco = %u kHz, N(I) = %u, N(F) = %u", stb6100_get_frequency()
328 state->frequency, odiv, psd2, state->reference, fvco, nint, nfrac); stb6100_get_frequency()
333 static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency) stb6100_set_frequency() argument
366 if (frequency <= 1075000) stb6100_set_frequency()
376 (ptr->val_high != 0) && !CHKRANGE(frequency, ptr->val_low, ptr->val_high); stb6100_set_frequency()
380 printk(KERN_ERR "%s: frequency out of range: %u kHz\n", __func__, frequency); stb6100_set_frequency()
388 if ((frequency > 1075000) && (frequency <= 1325000)) stb6100_set_frequency()
393 fvco = frequency << (1 + odiv); stb6100_set_frequency()
443 "frequency = %u, srate = %u, g = %u, odiv = %u, psd2 = %u, fxtal = %u, osm = %u, fvco = %u, N(I) = %u, N(F) = %u", stb6100_set_frequency()
444 frequency, srate, (unsigned int)g, (unsigned int)odiv, stb6100_set_frequency()
518 stb6100_get_frequency(fe, &state->frequency); stb6100_get_state()
544 stb6100_set_frequency(fe, state->frequency); stb6100_set_state()
545 tstate->frequency = state->frequency; stb6100_set_state()
H A Dstb6000.c41 u32 frequency; member in struct:stb6000_priv
96 freq_mhz = p->frequency / 1000; stb6000_set_params()
175 priv->frequency = freq_mhz * 1000; stb6000_set_params()
182 static int stb6000_get_frequency(struct dvb_frontend *fe, u32 *frequency) stb6000_get_frequency() argument
185 *frequency = priv->frequency; stb6000_get_frequency()
H A Dtda826x.c41 u32 frequency; member in struct:tda826x_priv
87 div = (p->frequency + (1000-1)) / 1000; tda826x_set_params()
120 priv->frequency = div * 1000; tda826x_set_params()
125 static int tda826x_get_frequency(struct dvb_frontend *fe, u32 *frequency) tda826x_get_frequency() argument
128 *frequency = priv->frequency; tda826x_get_frequency()
H A Dlgs8gxx.h57 /* A/D Clock frequency */
60 /* IF frequency */
72 /*IF use Negative center frequency*/
H A Ddvb-pll.c39 /* cached frequency/bandwidth */
40 u32 frequency; member in struct:dvb_pll_priv
564 const u32 frequency) dvb_pll_configure()
571 if (frequency && (frequency < desc->min || frequency > desc->max)) dvb_pll_configure()
575 if (frequency > desc->entries[i].limit) dvb_pll_configure()
582 frequency, i, desc->count); dvb_pll_configure()
586 div = (frequency + desc->iffreq + dvb_pll_configure()
600 // calculate the frequency we set it to dvb_pll_configure()
646 u32 frequency = 0; dvb_pll_set_params() local
651 result = dvb_pll_configure(fe, buf, c->frequency); dvb_pll_set_params()
655 frequency = result; dvb_pll_set_params()
663 priv->frequency = frequency; dvb_pll_set_params()
675 u32 frequency = 0; dvb_pll_calc_regs() local
680 result = dvb_pll_configure(fe, buf + 1, c->frequency); dvb_pll_calc_regs()
684 frequency = result; dvb_pll_calc_regs()
688 priv->frequency = frequency; dvb_pll_calc_regs()
694 static int dvb_pll_get_frequency(struct dvb_frontend *fe, u32 *frequency) dvb_pll_get_frequency() argument
697 *frequency = priv->frequency; dvb_pll_get_frequency()
563 dvb_pll_configure(struct dvb_frontend *fe, u8 *buf, const u32 frequency) dvb_pll_configure() argument
H A Datbm8830.h49 /* Oscillator clock frequency */
52 /* IF frequency */
H A Dcx24113.c97 u32 frequency; member in struct:cx24113_state
310 s32 freq_hz = state->frequency * 1000; cx24113_calc_pll_nf()
318 if (state->frequency >= 1100000) cx24113_calc_pll_nf()
323 if (state->frequency >= 1165000) cx24113_calc_pll_nf()
344 cx_err("strange frequency: N < 6\n"); cx24113_calc_pll_nf()
393 static int cx24113_set_frequency(struct cx24113_state *state, u32 frequency) cx24113_set_frequency() argument
405 state->frequency = frequency; cx24113_set_frequency()
407 dprintk("tuning to frequency: %d\n", frequency); cx24113_set_frequency()
493 cx24113_set_frequency(state, c->frequency); cx24113_set_params()
523 static int cx24113_get_frequency(struct dvb_frontend *fe, u32 *frequency) cx24113_get_frequency() argument
526 *frequency = state->frequency; cx24113_get_frequency()
H A Dts2020.c35 u32 frequency; member in struct:ts2020_priv
236 u32 frequency = c->frequency; ts2020_set_params() local
244 /* Calculate frequency divider */ ts2020_set_params()
245 if (frequency < priv->frequency_div) { ts2020_set_params()
248 ndiv = (frequency * 14 * 4) / TS2020_XTAL_FREQ; ts2020_set_params()
250 ndiv = (frequency * 14 * 2) / TS2020_XTAL_FREQ; ts2020_set_params()
263 /* Set frequency divider */ ts2020_set_params()
342 priv->frequency = offset_khz; ts2020_set_params()
347 static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency) ts2020_get_frequency() argument
350 *frequency = priv->frequency; ts2020_get_frequency()
355 static int ts2020_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) ts2020_get_if_frequency() argument
357 *frequency = 0; /* Zero-IF */ ts2020_get_if_frequency()
H A Dstv6110.c238 static int stv6110_get_frequency(struct dvb_frontend *fe, u32 *frequency) stv6110_get_frequency() argument
258 *frequency = freq; stv6110_get_frequency()
263 static int stv6110_set_frequency(struct dvb_frontend *fe, u32 frequency) stv6110_set_frequency() argument
273 frequency, priv->mclk); stv6110_set_frequency()
291 if (frequency <= 1023000) { stv6110_set_frequency()
294 } else if (frequency <= 1300000) { stv6110_set_frequency()
297 } else if (frequency <= 2046000) { stv6110_set_frequency()
324 divider = (((frequency * 1000) + (ref >> 1)) / ref); stv6110_set_frequency()
365 stv6110_set_frequency(fe, c->frequency); stv6110_set_params()
H A Dstv6110x.c118 static int stv6110x_set_frequency(struct dvb_frontend *fe, u32 frequency) stv6110x_set_frequency() argument
127 if (frequency <= 1023000) { stv6110x_set_frequency()
131 } else if (frequency <= 1300000) { stv6110x_set_frequency()
135 } else if (frequency <= 2046000) { stv6110x_set_frequency()
154 divider = (frequency * R_DIV(rDivOpt) * pVal) / REFCLOCK_kHz; stv6110x_set_frequency()
179 static int stv6110x_get_frequency(struct dvb_frontend *fe, u32 *frequency) stv6110x_get_frequency() argument
186 *frequency = (MAKEWORD16(STV6110x_GETFIELD(TNG1_N_DIV_11_8, stv6110x->regs[STV6110x_TNG1]), stv6110x_get_frequency()
189 *frequency /= (1 << (STV6110x_GETFIELD(TNG1_R_DIV, stv6110x->regs[STV6110x_TNG1]) + stv6110x_get_frequency()
192 *frequency >>= 2; stv6110x_get_frequency()
H A Dbsbe1.h81 if ((p->frequency < 950000) || (p->frequency > 2150000)) alps_bsbe1_tuner_set_params()
84 div = p->frequency / 1000; alps_bsbe1_tuner_set_params()
H A Dstb0899_drv.h49 IQ_SWAP_ON = -1, /* the derotator frequency register */
137 int (*tuner_set_frequency)(struct dvb_frontend *fe, u32 frequency);
138 int (*tuner_get_frequency)(struct dvb_frontend *fe, u32 *frequency);
H A Dbsru6.h112 if ((p->frequency < 950000) || (p->frequency > 2150000)) alps_bsru6_tuner_set_params()
115 div = (p->frequency + (125 - 1)) / 125; /* round correctly */ alps_bsru6_tuner_set_params()
121 if (p->frequency > 1530000) alps_bsru6_tuner_set_params()
H A Dmn88472.h48 * Xtal frequency.
H A Dmn88473.h38 * Xtal frequency.
/linux-4.1.27/include/asm-generic/
H A Dparam.h7 # define HZ CONFIG_HZ /* Internal kernel timer frequency */
/linux-4.1.27/include/linux/can/platform/
H A Dmcp251x.h14 * @oscillator_frequency: - oscillator frequency in Hz
H A Dsja1000.h29 u32 osc_freq; /* CAN bus oscillator frequency in Hz */
/linux-4.1.27/drivers/clk/
H A Dclk-si570.c65 * @max_freq: Maximum frequency for this device
66 * @fxtal: Factory xtal frequency
70 * @frequency: Current output frequency
82 u64 frequency; member in struct:clk_si570
133 * @fout: Factory frequency output
157 data->frequency = fout; si570_get_defaults()
184 * @frequency: Target frequency
192 * (@out_rfreq) for a given target @frequency.
194 static int si570_calc_divs(unsigned long frequency, struct clk_si570 *data, si570_calc_divs() argument
205 n1 = div_u64(div_u64(FDCO_MIN, hs_div), frequency); si570_calc_divs()
209 fdco = (u64)frequency * (u64)hs_div * (u64)n1; si570_calc_divs()
239 return data->frequency; si570_recalc_rate()
259 if (div64_u64(abs(rate - data->frequency) * 10000LL, si570_round_rate()
260 data->frequency) < 35) { si570_round_rate()
262 div64_u64(data->frequency, 2), data->frequency); si570_round_rate()
279 * si570_set_frequency() - Adjust output frequency
281 * @frequency: Target frequency
284 * Update output frequency for big frequency changes (> 3,500 ppm).
286 static int si570_set_frequency(struct clk_si570 *data, unsigned long frequency) si570_set_frequency() argument
290 err = si570_calc_divs(frequency, data, &data->rfreq, &data->n1, si570_set_frequency()
307 /* Applying a new frequency can take up to 10ms */ si570_set_frequency()
314 * si570_set_frequency_small() - Adjust output frequency
316 * @frequency: Target frequency
319 * Update output frequency for small frequency changes (< 3,500 ppm).
322 unsigned long frequency) si570_set_frequency_small()
329 data->rfreq = div64_u64((data->rfreq * frequency) + si570_set_frequency_small()
330 div_u64(data->frequency, 2), data->frequency); si570_set_frequency_small()
335 /* Applying a new frequency (small change) can take up to 100us */ si570_set_frequency_small()
350 "requested frequency %lu Hz is out of range\n", rate); si570_set_rate()
354 if (div64_u64(abs(rate - data->frequency) * 10000LL, si570_set_rate()
355 data->frequency) < 35) si570_set_rate()
363 data->frequency = rate; si570_set_rate()
476 /* Read the requested initial output frequency from device tree */ si570_probe()
477 if (!of_property_read_u32(client->dev.of_node, "clock-frequency", si570_probe()
487 dev_info(&client->dev, "registered, current frequency %llu Hz\n", si570_probe()
488 data->frequency); si570_probe()
321 si570_set_frequency_small(struct clk_si570 *data, unsigned long frequency) si570_set_frequency_small() argument
H A Dclk-mb86s7x.c38 u64 frequency; member in struct:mb86s7x_peri_clk
113 cmd.frequency = *rate; crg_rate_control()
119 cmd.domain, cmd.port, cmd.frequency); crg_rate_control()
136 cmd.domain, cmd.port, cmd.frequency); crg_rate_control()
140 cmd.domain, cmd.port, cmd.frequency); crg_rate_control()
142 *rate = cmd.frequency; crg_rate_control()
260 u64 frequency; member in struct:mb86s7x_cpu_freq
273 cmd.frequency = *rate; mhu_cluster_rate()
282 cmd.cluster_id, cmd.cpu_id, cmd.frequency); mhu_cluster_rate()
292 cmd.cluster_id, cmd.cpu_id, cmd.frequency); mhu_cluster_rate()
294 *rate = cmd.frequency; mhu_cluster_rate()
/linux-4.1.27/arch/arm/plat-samsung/include/plat/
H A Dcpu-freq.h7 * S3C CPU frequency scaling support - driver and board
21 * struct s3c_freq - frequency information (mainly for core drivers)
22 * @fclk: The FCLK frequency in Hz.
23 * @armclk: The ARMCLK frequency in Hz.
25 * @hclk: The HCLK frequency in Hz.
26 * @pclk: The PCLK frequency in Hz.
28 * This contains the frequency information about the current configuration
52 * having the core frequency alone.
92 * @freq: The frequency for this entry in Hz.
101 * struct s3c_cpufreq_board - per-board cpu frequency informatin
108 * @max: The maxium frequency limits for the system. Any field that
125 struct s3c_freq max; /* frequency limits */
128 /* Things depending on frequency scaling. */
H A Dcpu-freq-core.h7 * S3C CPU frequency scaling support - core support
33 * used by the CPU frequency support if it needs to change the settings
106 * struct s3c_cpufreq_config - current cpu frequency configuration
132 * struct s3c_cpufreq_info - Information for the CPU frequency driver.
140 * any frequency changes. This is really only need by devices like the
145 * from the @calc_iotiming entry when changing the frequency.
148 * @calc_freqtable: Calculate (fill in) the given frequency table from the
149 * current frequency configuration. If the table passed in is NULL,
287 table[index].frequency = freq; s3c_cpufreq_addfreq()
/linux-4.1.27/arch/metag/include/asm/
H A Dclock.h18 * @get_core_freq: Get the frequency of the Meta core. If this is NULL, the
19 * core frequency will be determined like this:
44 * get_coreclock() - Get the frequency of the Meta core clock.
46 * Returns: The Meta core clock frequency in Hz.
52 * the most accurate frequency as it can be calculated directly from the get_coreclock()
/linux-4.1.27/arch/m68k/include/uapi/asm/
H A Dbootinfo-amiga.h17 #define BI_AMIGA_VBLANK 0x8003 /* VBLANK frequency (__u8) */
18 #define BI_AMIGA_PSFREQ 0x8004 /* power supply frequency (__u8) */
19 #define BI_AMIGA_ECLOCK 0x8005 /* EClock frequency (__be32) */
/linux-4.1.27/arch/m68k/atari/
H A Datasound.c49 /* PSG base frequency */
51 /* PSG envelope base frequency times 10 */
56 /* Generates sound of some frequency for some number of clock atari_mksound()
72 /* Convert from frequency value to PSG period value (base atari_mksound()
73 frequency 125 kHz). */ atari_mksound()
79 /* Set generator A frequency to hz. */ atari_mksound()
/linux-4.1.27/include/uapi/linux/
H A Dif_cablemodem.h17 #define SIOCGCMFREQUENCY (SIOCDEVPRIVATE+2) /* get cable modem frequency */
18 #define SIOCSCMFREQUENCY (SIOCDEVPRIVATE+3) /* set cable modem frequency */
H A Dtimex.h28 * Added defines for hybrid phase/frequency-lock loop.
67 __kernel_long_t freq; /* frequency offset (scaled ppm) */
73 __kernel_long_t tolerance;/* clock frequency tolerance (ppm)
79 __kernel_long_t ppsfreq;/* pps frequency (scaled ppm) (ro) */
99 #define ADJ_FREQUENCY 0x0002 /* frequency offset */
133 #define STA_FLL 0x0008 /* select frequency-lock mode (rw) */
138 #define STA_FREQHOLD 0x0080 /* hold frequency (rw) */
H A Dauxvec.h25 #define AT_CLKTCK 17 /* frequency at which times() increments */
/linux-4.1.27/arch/arm/mach-sa1100/
H A Dgeneric.c47 { .frequency = 59000, /* 59.0 MHz */},
48 { .frequency = 73700, /* 73.7 MHz */},
49 { .frequency = 88500, /* 88.5 MHz */},
50 { .frequency = 103200, /* 103.2 MHz */},
51 { .frequency = 118000, /* 118.0 MHz */},
52 { .frequency = 132700, /* 132.7 MHz */},
53 { .frequency = 147500, /* 147.5 MHz */},
54 { .frequency = 162200, /* 162.2 MHz */},
55 { .frequency = 176900, /* 176.9 MHz */},
56 { .frequency = 191700, /* 191.7 MHz */},
57 { .frequency = 206400, /* 206.4 MHz */},
58 { .frequency = 221200, /* 221.2 MHz */},
59 { .frequency = 235900, /* 235.9 MHz */},
60 { .frequency = 250700, /* 250.7 MHz */},
61 { .frequency = 265400, /* 265.4 MHz */},
62 { .frequency = 280200, /* 280.2 MHz */},
63 { .frequency = CPUFREQ_TABLE_END, },
70 return sa11x0_freq_table[PPCR & 0xf].frequency; sa11x0_getspeed()
/linux-4.1.27/drivers/media/usb/dvb-usb-v2/
H A Dmxl111sf-tuner.c43 u32 frequency; member in struct:mxl111sf_tuner_state
84 {0x1e, 0xff, 0x00}, /* channel frequency (lo and fractional) */
85 {0x1f, 0xff, 0x00}, /* channel frequency (hi for integer portion) */
313 ret = mxl1x1sf_tune_rf(fe, c->frequency, bw); mxl111sf_tuner_set_params()
317 state->frequency = c->frequency; mxl111sf_tuner_set_params()
396 static int mxl111sf_tuner_get_frequency(struct dvb_frontend *fe, u32 *frequency) mxl111sf_tuner_get_frequency() argument
399 *frequency = state->frequency; mxl111sf_tuner_get_frequency()
411 u32 *frequency) mxl111sf_tuner_get_if_frequency()
415 *frequency = 0; mxl111sf_tuner_get_if_frequency()
419 *frequency = 4000000; mxl111sf_tuner_get_if_frequency()
422 *frequency = 4500000; mxl111sf_tuner_get_if_frequency()
425 *frequency = 4570000; mxl111sf_tuner_get_if_frequency()
428 *frequency = 5000000; mxl111sf_tuner_get_if_frequency()
431 *frequency = 5380000; mxl111sf_tuner_get_if_frequency()
434 *frequency = 6000000; mxl111sf_tuner_get_if_frequency()
437 *frequency = 6280000; mxl111sf_tuner_get_if_frequency()
440 *frequency = 7200000; mxl111sf_tuner_get_if_frequency()
443 *frequency = 35250000; mxl111sf_tuner_get_if_frequency()
446 *frequency = 36000000; mxl111sf_tuner_get_if_frequency()
449 *frequency = 36150000; mxl111sf_tuner_get_if_frequency()
452 *frequency = 44000000; mxl111sf_tuner_get_if_frequency()
410 mxl111sf_tuner_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) mxl111sf_tuner_get_if_frequency() argument
/linux-4.1.27/drivers/media/tuners/
H A Dit913x.c227 dev_dbg(&dev->client->dev, "role=%u, frequency %u, bandwidth_hz %u\n", it913x_set_params()
228 dev->role, c->frequency, c->bandwidth_hz); it913x_set_params()
235 if (c->frequency <= 74000000) { it913x_set_params()
238 } else if (c->frequency <= 111000000) { it913x_set_params()
241 } else if (c->frequency <= 148000000) { it913x_set_params()
244 } else if (c->frequency <= 222000000) { it913x_set_params()
247 } else if (c->frequency <= 296000000) { it913x_set_params()
250 } else if (c->frequency <= 445000000) { it913x_set_params()
253 } else if (c->frequency <= dev->fn_min) { it913x_set_params()
256 } else if (c->frequency <= 950000000) { it913x_set_params()
283 t_cal_freq = (c->frequency / 1000) * n_div * dev->fdiv; it913x_set_params()
296 if (c->frequency <= 440000000) { it913x_set_params()
299 } else if (c->frequency <= 484000000) { it913x_set_params()
302 } else if (c->frequency <= 533000000) { it913x_set_params()
305 } else if (c->frequency <= 587000000) { it913x_set_params()
308 } else if (c->frequency <= 645000000) { it913x_set_params()
311 } else if (c->frequency <= 710000000) { it913x_set_params()
314 } else if (c->frequency <= 782000000) { it913x_set_params()
317 } else if (c->frequency <= 860000000) { it913x_set_params()
320 } else if (c->frequency <= 1492000000) { it913x_set_params()
323 } else if (c->frequency <= 1685000000) { it913x_set_params()
H A Dmt2131_priv.h31 /* frequency values in KHz */
40 u32 frequency; member in struct:mt2131_priv
H A Dqt1010_priv.h35 07 2b set frequency: 32 MHz scale, n*32 MHz
38 0a 08 set frequency: 4 MHz scale, n*4 MHz
54 1a d0 set frequency: 125 kHz scale, n*125 kHz
101 u32 frequency; member in struct:qt1010_priv
H A Dtuner-simple.c116 u32 frequency; member in struct:tuner_simple_priv
260 unsigned *frequency, u8 *config, u8 *cb) simple_config_lookup()
266 if (*frequency > t_params->ranges[i].limit) simple_config_lookup()
271 tuner_dbg("frequency out of range (%d > %d)\n", simple_config_lookup()
272 *frequency, t_params->ranges[i - 1].limit); simple_config_lookup()
273 *frequency = t_params->ranges[--i].limit; simple_config_lookup()
280 *frequency / 16, *frequency % 16 * 100 / 16, *frequency, simple_config_lookup()
584 i = simple_config_lookup(fe, t_params, &params->frequency, simple_set_tv_freq()
587 div = params->frequency + IFPCoff + offset; simple_set_tv_freq()
591 params->frequency / 16, params->frequency % 16 * 100 / 16, simple_set_tv_freq()
675 unsigned int freq = params->frequency; simple_set_radio_freq()
782 priv->frequency = params->frequency * 125 / 2; simple_set_params()
788 priv->frequency = params->frequency * 62500; simple_set_params()
798 const u32 frequency, simple_set_dvb()
807 frequency >= 158870000) simple_set_dvb()
812 buf[3] |= (frequency < 161000000) ? 1 : simple_set_dvb()
813 (frequency < 444000000) ? 2 : 4; simple_set_dvb()
849 /* This function returns the tuned frequency on success, 0 on error */ simple_dvb_configure()
856 u32 frequency = freq / 62500; simple_dvb_configure() local
868 ret = simple_config_lookup(fe, t_params, &frequency, &config, &cb); simple_dvb_configure()
872 div = ((frequency + t_params->iffreq) * 62500 + offset + simple_dvb_configure()
885 /* calculate the frequency we set it to */ simple_dvb_configure()
896 u32 frequency; simple_dvb_calc_regs() local
901 frequency = simple_dvb_configure(fe, buf+1, delsys, c->frequency, bw); simple_dvb_calc_regs()
902 if (frequency == 0) simple_dvb_calc_regs()
907 priv->frequency = frequency; simple_dvb_calc_regs()
918 u32 freq = c->frequency; simple_dvb_set_params()
920 u32 frequency; simple_dvb_set_params() local
928 prev_freq = priv->frequency; simple_dvb_set_params()
931 frequency = simple_dvb_configure(fe, buf+1, delsys, freq, bw); simple_dvb_set_params()
932 if (frequency == 0) simple_dvb_set_params()
937 priv->frequency = frequency; simple_dvb_set_params()
955 /* calc_regs sets frequency and bandwidth. if we failed, unset them */ simple_dvb_set_params()
956 priv->frequency = prev_freq; simple_dvb_set_params()
1024 static int simple_get_frequency(struct dvb_frontend *fe, u32 *frequency) simple_get_frequency() argument
1027 *frequency = priv->frequency; simple_get_frequency()
258 simple_config_lookup(struct dvb_frontend *fe, struct tuner_params *t_params, unsigned *frequency, u8 *config, u8 *cb) simple_config_lookup() argument
796 simple_set_dvb(struct dvb_frontend *fe, u8 *buf, const u32 delsys, const u32 frequency, const u32 bandwidth) simple_set_dvb() argument
H A Dtua9001.c141 u32 frequency; tua9001_set_params() local
144 dev_dbg(&priv->i2c->dev, "%s: delivery_system=%d frequency=%d " \ tua9001_set_params()
146 c->delivery_system, c->frequency, c->bandwidth_hz); tua9001_set_params()
176 frequency = (c->frequency - 150000000); tua9001_set_params()
177 frequency /= 100; tua9001_set_params()
178 frequency *= 48; tua9001_set_params()
179 frequency /= 10000; tua9001_set_params()
182 data[1].val = frequency; tua9001_set_params()
217 static int tua9001_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) tua9001_get_if_frequency() argument
223 *frequency = 0; /* Zero-IF */ tua9001_get_if_frequency()
H A Dfc0012.c82 0x82, /* reg. 0x0b: Output Clock is same as clock frequency, fc0012_init()
137 u32 freq = p->frequency / 1000; fc0012_set_params()
164 /* select frequency divider and the frequency of VCO */ fc0012_set_params()
231 /* fix for frequency less than 45 MHz */ fc0012_set_params()
239 /* From VCO frequency determines the XIN ( fractional part of Delta fc0012_set_params()
319 priv->frequency = p->frequency; fc0012_set_params()
331 static int fc0012_get_frequency(struct dvb_frontend *fe, u32 *frequency) fc0012_get_frequency() argument
334 *frequency = priv->frequency; fc0012_get_frequency()
338 static int fc0012_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) fc0012_get_if_frequency() argument
340 *frequency = 0; /* Zero-IF */ fc0012_get_if_frequency()
H A Dmt20xx.c49 u32 frequency; member in struct:microtune_priv
60 static int microtune_get_frequency(struct dvb_frontend *fe, u32 *frequency) microtune_get_frequency() argument
63 *frequency = priv->frequency; microtune_get_frequency()
154 tuner_info("mt2032: frequency parameters out of range: %d %d %d %d\n", mt2032_compute_freq()
318 mt2032_set_if_freq(fe, params->frequency*62500, mt2032_set_tv_freq()
339 mt2032_set_if_freq(fe, params->frequency * 125 / 2, mt2032_set_radio_freq()
354 priv->frequency = params->frequency * 125 / 2; mt2032_set_params()
359 priv->frequency = params->frequency * 62500; mt2032_set_params()
519 mt2050_set_if_freq(fe, params->frequency*62500, if2); mt2050_set_tv_freq()
539 mt2050_set_if_freq(fe, params->frequency * 125 / 2, if2); mt2050_set_radio_freq()
554 priv->frequency = params->frequency * 125 / 2; mt2050_set_params()
559 priv->frequency = params->frequency * 62500; mt2050_set_params()
H A Dmc44s803.c224 priv->frequency = c->frequency; mc44s803_set_params()
229 n1 = (c->frequency + MC44S803_IF1 + 500000) / 1000000; mc44s803_set_params()
232 freq = freq - c->frequency; mc44s803_set_params()
294 static int mc44s803_get_frequency(struct dvb_frontend *fe, u32 *frequency) mc44s803_get_frequency() argument
297 *frequency = priv->frequency; mc44s803_get_frequency()
301 static int mc44s803_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) mc44s803_get_if_frequency() argument
303 *frequency = MC44S803_IF2; /* 36.125 MHz */ mc44s803_get_if_frequency()
H A Dmt2060.c100 /* The function below calculates the frequency offset between the output frequency if2
120 /* Calculates the frequency offset to add to avoid spurs. Returns 0 if no offset is needed */ mt2060_spurcheck()
153 #define IF2 36150 // IF2 frequency = 36.150 MHz
179 freq = c->frequency / 1000; /* Hz -> kHz */ mt2060_set_params()
186 priv->frequency = (f_lo1 - f_lo2 - IF2) * 1000, mt2060_set_params()
288 static int mt2060_get_frequency(struct dvb_frontend *fe, u32 *frequency) mt2060_get_frequency() argument
291 *frequency = priv->frequency; mt2060_get_frequency()
295 static int mt2060_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) mt2060_get_if_frequency() argument
297 *frequency = IF2 * 1000; mt2060_get_if_frequency()
H A Dmxl5007t.c170 u32 frequency; member in struct:mxl5007t_state
433 /* Convert RF frequency into 16 bits => mxl5007t_calc_rf_tune_regs()
622 u32 freq = c->frequency; mxl5007t_set_params()
668 state->frequency = freq; mxl5007t_set_params()
721 static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency) mxl5007t_get_frequency() argument
724 *frequency = state->frequency; mxl5007t_get_frequency()
735 static int mxl5007t_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) mxl5007t_get_if_frequency() argument
739 *frequency = 0; mxl5007t_get_if_frequency()
743 *frequency = 4000000; mxl5007t_get_if_frequency()
746 *frequency = 4500000; mxl5007t_get_if_frequency()
749 *frequency = 4570000; mxl5007t_get_if_frequency()
752 *frequency = 5000000; mxl5007t_get_if_frequency()
755 *frequency = 5380000; mxl5007t_get_if_frequency()
758 *frequency = 6000000; mxl5007t_get_if_frequency()
761 *frequency = 6280000; mxl5007t_get_if_frequency()
764 *frequency = 9191500; mxl5007t_get_if_frequency()
767 *frequency = 35250000; mxl5007t_get_if_frequency()
770 *frequency = 36150000; mxl5007t_get_if_frequency()
773 *frequency = 44000000; mxl5007t_get_if_frequency()
H A Dfc0011.c75 u32 frequency; member in struct:fc0011_priv
184 u32 freq = p->frequency / 1000; fc0011_set_params()
221 /* Calc XIN. The PLL reference frequency is 18 MHz. */ fc0011_set_params()
450 priv->frequency = p->frequency; fc0011_set_params()
456 static int fc0011_get_frequency(struct dvb_frontend *fe, u32 *frequency) fc0011_get_frequency() argument
460 *frequency = priv->frequency; fc0011_get_frequency()
465 static int fc0011_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) fc0011_get_if_frequency() argument
467 *frequency = 0; fc0011_get_if_frequency()
H A Dsi2157.c255 "delivery_system=%d frequency=%u bandwidth_hz=%u\n", si2157_set_params()
256 c->delivery_system, c->frequency, c->bandwidth_hz); si2157_set_params()
313 /* set if frequency if needed */ si2157_set_params()
327 /* set frequency */ si2157_set_params()
329 cmd.args[4] = (c->frequency >> 0) & 0xff; si2157_set_params()
330 cmd.args[5] = (c->frequency >> 8) & 0xff; si2157_set_params()
331 cmd.args[6] = (c->frequency >> 16) & 0xff; si2157_set_params()
332 cmd.args[7] = (c->frequency >> 24) & 0xff; si2157_set_params()
345 static int si2157_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) si2157_get_if_frequency() argument
350 *frequency = dev->if_frequency; si2157_get_if_frequency()
H A Dmax2165.c199 /* Set PLL divider according to RF frequency */ max2165_set_rf()
272 priv->frequency = c->frequency; max2165_set_params()
280 dprintk("%s() frequency=%d\n", __func__, c->frequency); max2165_set_params()
285 ret = max2165_set_rf(priv, priv->frequency); max2165_set_params()
301 *freq = priv->frequency; max2165_get_frequency()
H A Dmt2266.c40 u32 frequency; member in struct:mt2266_priv
139 freq = priv->frequency / 1000; /* Hz -> kHz */ mt2266_set_params()
143 priv->frequency = c->frequency; mt2266_set_params()
264 static int mt2266_get_frequency(struct dvb_frontend *fe, u32 *frequency) mt2266_get_frequency() argument
267 *frequency = priv->frequency; mt2266_get_frequency()
H A Dtda18212.c64 "delivery_system=%d frequency=%d bandwidth_hz=%d\n", tda18212_set_params()
65 c->delivery_system, c->frequency, tda18212_set_params()
144 buf[4] = ((c->frequency / 1000) >> 16) & 0xff; tda18212_set_params()
145 buf[5] = ((c->frequency / 1000) >> 8) & 0xff; tda18212_set_params()
146 buf[6] = ((c->frequency / 1000) >> 0) & 0xff; tda18212_set_params()
167 static int tda18212_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) tda18212_get_if_frequency() argument
171 *frequency = dev->if_frequency; tda18212_get_if_frequency()
H A Dtea5761.c25 u32 frequency; member in struct:tea5761_priv
176 priv->frequency = frq * 125 / 2; __set_radio_freq()
188 return __set_radio_freq(fe, params->frequency, set_radio_freq()
198 return __set_radio_freq(fe, priv->frequency, false); set_radio_sleep()
297 static int tea5761_get_frequency(struct dvb_frontend *fe, u32 *frequency) tea5761_get_frequency() argument
300 *frequency = priv->frequency; tea5761_get_frequency()
H A Dfc0013.c231 u32 freq = p->frequency / 1000; fc0013_set_params()
316 /* select frequency divider and the frequency of VCO */ fc0013_set_params()
387 /* fix for frequency less than 45 MHz */ fc0013_set_params()
395 /* From VCO frequency determines the XIN ( fractional part of Delta fc0013_set_params()
481 priv->frequency = p->frequency; fc0013_set_params()
492 static int fc0013_get_frequency(struct dvb_frontend *fe, u32 *frequency) fc0013_get_frequency() argument
495 *frequency = priv->frequency; fc0013_get_frequency()
499 static int fc0013_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) fc0013_get_if_frequency() argument
502 *frequency = 0; fc0013_get_if_frequency()
H A Dmt2060_priv.h56 LNABAND : Input frequency range : ( See code for details )
64 FMF : Estimated first IF Center frequency Offset ( ? )
99 u32 frequency; member in struct:mt2060_priv
H A Dqt1010.c119 freq = c->frequency; qt1010_set_params()
124 priv->frequency = freq; qt1010_set_params()
138 /* 07 - set frequency: 32 MHz scale */ qt1010_set_params()
145 /* 0a - set frequency: 4 MHz scale (max 28 MHz) */ qt1010_set_params()
159 /* 1a - set frequency: 125 kHz scale (max 3875 kHz)*/ qt1010_set_params()
370 if (!c->frequency) qt1010_init()
371 c->frequency = 545000000; /* Sigmatek DVB-110 545000000 */ qt1010_init()
383 static int qt1010_get_frequency(struct dvb_frontend *fe, u32 *frequency) qt1010_get_frequency() argument
386 *frequency = priv->frequency; qt1010_get_frequency()
390 static int qt1010_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) qt1010_get_if_frequency() argument
392 *frequency = 36125000; qt1010_get_if_frequency()
H A Dtda827x.c46 u32 frequency; member in struct:tda827x_priv
85 priv->sgIF = 88; /* if frequency is 5.5 MHz */ tda827x_set_std()
177 tuner_freq = c->frequency; tda827xo_set_params()
221 priv->frequency = c->frequency; tda827xo_set_params()
259 unsigned int freq = params->frequency; tda827xo_set_analog_params()
329 priv->frequency = params->frequency; tda827xo_set_analog_params()
541 tuner_freq = c->frequency; tda827xa_set_params()
649 priv->frequency = c->frequency; tda827xa_set_params()
670 unsigned int freq = params->frequency; tda827xa_set_analog_params()
754 priv->frequency = params->frequency; tda827xa_set_analog_params()
777 static int tda827x_get_frequency(struct dvb_frontend *fe, u32 *frequency) tda827x_get_frequency() argument
780 *frequency = priv->frequency; tda827x_get_frequency()
H A Dfc0012-priv.h28 u32 frequency; member in struct:fc0012_priv
/linux-4.1.27/drivers/staging/iio/
H A DMakefile16 obj-y += frequency/
/linux-4.1.27/arch/mips/include/asm/mach-au1x00/
H A Dau1550_spi.h9 u32 mainclk_hz; /* main input clock frequency of PSC */
/linux-4.1.27/include/linux/platform_data/
H A Dsc18is602.h15 * @clock_frequency SC18IS603 oscillator frequency
H A Di2c-davinci.h17 unsigned int bus_freq; /* standard bus frequency (kHz) */
H A Di2c-s3c2410.h24 * @frequency: The desired frequency in Hz of the bus. This is
35 unsigned long frequency; member in struct:s3c2410_platform_i2c
/linux-4.1.27/include/linux/spi/
H A Difx_modem.h12 unsigned long max_hz; /* max SPI frequency */
/linux-4.1.27/arch/ia64/include/asm/
H A Dparam.h16 # define CLOCKS_PER_SEC HZ /* frequency at which times() counts */
/linux-4.1.27/arch/arm/include/asm/hardware/
H A Dicst.h39 * ICST307 VCO frequency must be between 6MHz and 200MHz (3.3 or 5V).
40 * This frequency is pre-output divider.
49 * ICST525 VCO frequency must be between 10MHz and 200MHz (3V) or 320MHz (5V).
50 * This frequency is pre-output divider.
/linux-4.1.27/arch/arm/mach-omap2/
H A Dclock44xx.h13 * set, then the DPLL's lock frequency is multiplied by 4 (OMAP4430 TRM
/linux-4.1.27/drivers/thermal/
H A Dclock_cooling.c43 * @freq_table: frequency table used to keep track of available frequencies.
47 * frequency.
118 * @property: type of query (frequency, level, max level)
122 * 2. translate frequency to cooling state
123 * 3. translate cooling state to frequency
151 if (freq == pos->frequency) cpufreq_for_each_valid_entry()
154 /* get the frequency order */ cpufreq_for_each_valid_entry()
156 descend = freq > pos->frequency; cpufreq_for_each_valid_entry()
158 freq = pos->frequency; cpufreq_for_each_valid_entry()
162 /* No valid cpu frequency entry */
181 if (freq == pos->frequency) cpufreq_for_each_valid_entry()
184 /* now we have a valid frequency entry */ cpufreq_for_each_valid_entry()
185 freq = pos->frequency; cpufreq_for_each_valid_entry()
188 /* get level by frequency */ cpufreq_for_each_valid_entry()
193 /* get frequency by level */ cpufreq_for_each_valid_entry()
206 * @freq: the frequency of interest
229 * clock_cooling_get_frequency - get the absolute value of frequency from level.
233 * This function matches cooling level with frequency. Based on a cooling level
234 * of frequency, equals cooling state of cpu cooling device, it will return
235 * the corresponding frequency.
238 * Return: 0 on error, the corresponding frequency otherwise.
255 * clock_cooling_apply - function to apply frequency clipping.
256 * @ccdev: clock_cooling_device pointer containing frequency clipping data.
261 * higher than the corresponding frequency based on the requested cooling_state.
410 * the referred device. The ordered frequency table is used to control
/linux-4.1.27/drivers/iio/common/ssp_sensors/
H A Dssp_iio_sensor.h45 /* Converts time in ms to frequency */ ssp_convert_to_freq()
60 /* Converts frequency to time in ms */ ssp_convert_to_time()
/linux-4.1.27/drivers/staging/iio/trigger/
H A Diio-trig-periodic-rtc.c27 unsigned int frequency; member in struct:iio_prtc_trigger_info
37 if (trig_info->frequency == 0 && state) iio_trig_periodic_rtc_set_state()
39 dev_dbg(&trig_info->rtc->dev, "trigger frequency is %u\n", iio_trig_periodic_rtc_set_state()
40 trig_info->frequency); iio_trig_periodic_rtc_set_state()
55 return sprintf(buf, "%u\n", trig_info->frequency); iio_trig_periodic_read_freq()
74 if (ret == 0 && trig_info->state && trig_info->frequency == 0) iio_trig_periodic_write_freq()
82 trig_info->frequency = val; iio_trig_periodic_write_freq()
90 static DEVICE_ATTR(frequency, S_IRUGO | S_IWUSR,
/linux-4.1.27/arch/powerpc/boot/
H A Dcuboot-824x.c33 setprop(soc, "bus-frequency", &bd.bi_busfreq, platform_fixups()
40 setprop(serial, "clock-frequency", &bd.bi_busfreq, platform_fixups()
H A Dcuboot-8xx.c33 setprop(node, "clock-frequency", &bd.bi_busfreq, 4); platform_fixups()
37 setprop(node, "clock-frequency", &bd.bi_busfreq, 4); platform_fixups()
H A Dredboot-83xx.c35 printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n", platform_fixups()
37 setprop(node, "clock-frequency", &bd.bi_busfreq, 4); platform_fixups()
H A Dredboot-8xx.c34 printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n", platform_fixups()
36 setprop(node, "clock-frequency", &bd.bi_busfreq, 4); platform_fixups()
H A Dcuboot-85xx-cpm2.c41 setprop(devp, "bus-frequency", &bd.bi_busfreq, platform_fixups()
48 setprop(serial, "clock-frequency", &bd.bi_busfreq, platform_fixups()
55 setprop(devp, "clock-frequency", &bd.bi_brgfreq, platform_fixups()
H A Dmpc8xx.c22 /* Return system clock from crystal frequency */ mpc885_get_clock()
67 setprop(node, "clock-frequency", &sysclk, 4); mpc8xx_set_clocks()
71 setprop(node, "clock-frequency", &sysclk, 4); mpc8xx_set_clocks()
H A Dpq2.c28 /* Get various clocks from crystal frequency.
86 setprop(node, "clock-frequency", &sysfreq, 4); pq2_set_clocks()
90 setprop(node, "clock-frequency", &brgfreq, 4); pq2_set_clocks()
H A Dcuboot-52xx.c45 setprop(soc, "bus-frequency", &bd.bi_ipbfreq, platform_fixups()
52 setprop(soc, "system-frequency", &sysfreq, sizeof(sysfreq)); platform_fixups()
H A Dcuboot-83xx.c39 setprop(soc, "bus-frequency", &bd.bi_busfreq, platform_fixups()
46 setprop(serial, "clock-frequency", &bd.bi_busfreq, platform_fixups()
H A Dcuboot-85xx.c42 setprop(soc, "bus-frequency", &bd.bi_busfreq, platform_fixups()
49 setprop(serial, "clock-frequency", &bd.bi_busfreq, platform_fixups()
H A Ddevtree.c66 printf("CPU clock-frequency <- 0x%x (%dMHz)\n\r", cpu, MHZ(cpu)); dt_fixup_cpu_clocks()
67 printf("CPU timebase-frequency <- 0x%x (%dMHz)\n\r", tb, MHZ(tb)); dt_fixup_cpu_clocks()
69 printf("CPU bus-frequency <- 0x%x (%dMHz)\n\r", bus, MHZ(bus)); dt_fixup_cpu_clocks()
72 setprop_val(devp, "clock-frequency", cpu); dt_fixup_cpu_clocks()
73 setprop_val(devp, "timebase-frequency", tb); dt_fixup_cpu_clocks()
75 setprop_val(devp, "bus-frequency", bus); dt_fixup_cpu_clocks()
86 printf("%s: clock-frequency <- %x (%dMHz)\n\r", path, freq, MHZ(freq)); dt_fixup_clock()
87 setprop_val(devp, "clock-frequency", freq); dt_fixup_clock()
H A Dcuboot-mpc7448hpc2.c37 setprop(tsi, "bus-frequency", &bd.bi_busfreq, platform_fixups()
/linux-4.1.27/drivers/iio/
H A DMakefile20 obj-y += frequency/
/linux-4.1.27/drivers/staging/iio/impedance-analyzer/
H A Dad5933.h18 * @ext_clk_Hz: the external clock frequency in Hz, if not set
/linux-4.1.27/arch/x86/kernel/cpu/
H A Dpowerflags.c11 "fid", /* frequency id control */
/linux-4.1.27/arch/xtensa/include/asm/
H A Dparam.h15 # define HZ CONFIG_HZ /* internal timer frequency */
/linux-4.1.27/arch/xtensa/platforms/xt2000/include/platform/
H A Dserial.h25 #define DUART16552_XTAL_FREQ 18432000 /* crystal frequency in Hz */
/linux-4.1.27/arch/arm/mach-ep93xx/include/mach/
H A Dhardware.h12 * required high-frequency clocks, the processor uses two phase-locked-
/linux-4.1.27/include/linux/
H A Dcpufreq-dt.h16 * frequency, false when all CPUs are controlled by a single
H A Ddevfreq.h32 * @current_frequency: The operating frequency.
48 * The resulting frequency should be at most this. (this bound is the
50 * If the flag is not set, the resulting frequency should be at most the
57 * @initial_freq: The operating frequency when devfreq_add_device() is
60 * @target: The device should set its operating frequency at
62 * higher than any operable frequency, set maximum.
64 * freq at the current frequency.
69 * @get_cur_freq: The device should provide the current frequency
97 * @get_target_freq: Returns desired operating frequency for the device.
127 * @governor: method how to choose frequency based on the usage.
133 * @previous_freq: previously configured frequency value.
136 * @min_freq: Limit minimum frequency requested by user (0: none)
137 * @max_freq: Limit maximum frequency requested by user (0: none)
171 /* information for device frequency transition */
211 * @upthreshold: If the load is over this value, the frequency jumps.
214 * the governor may consider slowing the frequency down.
H A Dtimex.h28 * Added defines for hybrid phase/frequency-lock loop.
83 * adjust the frequency correction for a given offset in PLL mode.
107 * adjust the frequency correction for a given offset in FLL mode.
112 #define SHIFT_PLL 2 /* PLL frequency factor (shift) */
113 #define SHIFT_FLL 2 /* FLL frequency factor (shift) */
118 * time_tolerance variables, which represent the current frequency
119 * offset and maximum frequency tolerance.
121 #define SHIFT_USEC 16 /* frequency offset scale (shift) */
128 #define MAXFREQ 500000 /* max frequency error (ns/s) */
160 /* The clock frequency of the i8253/i8254 PIT */
H A Dcpufreq.h108 /* Synchronization for frequency transitions */
181 #define CPUFREQ_RELATION_L 0 /* lowest frequency at or above target */ disable_cpufreq()
182 #define CPUFREQ_RELATION_H 1 /* highest frequency below or at target */ disable_cpufreq()
183 #define CPUFREQ_RELATION_C 2 /* closest frequency to target */ disable_cpufreq()
233 * On failure, should always restore frequency to policy->restore_freq
245 * get_intermediate should return a stable intermediate frequency
247 * to to that frequency, before jumping to the frequency corresponding
253 * wish to switch to intermediate frequency for some target frequency.
288 affected by frequency
310 * frequency present in freq-table exposed by the driver. For these drivers if
426 * If (cpufreq_driver->target) exists, the ->governor decides what frequency
494 /* Special Values of .frequency field */
503 unsigned int frequency; /* kHz - doesn't need to be in ascending member in struct:cpufreq_frequency_table
529 while ((*pos)->frequency != CPUFREQ_TABLE_END) cpufreq_next_valid()
530 if ((*pos)->frequency != CPUFREQ_ENTRY_INVALID) cpufreq_next_valid()
544 for (pos = table; pos->frequency != CPUFREQ_TABLE_END; pos++)
/linux-4.1.27/drivers/macintosh/
H A Dwindfarm_cpufreq_clamp.c41 printk(KERN_INFO "windfarm: Clamping CPU frequency to " clamp_set()
44 printk(KERN_INFO "windfarm: CPU frequency unclamped !\n"); clamp_set()
104 MODULE_DESCRIPTION("CPU frequency clamp for PowerMacs thermal control");
/linux-4.1.27/drivers/staging/sm750fb/
H A Dddk750_chip.h34 unsigned long inputFreq; /* Input clock frequency to the PLL */
83 void setMemoryClock(unsigned int frequency);
84 void setMasterClock(unsigned int frequency);
H A Dddk750_chip.c103 void setChipClock(unsigned int frequency) setChipClock() argument
113 if (frequency) { setChipClock()
125 ulActualMxClk = calcPllValue(frequency, &pll); setChipClock()
134 void setMemoryClock(unsigned int frequency) setMemoryClock() argument
142 if (frequency) { setMemoryClock()
143 /* Set the frequency to the maximum frequency that the DDR Memory can take setMemoryClock()
145 if (frequency > MHz(336)) setMemoryClock()
146 frequency = MHz(336); setMemoryClock()
149 divisor = (unsigned int) roundedDiv(getChipClock(), frequency); setMemoryClock()
180 * The maximum frequency the engine can run is 168MHz.
182 void setMasterClock(unsigned int frequency) setMasterClock() argument
190 if (frequency) { setMasterClock()
191 /* Set the frequency to the maximum frequency that the SM750 engine can setMasterClock()
193 if (frequency > MHz(190)) setMasterClock()
194 frequency = MHz(190); setMasterClock()
197 divisor = (unsigned int) roundedDiv(getChipClock(), frequency); setMasterClock()
582 /* Restore input frequency from Khz to hz unit */ calcPllValue2()
591 /* Return actual frequency that the PLL can set */ calcPllValue2()
/linux-4.1.27/drivers/staging/rtl8188eu/core/
H A Drtw_rf.c30 u32 frequency; member in struct:ch_freq
64 freq = ch_freq_map[i].frequency; rtw_ch2freq()
80 if (freq == ch_freq_map[i].frequency) { rtw_freq2ch()
/linux-4.1.27/arch/m68k/include/asm/
H A Dcoldfire.h17 * Define master clock frequency. This is done at config time now.
20 * another different clocking frequency.
25 #error "Don't know what your ColdFire CPU clock frequency is??"
H A Dtimex.h11 * CLOCK_TICK_RATE should give the underlying frequency of the tick timer
/linux-4.1.27/arch/x86/kernel/
H A Dtsc_msr.c6 * <maximum core-clock to bus-clock ratio> * <maximum resolved frequency>
25 /* CPU reference clock frequency: in KHz */
109 pr_info("Resolved frequency ID: %u, frequency: %u KHz\n", try_msr_calibrate_tsc()
114 /* TSC frequency = maximum resolved freq * maximum resolved bus ratio */ try_msr_calibrate_tsc()
/linux-4.1.27/drivers/clk/mvebu/
H A Darmada-375.c30 * SAR1[21:17] : CPU frequency DDR frequency L2 frequency
37 * SAR1[22] : TCLK frequency
80 pr_err("Selected CPU frequency (%d) unsupported\n", armada_375_get_cpu_freq()
H A Darmada-39x.c25 * SARL[15] : TCLK frequency
29 * SARH[0] : Reference clock frequency
77 pr_err("Selected CPU frequency (%d) unsupported\n", armada_39x_get_cpu_freq()
/linux-4.1.27/sound/core/
H A Drtctimer.c2 * RTC based high-frequency timer
34 #define RTC_FREQ 1024 /* default frequency */
60 static int rtctimer_freq = RTC_FREQ; /* frequency */
135 pr_err("ALSA: rtctimer: invalid frequency %d\n", rtctimer_freq); rtctimer_init()
181 MODULE_PARM_DESC(rtctimer_freq, "timer frequency in Hz");
/linux-4.1.27/drivers/media/pci/bt8xx/
H A Ddvb-bt8xx.c164 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; thomson_dtt7579_tuner_calc_regs()
166 if (c->frequency < 542000000) thomson_dtt7579_tuner_calc_regs()
168 else if (c->frequency < 771000000) thomson_dtt7579_tuner_calc_regs()
173 if (c->frequency == 0) thomson_dtt7579_tuner_calc_regs()
175 else if (c->frequency < 443250000) thomson_dtt7579_tuner_calc_regs()
201 u32 freq = c->frequency; cx24108_tuner_set_params()
220 /* decide which VCO to use for the input frequency */ cx24108_tuner_set_params()
282 div = (36000000 + c->frequency + 83333) / 166666; microtune_mt7202dtf_tuner_set_params()
285 if (c->frequency < 175000000) microtune_mt7202dtf_tuner_set_params()
287 else if (c->frequency < 390000000) microtune_mt7202dtf_tuner_set_params()
289 else if (c->frequency < 470000000) microtune_mt7202dtf_tuner_set_params()
291 else if (c->frequency < 750000000) microtune_mt7202dtf_tuner_set_params()
296 if (c->frequency < 175000000) microtune_mt7202dtf_tuner_set_params()
298 else if (c->frequency < 470000000) microtune_mt7202dtf_tuner_set_params()
358 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
360 if (c->frequency < 150000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
362 else if (c->frequency < 173000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
364 else if (c->frequency < 250000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
366 else if (c->frequency < 400000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
368 else if (c->frequency < 420000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
370 else if (c->frequency < 470000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
372 else if (c->frequency < 600000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
374 else if (c->frequency < 730000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
379 if (c->frequency < 150000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
381 else if (c->frequency < 173000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
383 else if (c->frequency < 250000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
385 else if (c->frequency < 400000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
387 else if (c->frequency < 420000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
389 else if (c->frequency < 470000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
391 else if (c->frequency < 600000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
393 else if (c->frequency < 730000000) advbt771_samsung_tdtc9251dh0_tuner_calc_regs()
477 div = (c->frequency + 36166667) / 166667; vp3021_alps_tded4_tuner_set_params()
482 if ((c->frequency >= 47000000) && (c->frequency < 153000000)) vp3021_alps_tded4_tuner_set_params()
484 else if ((c->frequency >= 153000000) && (c->frequency < 430000000)) vp3021_alps_tded4_tuner_set_params()
486 else if ((c->frequency >= 430000000) && (c->frequency < 824000000)) vp3021_alps_tded4_tuner_set_params()
488 else if ((c->frequency >= 824000000) && (c->frequency < 863000000)) vp3021_alps_tded4_tuner_set_params()
530 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; digitv_alps_tded4_tuner_calc_regs()
537 dprintk("frequency %u, div %u\n", c->frequency, div); digitv_alps_tded4_tuner_calc_regs()
539 if (c->frequency < 470000000) digitv_alps_tded4_tuner_calc_regs()
541 else if (c->frequency > 823000000) digitv_alps_tded4_tuner_calc_regs()
/linux-4.1.27/drivers/media/radio/si4713/
H A Dsi4713.c68 /* frequency domain transformation (using times 10 to avoid floats) */
546 * frequency between 76 and 108 MHz in 10 kHz units and
549 * @frequency: desired frequency (76 - 108 MHz, unit 10 KHz, step 50 kHz)
551 static int si4713_tx_tune_freq(struct si4713_device *sdev, u16 frequency) si4713_tx_tune_freq() argument
557 * .Second byte = frequency's MSB si4713_tx_tune_freq()
558 * .Third byte = frequency's LSB si4713_tx_tune_freq()
562 msb(frequency), si4713_tx_tune_freq()
563 lsb(frequency), si4713_tx_tune_freq()
574 "%s: frequency=0x%02x status=0x%02x\n", __func__, si4713_tx_tune_freq()
575 frequency, val[0]); si4713_tx_tune_freq()
633 * level in units of dBuV on the selected frequency.
640 * @frequency: desired frequency (76 - 108 MHz, unit 10 KHz, step 50 kHz)
643 static int si4713_tx_tune_measure(struct si4713_device *sdev, u16 frequency, si4713_tx_tune_measure() argument
650 * .Second byte = frequency's MSB si4713_tx_tune_measure()
651 * .Third byte = frequency's LSB si4713_tx_tune_measure()
656 msb(frequency), si4713_tx_tune_measure()
657 lsb(frequency), si4713_tx_tune_measure()
674 "%s: frequency=0x%02x antcap=0x%02x status=0x%02x\n", si4713_tx_tune_measure()
675 __func__, frequency, antcap, val[0]); si4713_tx_tune_measure()
683 * frequency, output voltage in dBuV, the antenna tunning
689 * @frequency: returned frequency
695 u16 *frequency, u8 *power, si4713_tx_tune_status()
714 *frequency = compose_u16(val[2], val[3]); si4713_tx_tune_status()
715 sdev->frequency = *frequency; si4713_tx_tune_status()
721 *frequency, *power, *antcap, *noise); si4713_tx_tune_status()
1072 /* Device procedure needs to set frequency first */ si4713_setup()
1074 f.frequency = sdev->frequency ? sdev->frequency : DEFAULT_FREQUENCY; si4713_setup()
1075 f.frequency = si4713_to_v4l2(f.frequency); si4713_setup()
1110 sdev->frequency = DEFAULT_FREQUENCY; si4713_initialize()
1237 u16 frequency; si4713_ioctl() local
1245 frequency = v4l2_to_si4713(rnl->frequency); si4713_ioctl()
1248 /* Set desired measurement frequency */ si4713_ioctl()
1249 rval = si4713_tx_tune_measure(sdev, frequency, 0); si4713_ioctl()
1284 /* Report current frequency range limits */ si4713_g_modulator()
1359 /* si4713_g_frequency - get tuner or modulator radio frequency */ si4713_g_frequency()
1376 sdev->frequency = freq; si4713_g_frequency()
1379 f->frequency = si4713_to_v4l2(sdev->frequency); si4713_g_frequency()
1384 /* si4713_s_frequency - set tuner or modulator radio frequency */ si4713_s_frequency()
1389 u16 frequency = v4l2_to_si4713(f->frequency); si4713_s_frequency() local
1394 /* Check frequency range */ si4713_s_frequency()
1395 frequency = clamp_t(u16, frequency, FREQ_RANGE_LOW, FREQ_RANGE_HIGH); si4713_s_frequency()
1398 rval = si4713_tx_tune_freq(sdev, frequency); si4713_s_frequency()
1401 frequency = rval; si4713_s_frequency()
1404 sdev->frequency = frequency; si4713_s_frequency()
694 si4713_tx_tune_status(struct si4713_device *sdev, u8 intack, u16 *frequency, u8 *power, u8 *antcap, u8 *noise) si4713_tx_tune_status() argument
/linux-4.1.27/drivers/media/platform/vivid/
H A Dvivid-radio-common.c32 * since both use the same frequency bands.
115 * Calculate the emulated signal quality taking into account the frequency
157 vf->frequency = *pfreq; vivid_radio_g_frequency()
170 if (vf->frequency >= (FM_FREQ_RANGE_LOW + SW_FREQ_RANGE_HIGH) / 2) vivid_radio_s_frequency()
172 else if (vf->frequency <= (AM_FREQ_RANGE_HIGH + SW_FREQ_RANGE_LOW) / 2) vivid_radio_s_frequency()
177 freq = clamp_t(u32, vf->frequency, vivid_radio_bands[band].rangelow, vivid_radio_s_frequency()
/linux-4.1.27/arch/arm/mach-pxa/
H A Dclock-pxa3xx.c29 /* crystal frequency to HSIO bus frequency multiplier (HSS) */
33 * Get the clock frequency as reflected by CCSR and the turbo flag.
77 * Return the current AC97 clock frequency.
96 * Return the current HSIO bus clock frequency
111 /* crystal frequency to static memory controller multiplier (SMCFS) */
/linux-4.1.27/tools/perf/util/
H A Drecord.c154 * User specified count overrides default frequency. record_opts__config_freq()
161 pr_err("frequency and count are zero, aborting\n"); record_opts__config_freq()
169 * User specified frequency is over current maximum. record_opts__config_freq()
172 pr_err("Maximum frequency rate (%u) reached.\n" record_opts__config_freq()
180 * Default frequency is over current maximum. record_opts__config_freq()
183 pr_warning("Lowering default frequency rate to %u.\n" record_opts__config_freq()
/linux-4.1.27/drivers/i2c/busses/
H A Di2c-efm32.c121 unsigned long frequency; member in struct:efm32_i2c_ddata
315 u32 location, frequency; efm32_i2c_probe() local
391 ret = of_property_read_u32(np, "clock-frequency", &frequency); efm32_i2c_probe()
393 dev_dbg(&pdev->dev, "using frequency %u\n", frequency); efm32_i2c_probe()
395 frequency = 100000; efm32_i2c_probe()
398 ddata->frequency = frequency; efm32_i2c_probe()
406 clkdiv = DIV_ROUND_UP(rate, 8 * ddata->frequency) - 1; efm32_i2c_probe()
410 rate, ddata->frequency); efm32_i2c_probe()
416 rate, ddata->frequency, (unsigned long)clkdiv); efm32_i2c_probe()
H A Di2c-diolan-u2c.c93 static uint frequency = U2C_I2C_FREQ_STD; /* I2C clock frequency in Hz */ variable
95 module_param(frequency, uint, S_IRUGO | S_IWUSR);
96 MODULE_PARM_DESC(frequency, "I2C clock frequency in hertz");
305 if (frequency >= 200000) { diolan_init()
307 frequency = U2C_I2C_FREQ_FAST; diolan_init()
308 } else if (frequency >= 100000 || frequency == 0) { diolan_init()
310 frequency = U2C_I2C_FREQ_STD; diolan_init()
312 speed = U2C_I2C_SPEED(frequency); diolan_init()
315 frequency = U2C_I2C_FREQ(speed); diolan_init()
320 dev->usb_dev->bus->busnum, dev->usb_dev->devnum, frequency); diolan_init()
/linux-4.1.27/arch/microblaze/kernel/cpu/
H A Dcpuinfo.c121 /* take timebase-frequency from DTS */ setup_cpuinfo_clk()
122 cpuinfo.cpu_clock_freq = fcpu(cpu, "timebase-frequency"); setup_cpuinfo_clk()
128 pr_err("ERROR: CPU clock frequency not setup\n"); setup_cpuinfo_clk()
/linux-4.1.27/arch/mips/include/asm/mach-ath25/
H A Dath25_platform.h43 u32 cpu_freq; /* CPU core frequency in Hz */
44 u32 sys_freq; /* System frequency in Hz */
45 u32 cnt_freq; /* Calculated C0_COUNT frequency */
/linux-4.1.27/drivers/gpu/drm/sti/
H A Dsti_hdmi.h78 * specific configuration for a given TMDS clock frequency range.
80 * @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
81 * @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
/linux-4.1.27/drivers/net/can/softing/
H A Dsofting_platform.h22 unsigned int freq; /* operating frequency in Hz */
/linux-4.1.27/drivers/sh/clk/
H A Dcore.c67 freq_table[i].frequency = freq; clk_rate_table_build()
72 freq_table[i].frequency = CPUFREQ_TABLE_END; clk_rate_table_build()
129 unsigned long freq = freq_table[pos].frequency; clk_rate_table_iter()
202 if (pos->frequency == rate) clk_rate_table_find()
573 if (unlikely(freq->frequency / target <= div_min - 1)) { clk_round_parent()
576 freq_max = (freq->frequency + div_min / 2) / div_min; clk_round_parent()
584 pr_debug("too low freq %u, error %lu\n", freq->frequency, clk_round_parent()
593 if (unlikely(freq->frequency / target >= div_max)) { clk_round_parent()
596 freq_min = (freq->frequency + div_max / 2) / div_max; clk_round_parent()
604 pr_debug("too high freq %u, error %lu\n", freq->frequency, clk_round_parent()
613 div = freq->frequency / target; clk_round_parent()
614 freq_high = freq->frequency / div; clk_round_parent()
615 freq_low = freq->frequency / (div + 1); clk_round_parent()
632 freq->frequency, div, freq_high, div + 1, freq_low, clk_round_parent()
633 *best_freq, best->frequency); clk_round_parent()
640 *parent_freq = best->frequency; clk_round_parent()
/linux-4.1.27/drivers/clocksource/
H A Dmips-gic-timer.c142 void __init gic_clocksource_init(unsigned int frequency) gic_clocksource_init() argument
144 gic_frequency = frequency; gic_clocksource_init()
163 } else if (of_property_read_u32(node, "clock-frequency", gic_clocksource_of_init()
165 pr_err("GIC frequency not specified.\n"); gic_clocksource_of_init()
/linux-4.1.27/arch/cris/include/arch-v10/arch/
H A Dtimex.h13 #define CLOCK_TICK_RATE 25000 /* Underlying frequency of the HZ timer */
/linux-4.1.27/arch/cris/include/arch-v32/arch/
H A Dtimex.h13 #define CLOCK_TICK_RATE 100000000 /* Underlying frequency of the HZ timer */
/linux-4.1.27/tools/power/cpupower/lib/
H A Dcpufreq.h36 unsigned long frequency; member in struct:cpufreq_available_frequencies
49 unsigned long frequency; member in struct:cpufreq_stats
68 /* determine current CPU frequency
69 * - _kernel variant means kernel's opinion of CPU frequency
70 * - _hardware variant means actual hardware CPU frequency,
73 * returns 0 on failure, else frequency in kHz.
90 /* determine hardware CPU frequency limits
139 /* determine CPU frequency states available
209 /* set a specific frequency
/linux-4.1.27/drivers/media/dvb-frontends/drx39xyj/
H A Ddrxj.h264 * /enum enum drxj_xtal_freq * Supported external crystal reference frequency.
273 * /enum enum drxj_xtal_freq * Supported external crystal reference frequency.
280 * /struct struct drxj_cfg_hw_cfg * Get hw configuration, such as crystal reference frequency, I2C speed, etc...
284 /**< crystal reference frequency */
427 s32 frequency; /**< center signal frequency in KHz */ member in struct:drxj_data
457 u32 iqm_fs_rate_ofs; /**< frequency shifter setting after setchannel */
460 u32 iqm_rc_rate_ofs; /**< frequency shifter setting after setchannel */
559 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain
562 * NTSC channels are listed by their picture carrier frequency (Fpc).
563 * The function DRX_CTRL_SET_CHANNEL requires the centre frequency as input.
565 * tuned to the centre frequency of the channel:
574 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain
577 * is NOT used. PAL/SECAM channels are listed by their picture carrier frequency (Fpc).
590 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain
593 * is NOT used. PAL/SECAM channels are listed by their picture carrier frequency (Fpc).
606 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain
609 * is NOT used. PAL/SECAM channels are listed by their picture carrier frequency (Fpc).
621 * \brief Offset from sound carrier to centre frequency in kHz, in RF domain
624 * FM channels are listed by their sound carrier frequency (Fsc).
625 * The function DRX_CTRL_SET_CHANNEL requires the Ffm frequency (see below) as
628 * tuned to the Ffm frequency of the channel.
/linux-4.1.27/drivers/media/pci/pt1/
H A Dva1j5jf8007s.c146 u32 frequency; member in struct:va1j5jf8007s_cb_map
161 static u8 va1j5jf8007s_lookup_cb(u32 frequency) va1j5jf8007s_lookup_cb() argument
168 if (frequency < map->frequency) va1j5jf8007s_lookup_cb()
176 u32 frequency; va1j5jf8007s_set_frequency_1() local
181 frequency = state->fe.dtv_property_cache.frequency; va1j5jf8007s_set_frequency_1()
183 word = (frequency + 500) / 1000; va1j5jf8007s_set_frequency_1()
184 if (frequency < 1072000) va1j5jf8007s_set_frequency_1()
192 buf[5] = va1j5jf8007s_lookup_cb(frequency); va1j5jf8007s_set_frequency_1()
227 u32 frequency; va1j5jf8007s_set_frequency_3() local
231 frequency = state->fe.dtv_property_cache.frequency; va1j5jf8007s_set_frequency_3()
236 buf[3] = va1j5jf8007s_lookup_cb(frequency) | 0x4; va1j5jf8007s_set_frequency_3()
655 switch (state->config->frequency) { va1j5jf8007s_prepare_2()
H A Dva1j5jf8007t.c130 u32 frequency; member in struct:va1j5jf8007t_cb_map
147 static u8 va1j5jf8007t_lookup_cb(u32 frequency) va1j5jf8007t_lookup_cb() argument
154 if (frequency < map->frequency) va1j5jf8007t_lookup_cb()
162 u32 frequency; va1j5jf8007t_set_frequency() local
167 frequency = state->fe.dtv_property_cache.frequency; va1j5jf8007t_set_frequency()
169 word = (frequency + 71428) / 142857 + 399; va1j5jf8007t_set_frequency()
175 buf[5] = va1j5jf8007t_lookup_cb(frequency); va1j5jf8007t_set_frequency()
475 switch (state->config->frequency) { va1j5jf8007t_prepare()
/linux-4.1.27/kernel/time/
H A Dntp.c68 /* frequency offset (scaled nsecs/secs): */
101 static s64 pps_freq; /* frequency offset (scaled ns/s) */
169 * PPS frequency synchronization requested is_error_status()
178 * PPS frequency synchronization requested is_error_status()
307 * Select how the frequency is to be controlled ntp_update_offset()
550 /* restart PPS frequency calibration */ process_adj_status()
764 /* decrease frequency calibration interval length.
778 /* increase frequency calibration interval length.
792 /* update clock frequency based on MONOTONIC_RAW clock PPS signal
797 * of the interval becomes the frequency update. If the interval was
799 * Returns the difference between old and new frequency values.
806 /* check if the frequency interval was too long */ hardpps_update_freq()
817 /* here the raw frequency offset and wander (stability) is hardpps_update_freq()
836 * frequency changes, but is used only for performance hardpps_update_freq()
846 /* if enabled, the system clock frequency is updated */ hardpps_update_freq()
894 * correct the frequency.
913 * just start the frequency interval */ __hardpps()
919 /* ok, now we have a base for frequency calculation */ __hardpps()
928 /* restart the frequency calibration interval */ __hardpps()
936 /* check if the current frequency interval is finished */ __hardpps()
939 /* restart the frequency calibration interval */ __hardpps()
/linux-4.1.27/drivers/clk/sunxi/
H A Dclk-sun8i-mbus.c36 * achieve frequencies higher than the parent frequency sun8i_a23_get_mbus_factors()
48 /* we were called to round the frequency, we can now return */ sun8i_a23_get_mbus_factors()
/linux-4.1.27/drivers/clk/qcom/
H A Dclk-pll.h21 * struct pll_freq_tbl - PLL frequency table
44 * @freq_tbl: PLL frequency table
/linux-4.1.27/arch/mips/cobalt/
H A Dtime.c38 * MIPS counter frequency is measured during a 100msec interval plat_time_init()
53 printk(KERN_INFO "MIPS counter frequency %dHz\n", mips_hpt_frequency); plat_time_init()
/linux-4.1.27/arch/mips/mti-sead3/
H A Dsead3-time.c20 * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect.
95 pr_debug("CPU frequency %d.%02d MHz\n", (est_freq / 1000000), plat_time_init()
/linux-4.1.27/arch/blackfin/include/asm/
H A Dtime.h29 * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 .
30 * Whenever we change the Core Clock frequency changes we immediately
/linux-4.1.27/arch/arm/kernel/
H A Dsmp_twd.c104 * Updates clockevent frequency when the cpu frequency changes.
105 * Called on the cpu that is changing frequency with interrupts disabled.
121 * frequency. The timer is local to a cpu, so cross-call to the twd_rate_change()
149 * Updates clockevent frequency when the cpu frequency changes.
150 * Called on the cpu that is changing frequency with interrupts disabled.
166 * frequency. The timer is local to a cpu, so cross-call to the twd_cpufreq_transition()
/linux-4.1.27/drivers/media/radio/
H A Dradio-typhoon.c23 * There is no explicit mute/unmute. So I set the radio frequency to a
25 * The frequency change is necessary since the card never seems to be
88 * The frequency transfer curve is not linear. The best fit I could typhoon_s_frequency()
93 * where frequency f is in MHz. Since we don't have exp in the kernel, typhoon_s_frequency()
163 printk(KERN_ERR "%s: You must set a frequency (in kHz) used when muting the card,\n", typhoon_init()
/linux-4.1.27/arch/arm/mach-shmobile/
H A Dsetup-rcar-gen2.c83 * a potentially incorrect fixed 13 MHz frequency. To be rcar_gen2_timer_init()
85 * frequency EXTAL / 2 which can be determined by the MD pins. rcar_gen2_timer_init()
103 /* The arch timer frequency equals EXTAL / 2 */ rcar_gen2_timer_init()
112 * right frequency. The timer is only configurable in secure mode rcar_gen2_timer_init()
119 /* Update registers with correct frequency */ rcar_gen2_timer_init()
/linux-4.1.27/include/linux/mfd/
H A Dsi476x-reports.h58 * the original frequency.
66 * @readfreq: Current tuned frequency.
67 * @freqoff: Signed frequency offset.
113 * @hblend_int: If set, indicates that HiBlend cutoff frequency is
115 * @hicut_int: If set, indicates that HiCut cutoff frequency is lower
/linux-4.1.27/arch/sparc/include/asm/
H A Dbbc.h167 * clock frequency change trigger to the main system devices (Schizo and
171 * a) Choose new frequency: full, 1/2 or 1/32
172 * b) Program this desired frequency into the cpus and Schizo.
176 #define BBC_ES_CTRL_1_1 0x01 /* Full frequency */
177 #define BBC_ES_CTRL_1_2 0x02 /* 1/2 frequency */
178 #define BBC_ES_CTRL_1_32 0x20 /* 1/32 frequency */
182 * of BBC clock cycles (which is half the system frequency) between
189 * of BBC clock cycles (which is half the system frequency) between
196 * BBC clock cycles (which is half the system frequency) between the
204 * edge of the Safari clock at the new frequency.
/linux-4.1.27/drivers/media/pci/ttpci/
H A Dbudget.c212 u32 div = (c->frequency + 479500) / 125; alps_bsrv2_tuner_set_params()
214 if (c->frequency > 2000000) alps_bsrv2_tuner_set_params()
216 else if (c->frequency > 1800000) alps_bsrv2_tuner_set_params()
218 else if (c->frequency > 1600000) alps_bsrv2_tuner_set_params()
220 else if (c->frequency > 1200000) alps_bsrv2_tuner_set_params()
222 else if (c->frequency >= 1100000) alps_bsrv2_tuner_set_params()
232 // divisor frequency to 62.5kHz and divide by 125 above alps_bsrv2_tuner_set_params()
255 div = (c->frequency + 35937500 + 31250) / 62500; alps_tdbe2_tuner_set_params()
260 data[3] = (c->frequency < 174000000 ? 0x88 : c->frequency < 470000000 ? 0x84 : 0x81); alps_tdbe2_tuner_set_params()
290 div = (36125000 + c->frequency) / 166666; grundig_29504_401_tuner_set_params()
294 if (c->frequency < 175000000) grundig_29504_401_tuner_set_params()
296 else if (c->frequency < 390000000) grundig_29504_401_tuner_set_params()
298 else if (c->frequency < 470000000) grundig_29504_401_tuner_set_params()
300 else if (c->frequency < 750000000) grundig_29504_401_tuner_set_params()
305 if (c->frequency < 175000000) grundig_29504_401_tuner_set_params()
307 else if (c->frequency < 470000000) grundig_29504_401_tuner_set_params()
341 div = c->frequency / 125; grundig_29504_451_tuner_set_params()
365 div = c->frequency / 1000; s5h1420_tuner_set_params()
/linux-4.1.27/drivers/clk/zynq/
H A Dpll.c57 * zynq_pll_round_rate() - Round a clock frequency
59 * @rate: Desired clock frequency
60 * @prate: Clock frequency of parent clock
61 * Returns frequency closest to @rate the hardware can generate.
78 * zynq_pll_recalc_rate() - Recalculate clock frequency
80 * @parent_rate: Clock frequency of parent clock
81 * Returns current clock frequency.
/linux-4.1.27/arch/openrisc/kernel/
H A Dsetup.c189 if (of_property_read_u32(cpu, "clock-frequency", setup_cpuinfo()
192 "Device tree missing CPU 'clock-frequency' parameter." setup_cpuinfo()
193 "Assuming frequency 25MHZ" setup_cpuinfo()
265 * from the clock frequency passed in via the device tree
274 val = of_get_property(cpu, "clock-frequency", NULL); calibrate_delay()
276 panic("no cpu 'clock-frequency' parameter in device tree"); calibrate_delay()
335 "frequency\t: %ld\n" show_cpuinfo()
/linux-4.1.27/tools/power/cpupower/utils/idle_monitor/
H A Dmperf_monitor.c63 * The max frequency mperf is ticking at (in C0), either retrieved via:
64 * 1) calculated after measurements if we know TSC ticks at mperf/P0 frequency
176 dprint("%s: Average freq based on %s maximum frequency:\n", mperf_get_count_freq()
220 * Mperf register is defined to tick at P0 (maximum) frequency
223 * we use TSC counter if it reliably ticks at P0/mperf frequency.
266 } else { /* Use sysfs max frequency if available */ } init_maxfreq_mode()
288 * 1) Average frequency a CPU resided in
/linux-4.1.27/drivers/clk/at91/
H A Dclk-slow.c51 unsigned long frequency; member in struct:clk_slow_rc_osc
187 return osc->frequency; clk_slow_rc_osc_recalc_rate()
236 unsigned long frequency, at91_clk_register_slow_rc_osc()
259 osc->frequency = frequency; at91_clk_register_slow_rc_osc()
274 u32 frequency = 0; of_at91sam9x5_clk_slow_rc_osc_setup() local
280 of_property_read_u32(np, "clock-frequency", &frequency); of_at91sam9x5_clk_slow_rc_osc_setup()
284 clk = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy, of_at91sam9x5_clk_slow_rc_osc_setup()
234 at91_clk_register_slow_rc_osc(void __iomem *sckcr, const char *name, unsigned long frequency, unsigned long accuracy, unsigned long startup) at91_clk_register_slow_rc_osc() argument
/linux-4.1.27/drivers/devfreq/
H A Dgovernor_simpleondemand.c64 /* Set MAX if we do not know the initial frequency */ devfreq_simple_ondemand_func()
70 /* Keep the current frequency */ devfreq_simple_ondemand_func()
77 /* Set the desired frequency based on the load */ devfreq_simple_ondemand_func()
/linux-4.1.27/tools/power/cpupower/utils/
H A Dcpufreq-info.c63 printf(_(" minimum CPU frequency - maximum CPU frequency - governor\n")); proc_cpufreq_output()
275 printf(_(" CPUs which run at the same hardware frequency: ")); debug_output_one()
286 printf(_(" CPUs which need to have their frequency coordinated by software: ")); debug_output_one()
312 printf(_(" available frequency steps: ")); debug_output_one()
314 print_speed(freqs->frequency); debug_output_one()
318 print_speed(freqs->frequency); debug_output_one()
336 printf(_(" current policy: frequency should be within ")); debug_output_one()
349 printf(_(" current CPU frequency is ")); debug_output_one()
361 print_speed(stats->frequency); debug_output_one()
506 print_speed(stats->frequency); get_freq_stats()
511 stats->frequency, stats->time_in_state); get_freq_stats()
/linux-4.1.27/include/linux/iio/
H A Dsysfs.h78 * IIO_DEV_ATTR_SAMP_FREQ - sets any internal clock frequency
96 * @_string: frequency string for the attribute
111 * @_string: frequency string for the attribute
/linux-4.1.27/drivers/net/
H A Dsb1000.c121 int* frequency);
123 int frequency);
576 /* get SB1000 frequency */
578 sb1000_get_frequency(const int ioaddr[], const char* name, int* frequency) sb1000_get_frequency() argument
590 *frequency = ((st[1] << 8 | st[2]) << 8 | st[3]) << 8 | st[4]; sb1000_get_frequency()
594 /* set SB1000 frequency */
596 sb1000_set_frequency(const int ioaddr[], const char* name, int frequency) sb1000_set_frequency() argument
605 if (frequency < FrequencyLowerLimit || frequency > FrequencyUpperLimit) { sb1000_set_frequency()
606 printk(KERN_ERR "%s: frequency chosen (%d kHz) is not in the range " sb1000_set_frequency()
607 "[%d,%d] kHz\n", name, frequency, FrequencyLowerLimit, sb1000_set_frequency()
614 Command0[5] = frequency & 0xff; sb1000_set_frequency()
615 frequency >>= 8; sb1000_set_frequency()
616 Command0[4] = frequency & 0xff; sb1000_set_frequency()
617 frequency >>= 8; sb1000_set_frequency()
618 Command0[3] = frequency & 0xff; sb1000_set_frequency()
619 frequency >>= 8; sb1000_set_frequency()
620 Command0[2] = frequency & 0xff; sb1000_set_frequency()
1000 int ioaddr[2], status, frequency; sb1000_dev_ioctl() local
1031 case SIOCGCMFREQUENCY: /* get frequency */ sb1000_dev_ioctl()
1032 if ((status = sb1000_get_frequency(ioaddr, name, &frequency))) sb1000_dev_ioctl()
1034 if(put_user(frequency, (int __user *) ifr->ifr_data)) sb1000_dev_ioctl()
1038 case SIOCSCMFREQUENCY: /* set frequency */ sb1000_dev_ioctl()
1041 if(get_user(frequency, (int __user *) ifr->ifr_data)) sb1000_dev_ioctl()
1043 if ((status = sb1000_set_frequency(ioaddr, name, frequency))) sb1000_dev_ioctl()
/linux-4.1.27/drivers/staging/iio/adc/
H A Dad7192.h23 * @ext_clk_Hz: the external clock frequency in Hz, if not set
/linux-4.1.27/drivers/net/wireless/b43/
H A Dradio_2059.h27 /* The channel frequency in MHz */
/linux-4.1.27/arch/x86/include/asm/
H A Dtimer.h19 * Continuity means that when our frequency changes our slope (b); we want to
/linux-4.1.27/arch/xtensa/kernel/
H A Dplatform.c43 pr_err("ERROR: Cannot calibrate cpu frequency! Assuming 10MHz.\n");
/linux-4.1.27/arch/mn10300/kernel/
H A Dprofile.c32 * - frequency: (33330000*2) / 8 / 20625 = 202Hz profile_init()

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