Searched refs:echannel (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/tile/
H A Dtilegx.c120 /* The completions for a given cpu and echannel. */
130 /* The transmit wake timer for a given cpu and echannel. */
187 int echannel; member in struct:tile_net_priv
201 /* Egress info, indexed by "priv->echannel"
747 &info->mpipe[instance].tx_wake[priv->echannel]; tile_net_schedule_tx_wake_timer()
1364 static int tile_net_init_egress(struct net_device *dev, int echannel) tile_net_init_egress() argument
1378 if (md->egress_for_echannel[echannel].equeue != NULL) tile_net_init_egress()
1427 rc = gxio_mpipe_equeue_init(equeue, &md->context, ering, echannel, tile_net_init_egress()
1443 " properly on channel %d\n", echannel); tile_net_init_egress()
1448 md->egress_for_echannel[echannel].equeue = equeue; tile_net_init_egress()
1449 md->egress_for_echannel[echannel].headers = headers; tile_net_init_egress()
1534 priv->echannel = rc; tile_net_open()
1540 priv->echannel = rc; tile_net_open()
1543 /* Initialize egress info (if needed). Once ever, per echannel. */ tile_net_open()
1544 rc = tile_net_init_egress(dev, priv->echannel); tile_net_open()
1560 &info->mpipe[instance].tx_wake[priv->echannel]; for_each_online_cpu()
1585 priv->echannel = -1;
1604 &info->mpipe[instance].tx_wake[priv->echannel]; for_each_online_cpu()
1623 priv->echannel = -1;
1932 int channel = priv->echannel; tile_net_tx_tso()
2004 &md->egress_for_echannel[priv->echannel]; tile_net_tx()
2007 info->mpipe[instance].comps_for_echannel[priv->echannel]; tile_net_tx()
2216 priv->echannel = -1; tile_net_dev_init()
/linux-4.1.27/drivers/isdn/hardware/mISDN/
H A Dhfcsusb.h274 struct dchannel ech; /* TODO : wait for struct echannel ;) */

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