| /linux-4.1.27/drivers/mtd/nand/ |
| H A D | sunxi_nand.c | 528 struct nand_ecc_ctrl *ecc = &chip->ecc; sunxi_nfc_hw_ecc_read_page() local
529 struct nand_ecclayout *layout = ecc->layout; sunxi_nfc_hw_ecc_read_page()
530 struct sunxi_nand_hw_ecc *data = ecc->priv; sunxi_nfc_hw_ecc_read_page()
545 for (i = 0; i < ecc->steps; i++) { sunxi_nfc_hw_ecc_read_page()
547 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, i * ecc->size, -1); sunxi_nfc_hw_ecc_read_page()
549 offset = mtd->writesize + layout->eccpos[i * ecc->bytes] - 4; sunxi_nfc_hw_ecc_read_page()
551 chip->read_buf(mtd, NULL, ecc->size); sunxi_nfc_hw_ecc_read_page()
566 memcpy_fromio(buf + (i * ecc->size), sunxi_nfc_hw_ecc_read_page()
567 nfc->regs + NFC_RAM0_BASE, ecc->size); sunxi_nfc_hw_ecc_read_page()
586 ecc->bytes + 4); sunxi_nfc_hw_ecc_read_page()
591 cnt = ecc->layout->oobfree[ecc->steps].length; sunxi_nfc_hw_ecc_read_page()
594 ecc->layout->oobfree[ecc->steps].offset; sunxi_nfc_hw_ecc_read_page()
614 struct nand_ecc_ctrl *ecc = &chip->ecc; sunxi_nfc_hw_ecc_write_page() local
615 struct nand_ecclayout *layout = ecc->layout; sunxi_nfc_hw_ecc_write_page()
616 struct sunxi_nand_hw_ecc *data = ecc->priv; sunxi_nfc_hw_ecc_write_page()
630 for (i = 0; i < ecc->steps; i++) { sunxi_nfc_hw_ecc_write_page()
632 chip->cmdfunc(mtd, NAND_CMD_RNDIN, i * ecc->size, -1); sunxi_nfc_hw_ecc_write_page()
634 chip->write_buf(mtd, buf + (i * ecc->size), ecc->size); sunxi_nfc_hw_ecc_write_page()
636 offset = layout->eccpos[i * ecc->bytes] - 4 + mtd->writesize; sunxi_nfc_hw_ecc_write_page()
658 cnt = ecc->layout->oobfree[i].length; sunxi_nfc_hw_ecc_write_page()
661 ecc->layout->oobfree[i].offset; sunxi_nfc_hw_ecc_write_page()
682 struct nand_ecc_ctrl *ecc = &chip->ecc; sunxi_nfc_hw_syndrome_ecc_read_page() local
683 struct sunxi_nand_hw_ecc *data = ecc->priv; sunxi_nfc_hw_syndrome_ecc_read_page()
699 for (i = 0; i < ecc->steps; i++) { sunxi_nfc_hw_syndrome_ecc_read_page()
700 chip->read_buf(mtd, NULL, ecc->size); sunxi_nfc_hw_syndrome_ecc_read_page()
709 memcpy_fromio(buf, nfc->regs + NFC_RAM0_BASE, ecc->size); sunxi_nfc_hw_syndrome_ecc_read_page()
710 buf += ecc->size; sunxi_nfc_hw_syndrome_ecc_read_page()
711 offset += ecc->size; sunxi_nfc_hw_syndrome_ecc_read_page()
723 chip->read_buf(mtd, oob, ecc->bytes + ecc->prepad); sunxi_nfc_hw_syndrome_ecc_read_page()
724 oob += ecc->bytes + ecc->prepad; sunxi_nfc_hw_syndrome_ecc_read_page()
727 offset += ecc->bytes + ecc->prepad; sunxi_nfc_hw_syndrome_ecc_read_page()
750 struct nand_ecc_ctrl *ecc = &chip->ecc; sunxi_nfc_hw_syndrome_ecc_write_page() local
751 struct sunxi_nand_hw_ecc *data = ecc->priv; sunxi_nfc_hw_syndrome_ecc_write_page()
766 for (i = 0; i < ecc->steps; i++) { sunxi_nfc_hw_syndrome_ecc_write_page()
767 chip->write_buf(mtd, buf + (i * ecc->size), ecc->size); sunxi_nfc_hw_syndrome_ecc_write_page()
768 offset += ecc->size; sunxi_nfc_hw_syndrome_ecc_write_page()
782 offset += ecc->bytes + ecc->prepad; sunxi_nfc_hw_syndrome_ecc_write_page()
783 oob += ecc->bytes + ecc->prepad; sunxi_nfc_hw_syndrome_ecc_write_page()
917 struct nand_ecc_ctrl *ecc, sunxi_nand_hw_common_ecc_ctrl_init()
936 if (ecc->strength <= strengths[i]) sunxi_nand_hw_common_ecc_ctrl_init()
949 ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * 1024), 8); sunxi_nand_hw_common_ecc_ctrl_init()
952 ecc->bytes = ALIGN(ecc->bytes, 2); sunxi_nand_hw_common_ecc_ctrl_init()
955 nsectors = mtd->writesize / ecc->size; sunxi_nand_hw_common_ecc_ctrl_init()
957 if (mtd->oobsize < ((ecc->bytes + 4) * nsectors)) { sunxi_nand_hw_common_ecc_ctrl_init()
962 layout->eccbytes = (ecc->bytes * nsectors); sunxi_nand_hw_common_ecc_ctrl_init()
964 ecc->layout = layout; sunxi_nand_hw_common_ecc_ctrl_init()
965 ecc->priv = data; sunxi_nand_hw_common_ecc_ctrl_init()
975 static void sunxi_nand_hw_common_ecc_ctrl_cleanup(struct nand_ecc_ctrl *ecc) sunxi_nand_hw_common_ecc_ctrl_cleanup() argument
977 kfree(ecc->priv); sunxi_nand_hw_common_ecc_ctrl_cleanup()
981 struct nand_ecc_ctrl *ecc, sunxi_nand_hw_ecc_ctrl_init()
989 ret = sunxi_nand_hw_common_ecc_ctrl_init(mtd, ecc, np); sunxi_nand_hw_ecc_ctrl_init()
993 ecc->read_page = sunxi_nfc_hw_ecc_read_page; sunxi_nand_hw_ecc_ctrl_init()
994 ecc->write_page = sunxi_nfc_hw_ecc_write_page; sunxi_nand_hw_ecc_ctrl_init()
995 layout = ecc->layout; sunxi_nand_hw_ecc_ctrl_init()
996 nsectors = mtd->writesize / ecc->size; sunxi_nand_hw_ecc_ctrl_init()
1003 ecc->bytes; sunxi_nand_hw_ecc_ctrl_init()
1015 for (j = 0; j < ecc->bytes; j++) sunxi_nand_hw_ecc_ctrl_init()
1016 layout->eccpos[(ecc->bytes * i) + j] = sunxi_nand_hw_ecc_ctrl_init()
1021 if (mtd->oobsize > (ecc->bytes + 4) * nsectors) { sunxi_nand_hw_ecc_ctrl_init()
1025 ecc->bytes; sunxi_nand_hw_ecc_ctrl_init()
1027 ((ecc->bytes + 4) * nsectors); sunxi_nand_hw_ecc_ctrl_init()
1034 struct nand_ecc_ctrl *ecc, sunxi_nand_hw_syndrome_ecc_ctrl_init()
1042 ret = sunxi_nand_hw_common_ecc_ctrl_init(mtd, ecc, np); sunxi_nand_hw_syndrome_ecc_ctrl_init()
1046 ecc->prepad = 4; sunxi_nand_hw_syndrome_ecc_ctrl_init()
1047 ecc->read_page = sunxi_nfc_hw_syndrome_ecc_read_page; sunxi_nand_hw_syndrome_ecc_ctrl_init()
1048 ecc->write_page = sunxi_nfc_hw_syndrome_ecc_write_page; sunxi_nand_hw_syndrome_ecc_ctrl_init()
1050 layout = ecc->layout; sunxi_nand_hw_syndrome_ecc_ctrl_init()
1051 nsectors = mtd->writesize / ecc->size; sunxi_nand_hw_syndrome_ecc_ctrl_init()
1053 for (i = 0; i < (ecc->bytes * nsectors); i++) sunxi_nand_hw_syndrome_ecc_ctrl_init()
1062 static void sunxi_nand_ecc_cleanup(struct nand_ecc_ctrl *ecc) sunxi_nand_ecc_cleanup() argument
1064 switch (ecc->mode) { sunxi_nand_ecc_cleanup()
1067 sunxi_nand_hw_common_ecc_ctrl_cleanup(ecc); sunxi_nand_ecc_cleanup()
1070 kfree(ecc->layout); sunxi_nand_ecc_cleanup()
1076 static int sunxi_nand_ecc_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc, sunxi_nand_ecc_init() argument
1087 ecc->size = blk_size; sunxi_nand_ecc_init()
1088 ecc->strength = strength; sunxi_nand_ecc_init()
1090 ecc->size = nand->ecc_step_ds; sunxi_nand_ecc_init()
1091 ecc->strength = nand->ecc_strength_ds; sunxi_nand_ecc_init()
1094 if (!ecc->size || !ecc->strength) sunxi_nand_ecc_init()
1097 ecc->mode = NAND_ECC_HW; sunxi_nand_ecc_init()
1101 ecc->mode = ret; sunxi_nand_ecc_init()
1103 switch (ecc->mode) { sunxi_nand_ecc_init()
1107 ret = sunxi_nand_hw_ecc_ctrl_init(mtd, ecc, np); sunxi_nand_ecc_init()
1112 ret = sunxi_nand_hw_syndrome_ecc_ctrl_init(mtd, ecc, np); sunxi_nand_ecc_init()
1117 ecc->layout = kzalloc(sizeof(*ecc->layout), GFP_KERNEL); sunxi_nand_ecc_init()
1118 if (!ecc->layout) sunxi_nand_ecc_init()
1120 ecc->layout->oobfree[0].length = mtd->oobsize; sunxi_nand_ecc_init()
1252 ret = sunxi_nand_ecc_init(mtd, &nand->ecc, np); sunxi_nand_chip_init()
1306 sunxi_nand_ecc_cleanup(&chip->nand.ecc); sunxi_nand_chips_cleanup()
916 sunxi_nand_hw_common_ecc_ctrl_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc, struct device_node *np) sunxi_nand_hw_common_ecc_ctrl_init() argument
980 sunxi_nand_hw_ecc_ctrl_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc, struct device_node *np) sunxi_nand_hw_ecc_ctrl_init() argument
1033 sunxi_nand_hw_syndrome_ecc_ctrl_init(struct mtd_info *mtd, struct nand_ecc_ctrl *ecc, struct device_node *np) sunxi_nand_hw_syndrome_ecc_ctrl_init() argument
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| H A D | omap2.c | 125 /* GPMC ecc engine settings for read */
132 /* GPMC ecc engine settings for write */
726 * @ecc_buf: buffer to store ecc code
746 * @ecc_data1: ecc code from nand spare area
747 * @ecc_data2: ecc code from hardware register obtained from hardware ecc
876 * @read_ecc: ecc read from nand flash
877 * @calc_ecc: ecc read from HW ECC registers
879 * Compares the ecc read from nand spare area with ECC registers values
895 if ((info->nand.ecc.mode == NAND_ECC_HW) && omap_correct_data()
896 (info->nand.ecc.size == 2048)) omap_correct_data()
919 * @dat: The pointer to data on which ecc is computed
939 /* read ecc result */ omap_calculate_ecc()
950 * omap_enable_hwecc - This function enables the hardware ecc functionality
962 /* clear ecc and enable bits */ omap_enable_hwecc()
966 /* program ecc and result sizes */ omap_enable_hwecc()
967 val = ((((info->nand.ecc.size >> 1) - 1) << ECCSIZE1_SHIFT) | omap_enable_hwecc()
1079 nsectors = chip->ecc.steps; omap_enable_hwecc_bch()
1099 nsectors = chip->ecc.steps; omap_enable_hwecc_bch()
1112 nsectors = chip->ecc.steps; omap_enable_hwecc_bch()
1129 /* Configure ecc size for BCH */ omap_enable_hwecc_bch()
1146 /* Clear ecc and enable bits */ omap_enable_hwecc_bch()
1157 * @dat: The pointer to data on which ecc is computed
1160 * Support calculating of BCH4/8 ecc vectors for the page
1167 int eccbytes = info->nand.ecc.bytes; omap_calculate_ecc_bch()
1299 for (i = 0; i < info->nand.ecc.size; i++) { erased_sector_bitflips()
1301 if (flip_bits > info->nand.ecc.strength) erased_sector_bitflips()
1305 for (i = 0; i < info->nand.ecc.bytes - 1; i++) { erased_sector_bitflips()
1307 if (flip_bits > info->nand.ecc.strength) erased_sector_bitflips()
1316 memset(data, 0xFF, info->nand.ecc.size); erased_sector_bitflips()
1317 memset(oob, 0xFF, info->nand.ecc.bytes); erased_sector_bitflips()
1327 * @read_ecc: ecc read from nand flash
1328 * @calc_ecc: ecc read from HW ECC registers
1330 * Calculated ecc vector reported as zero in case of non-error pages.
1331 * In case of non-zero ecc vector, first filter out erased-pages, and
1339 struct nand_ecc_ctrl *ecc = &info->nand.ecc; omap_elm_correct_data() local
1340 int eccsteps = info->nand.ecc.steps; omap_elm_correct_data()
1356 actual_eccbytes = ecc->bytes - 1; omap_elm_correct_data()
1361 actual_eccbytes = ecc->bytes - 1; omap_elm_correct_data()
1365 actual_eccbytes = ecc->bytes; omap_elm_correct_data()
1381 * In case of error, non zero ecc reported. omap_elm_correct_data()
1385 eccflag = 1; /* non zero ecc, error present */ omap_elm_correct_data()
1398 buf = &data[info->nand.ecc.size * i]; omap_elm_correct_data()
1425 /* Update the ecc vector */ omap_elm_correct_data()
1426 calc_ecc += ecc->bytes; omap_elm_correct_data()
1427 read_ecc += ecc->bytes; omap_elm_correct_data()
1458 error_max = (ecc->size + actual_eccbytes) * 8; omap_elm_correct_data()
1490 data += ecc->size; omap_elm_correct_data()
1491 spare_ecc += ecc->bytes; omap_elm_correct_data()
1498 * omap_write_page_bch - BCH ecc based write page function for entire page
1511 uint32_t *eccpos = chip->ecc.layout->eccpos; omap_write_page_bch()
1513 /* Enable GPMC ecc engine */ omap_write_page_bch()
1514 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); omap_write_page_bch()
1519 /* Update ecc vector from GPMC result registers */ omap_write_page_bch()
1520 chip->ecc.calculate(mtd, buf, &ecc_calc[0]); omap_write_page_bch()
1522 for (i = 0; i < chip->ecc.total; i++) omap_write_page_bch()
1525 /* Write ecc vector to OOB area */ omap_write_page_bch()
1531 * omap_read_page_bch - BCH ecc based page read function for entire page
1538 * For BCH ecc scheme, GPMC used for syndrome calculation and ELM module
1542 * ecc engine enabled. ecc vector updated after read of OOB data.
1543 * For non error pages ecc vector reported as zero.
1550 uint32_t *eccpos = chip->ecc.layout->eccpos; omap_read_page_bch()
1552 uint32_t oob_pos = mtd->writesize + chip->ecc.layout->eccpos[0]; omap_read_page_bch()
1556 /* Enable GPMC ecc engine */ omap_read_page_bch()
1557 chip->ecc.hwctl(mtd, NAND_ECC_READ); omap_read_page_bch()
1564 chip->read_buf(mtd, oob, chip->ecc.total); omap_read_page_bch()
1566 /* Calculate ecc bytes */ omap_read_page_bch()
1567 chip->ecc.calculate(mtd, buf, ecc_calc); omap_read_page_bch()
1569 memcpy(ecc_code, &chip->oob_poi[eccpos[0]], chip->ecc.total); omap_read_page_bch()
1571 stat = chip->ecc.correct(mtd, buf, ecc_code, ecc_calc); omap_read_page_bch()
1690 nand_chip->ecc.priv = NULL; omap_nand_probe()
1827 nand_chip->ecc.mode = NAND_ECC_SOFT; omap_nand_probe()
1832 nand_chip->ecc.mode = NAND_ECC_HW; omap_nand_probe()
1833 nand_chip->ecc.bytes = 3; omap_nand_probe()
1834 nand_chip->ecc.size = 512; omap_nand_probe()
1835 nand_chip->ecc.strength = 1; omap_nand_probe()
1836 nand_chip->ecc.calculate = omap_calculate_ecc; omap_nand_probe()
1837 nand_chip->ecc.hwctl = omap_enable_hwecc; omap_nand_probe()
1838 nand_chip->ecc.correct = omap_correct_data; omap_nand_probe()
1840 ecclayout->eccbytes = nand_chip->ecc.bytes * omap_nand_probe()
1842 nand_chip->ecc.size); omap_nand_probe()
1849 /* no reserved-marker in ecclayout for this ecc-scheme */ omap_nand_probe()
1856 nand_chip->ecc.mode = NAND_ECC_HW; omap_nand_probe()
1857 nand_chip->ecc.size = 512; omap_nand_probe()
1858 nand_chip->ecc.bytes = 7; omap_nand_probe()
1859 nand_chip->ecc.strength = 4; omap_nand_probe()
1860 nand_chip->ecc.hwctl = omap_enable_hwecc_bch; omap_nand_probe()
1861 nand_chip->ecc.correct = nand_bch_correct_data; omap_nand_probe()
1862 nand_chip->ecc.calculate = omap_calculate_ecc_bch; omap_nand_probe()
1864 ecclayout->eccbytes = nand_chip->ecc.bytes * omap_nand_probe()
1866 nand_chip->ecc.size); omap_nand_probe()
1870 if (((i + 1) % nand_chip->ecc.bytes) == 0) omap_nand_probe()
1877 nand_chip->ecc.priv = nand_bch_init(mtd, omap_nand_probe()
1878 nand_chip->ecc.size, omap_nand_probe()
1879 nand_chip->ecc.bytes, omap_nand_probe()
1881 if (!nand_chip->ecc.priv) { omap_nand_probe()
1890 nand_chip->ecc.mode = NAND_ECC_HW; omap_nand_probe()
1891 nand_chip->ecc.size = 512; omap_nand_probe()
1893 nand_chip->ecc.bytes = 7 + 1; omap_nand_probe()
1894 nand_chip->ecc.strength = 4; omap_nand_probe()
1895 nand_chip->ecc.hwctl = omap_enable_hwecc_bch; omap_nand_probe()
1896 nand_chip->ecc.correct = omap_elm_correct_data; omap_nand_probe()
1897 nand_chip->ecc.calculate = omap_calculate_ecc_bch; omap_nand_probe()
1898 nand_chip->ecc.read_page = omap_read_page_bch; omap_nand_probe()
1899 nand_chip->ecc.write_page = omap_write_page_bch; omap_nand_probe()
1901 ecclayout->eccbytes = nand_chip->ecc.bytes * omap_nand_probe()
1903 nand_chip->ecc.size); omap_nand_probe()
1912 info->mtd.writesize / nand_chip->ecc.size, omap_nand_probe()
1913 nand_chip->ecc.size, nand_chip->ecc.bytes); omap_nand_probe()
1920 nand_chip->ecc.mode = NAND_ECC_HW; omap_nand_probe()
1921 nand_chip->ecc.size = 512; omap_nand_probe()
1922 nand_chip->ecc.bytes = 13; omap_nand_probe()
1923 nand_chip->ecc.strength = 8; omap_nand_probe()
1924 nand_chip->ecc.hwctl = omap_enable_hwecc_bch; omap_nand_probe()
1925 nand_chip->ecc.correct = nand_bch_correct_data; omap_nand_probe()
1926 nand_chip->ecc.calculate = omap_calculate_ecc_bch; omap_nand_probe()
1928 ecclayout->eccbytes = nand_chip->ecc.bytes * omap_nand_probe()
1930 nand_chip->ecc.size); omap_nand_probe()
1934 if (((i + 1) % nand_chip->ecc.bytes) == 0) omap_nand_probe()
1941 nand_chip->ecc.priv = nand_bch_init(mtd, omap_nand_probe()
1942 nand_chip->ecc.size, omap_nand_probe()
1943 nand_chip->ecc.bytes, omap_nand_probe()
1945 if (!nand_chip->ecc.priv) { omap_nand_probe()
1954 nand_chip->ecc.mode = NAND_ECC_HW; omap_nand_probe()
1955 nand_chip->ecc.size = 512; omap_nand_probe()
1957 nand_chip->ecc.bytes = 13 + 1; omap_nand_probe()
1958 nand_chip->ecc.strength = 8; omap_nand_probe()
1959 nand_chip->ecc.hwctl = omap_enable_hwecc_bch; omap_nand_probe()
1960 nand_chip->ecc.correct = omap_elm_correct_data; omap_nand_probe()
1961 nand_chip->ecc.calculate = omap_calculate_ecc_bch; omap_nand_probe()
1962 nand_chip->ecc.read_page = omap_read_page_bch; omap_nand_probe()
1963 nand_chip->ecc.write_page = omap_write_page_bch; omap_nand_probe()
1966 info->mtd.writesize / nand_chip->ecc.size, omap_nand_probe()
1967 nand_chip->ecc.size, nand_chip->ecc.bytes); omap_nand_probe()
1972 ecclayout->eccbytes = nand_chip->ecc.bytes * omap_nand_probe()
1974 nand_chip->ecc.size); omap_nand_probe()
1985 nand_chip->ecc.mode = NAND_ECC_HW; omap_nand_probe()
1986 nand_chip->ecc.size = 512; omap_nand_probe()
1987 nand_chip->ecc.bytes = 26; omap_nand_probe()
1988 nand_chip->ecc.strength = 16; omap_nand_probe()
1989 nand_chip->ecc.hwctl = omap_enable_hwecc_bch; omap_nand_probe()
1990 nand_chip->ecc.correct = omap_elm_correct_data; omap_nand_probe()
1991 nand_chip->ecc.calculate = omap_calculate_ecc_bch; omap_nand_probe()
1992 nand_chip->ecc.read_page = omap_read_page_bch; omap_nand_probe()
1993 nand_chip->ecc.write_page = omap_write_page_bch; omap_nand_probe()
1996 info->mtd.writesize / nand_chip->ecc.size, omap_nand_probe()
1997 nand_chip->ecc.size, nand_chip->ecc.bytes); omap_nand_probe()
2002 ecclayout->eccbytes = nand_chip->ecc.bytes * omap_nand_probe()
2004 nand_chip->ecc.size); omap_nand_probe()
2031 nand_chip->ecc.layout = ecclayout; omap_nand_probe()
2051 if (nand_chip->ecc.priv) { omap_nand_probe()
2052 nand_bch_free(nand_chip->ecc.priv); omap_nand_probe()
2053 nand_chip->ecc.priv = NULL; omap_nand_probe()
2064 if (nand_chip->ecc.priv) { omap_nand_remove()
2065 nand_bch_free(nand_chip->ecc.priv); omap_nand_remove()
2066 nand_chip->ecc.priv = NULL; omap_nand_remove()
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| H A D | nand_bch.c | 35 * @ecclayout: private ecc layout for this BCH configuration
37 * @eccmask: XOR ecc mask, allows erased pages to be decoded as valid
56 struct nand_bch_control *nbc = chip->ecc.priv; nand_bch_calculate_ecc()
59 memset(code, 0, chip->ecc.bytes); nand_bch_calculate_ecc()
60 encode_bch(nbc->bch, buf, chip->ecc.size, code); nand_bch_calculate_ecc()
63 for (i = 0; i < chip->ecc.bytes; i++) nand_bch_calculate_ecc()
83 struct nand_bch_control *nbc = chip->ecc.priv; nand_bch_correct_data()
87 count = decode_bch(nbc->bch, NULL, chip->ecc.size, read_ecc, calc_ecc, nand_bch_correct_data()
91 if (errloc[i] < (chip->ecc.size*8)) nand_bch_correct_data()
94 /* else error in ecc, no action needed */ nand_bch_correct_data()
100 printk(KERN_ERR "ecc unrecoverable error\n"); nand_bch_correct_data()
110 * @eccsize: ecc block size in bytes
111 * @eccbytes: ecc length in bytes
136 printk(KERN_WARNING "ecc parameters not supplied\n"); nand_bch_init()
160 /* if no ecc placement scheme was provided, build one */ nand_bch_init()
180 /* put ecc bytes at oob tail */ nand_bch_init()
196 printk(KERN_WARNING "invalid ecc layout\n"); nand_bch_init()
205 * compute and store the inverted ecc of an erased ecc block nand_bch_init()
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| H A D | nand_base.c | 1105 * nand_read_page_raw - [INTERN] read raw page data without ecc
1124 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
1137 int eccsize = chip->ecc.size; nand_read_page_raw_syndrome()
1138 int eccbytes = chip->ecc.bytes; nand_read_page_raw_syndrome()
1142 for (steps = chip->ecc.steps; steps > 0; steps--) { nand_read_page_raw_syndrome()
1146 if (chip->ecc.prepad) { nand_read_page_raw_syndrome()
1147 chip->read_buf(mtd, oob, chip->ecc.prepad); nand_read_page_raw_syndrome()
1148 oob += chip->ecc.prepad; nand_read_page_raw_syndrome()
1154 if (chip->ecc.postpad) { nand_read_page_raw_syndrome()
1155 chip->read_buf(mtd, oob, chip->ecc.postpad); nand_read_page_raw_syndrome()
1156 oob += chip->ecc.postpad; nand_read_page_raw_syndrome()
1178 int i, eccsize = chip->ecc.size; nand_read_page_swecc()
1179 int eccbytes = chip->ecc.bytes; nand_read_page_swecc()
1180 int eccsteps = chip->ecc.steps; nand_read_page_swecc()
1184 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_read_page_swecc()
1187 chip->ecc.read_page_raw(mtd, chip, buf, 1, page); nand_read_page_swecc()
1190 chip->ecc.calculate(mtd, p, &ecc_calc[i]); nand_read_page_swecc()
1192 for (i = 0; i < chip->ecc.total; i++) nand_read_page_swecc()
1195 eccsteps = chip->ecc.steps; nand_read_page_swecc()
1201 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); nand_read_page_swecc()
1226 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_read_subpage()
1235 start_step = data_offs / chip->ecc.size; nand_read_subpage()
1236 end_step = (data_offs + readlen - 1) / chip->ecc.size; nand_read_subpage()
1238 index = start_step * chip->ecc.bytes; nand_read_subpage()
1240 /* Data size aligned to ECC ecc.size */ nand_read_subpage()
1241 datafrag_len = num_steps * chip->ecc.size; nand_read_subpage()
1242 eccfrag_len = num_steps * chip->ecc.bytes; nand_read_subpage()
1244 data_col_addr = start_step * chip->ecc.size; nand_read_subpage()
1253 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) nand_read_subpage()
1254 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]); nand_read_subpage()
1258 * ecc.pos. Let's make sure that there are no gaps in ECC positions. nand_read_subpage()
1278 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1)) nand_read_subpage()
1290 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { nand_read_subpage()
1293 stat = chip->ecc.correct(mtd, p, nand_read_subpage()
1318 int i, eccsize = chip->ecc.size; nand_read_page_hwecc()
1319 int eccbytes = chip->ecc.bytes; nand_read_page_hwecc()
1320 int eccsteps = chip->ecc.steps; nand_read_page_hwecc()
1324 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_read_page_hwecc()
1328 chip->ecc.hwctl(mtd, NAND_ECC_READ); nand_read_page_hwecc()
1330 chip->ecc.calculate(mtd, p, &ecc_calc[i]); nand_read_page_hwecc()
1334 for (i = 0; i < chip->ecc.total; i++) nand_read_page_hwecc()
1337 eccsteps = chip->ecc.steps; nand_read_page_hwecc()
1343 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); nand_read_page_hwecc()
1355 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
1371 int i, eccsize = chip->ecc.size; nand_read_page_hwecc_oob_first()
1372 int eccbytes = chip->ecc.bytes; nand_read_page_hwecc_oob_first()
1373 int eccsteps = chip->ecc.steps; nand_read_page_hwecc_oob_first()
1376 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_read_page_hwecc_oob_first()
1385 for (i = 0; i < chip->ecc.total; i++) nand_read_page_hwecc_oob_first()
1391 chip->ecc.hwctl(mtd, NAND_ECC_READ); nand_read_page_hwecc_oob_first()
1393 chip->ecc.calculate(mtd, p, &ecc_calc[i]); nand_read_page_hwecc_oob_first()
1395 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); nand_read_page_hwecc_oob_first()
1420 int i, eccsize = chip->ecc.size; nand_read_page_syndrome()
1421 int eccbytes = chip->ecc.bytes; nand_read_page_syndrome()
1422 int eccsteps = chip->ecc.steps; nand_read_page_syndrome()
1430 chip->ecc.hwctl(mtd, NAND_ECC_READ); nand_read_page_syndrome()
1433 if (chip->ecc.prepad) { nand_read_page_syndrome()
1434 chip->read_buf(mtd, oob, chip->ecc.prepad); nand_read_page_syndrome()
1435 oob += chip->ecc.prepad; nand_read_page_syndrome()
1438 chip->ecc.hwctl(mtd, NAND_ECC_READSYN); nand_read_page_syndrome()
1440 stat = chip->ecc.correct(mtd, p, oob, NULL); nand_read_page_syndrome()
1451 if (chip->ecc.postpad) { nand_read_page_syndrome()
1452 chip->read_buf(mtd, oob, chip->ecc.postpad); nand_read_page_syndrome()
1453 oob += chip->ecc.postpad; nand_read_page_syndrome()
1483 struct nand_oobfree *free = chip->ecc.layout->oobfree; nand_transfer_oob()
1600 * the read methods return max bitflips per ecc step. nand_do_read_ops()
1603 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi, nand_do_read_ops()
1608 ret = chip->ecc.read_subpage(mtd, chip, nand_do_read_ops()
1612 ret = chip->ecc.read_page(mtd, chip, bufpoi, nand_do_read_ops()
1773 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; nand_read_oob_syndrome()
1774 int eccsize = chip->ecc.size; nand_read_oob_syndrome()
1778 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page); nand_read_oob_syndrome()
1779 for (i = 0; i < chip->ecc.steps; i++) { nand_read_oob_syndrome()
1832 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; nand_write_oob_syndrome()
1833 int eccsize = chip->ecc.size, length = mtd->oobsize; nand_write_oob_syndrome()
1834 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps; nand_write_oob_syndrome()
1838 * data-ecc-data-ecc ... ecc-oob nand_write_oob_syndrome()
1840 * data-pad-ecc-pad-data-pad .... ecc-pad-oob nand_write_oob_syndrome()
1842 if (!chip->ecc.prepad && !chip->ecc.postpad) { nand_write_oob_syndrome()
1906 len = chip->ecc.layout->oobavail; nand_do_read_oob()
1934 ret = chip->ecc.read_oob_raw(mtd, chip, page); nand_do_read_oob()
1936 ret = chip->ecc.read_oob(mtd, chip, page); nand_do_read_oob()
2057 int eccsize = chip->ecc.size; nand_write_page_raw_syndrome()
2058 int eccbytes = chip->ecc.bytes; nand_write_page_raw_syndrome()
2062 for (steps = chip->ecc.steps; steps > 0; steps--) { nand_write_page_raw_syndrome()
2066 if (chip->ecc.prepad) { nand_write_page_raw_syndrome()
2067 chip->write_buf(mtd, oob, chip->ecc.prepad); nand_write_page_raw_syndrome()
2068 oob += chip->ecc.prepad; nand_write_page_raw_syndrome()
2074 if (chip->ecc.postpad) { nand_write_page_raw_syndrome()
2075 chip->write_buf(mtd, oob, chip->ecc.postpad); nand_write_page_raw_syndrome()
2076 oob += chip->ecc.postpad; nand_write_page_raw_syndrome()
2096 int i, eccsize = chip->ecc.size; nand_write_page_swecc()
2097 int eccbytes = chip->ecc.bytes; nand_write_page_swecc()
2098 int eccsteps = chip->ecc.steps; nand_write_page_swecc()
2101 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_write_page_swecc()
2105 chip->ecc.calculate(mtd, p, &ecc_calc[i]); nand_write_page_swecc()
2107 for (i = 0; i < chip->ecc.total; i++) nand_write_page_swecc()
2110 return chip->ecc.write_page_raw(mtd, chip, buf, 1); nand_write_page_swecc()
2123 int i, eccsize = chip->ecc.size; nand_write_page_hwecc()
2124 int eccbytes = chip->ecc.bytes; nand_write_page_hwecc()
2125 int eccsteps = chip->ecc.steps; nand_write_page_hwecc()
2128 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_write_page_hwecc()
2131 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); nand_write_page_hwecc()
2133 chip->ecc.calculate(mtd, p, &ecc_calc[i]); nand_write_page_hwecc()
2136 for (i = 0; i < chip->ecc.total; i++) nand_write_page_hwecc()
2161 int ecc_size = chip->ecc.size; nand_write_subpage_hwecc()
2162 int ecc_bytes = chip->ecc.bytes; nand_write_subpage_hwecc()
2163 int ecc_steps = chip->ecc.steps; nand_write_subpage_hwecc()
2164 uint32_t *eccpos = chip->ecc.layout->eccpos; nand_write_subpage_hwecc()
2172 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); nand_write_subpage_hwecc()
2181 chip->ecc.calculate(mtd, buf, ecc_calc); nand_write_subpage_hwecc()
2196 for (i = 0; i < chip->ecc.total; i++) nand_write_subpage_hwecc()
2220 int i, eccsize = chip->ecc.size; nand_write_page_syndrome()
2221 int eccbytes = chip->ecc.bytes; nand_write_page_syndrome()
2222 int eccsteps = chip->ecc.steps; nand_write_page_syndrome()
2228 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); nand_write_page_syndrome()
2231 if (chip->ecc.prepad) { nand_write_page_syndrome()
2232 chip->write_buf(mtd, oob, chip->ecc.prepad); nand_write_page_syndrome()
2233 oob += chip->ecc.prepad; nand_write_page_syndrome()
2236 chip->ecc.calculate(mtd, p, oob); nand_write_page_syndrome()
2240 if (chip->ecc.postpad) { nand_write_page_syndrome()
2241 chip->write_buf(mtd, oob, chip->ecc.postpad); nand_write_page_syndrome()
2242 oob += chip->ecc.postpad; nand_write_page_syndrome()
2273 chip->ecc.write_subpage) nand_write_page()
2281 status = chip->ecc.write_page_raw(mtd, chip, buf, nand_write_page()
2284 status = chip->ecc.write_subpage(mtd, chip, offset, data_len, nand_write_page()
2287 status = chip->ecc.write_page(mtd, chip, buf, oob_required); nand_write_page()
2346 struct nand_oobfree *free = chip->ecc.layout->oobfree; nand_fill_oob()
2586 len = chip->ecc.layout->oobavail; nand_do_write_oob()
2640 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask); nand_do_write_oob()
2642 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); nand_do_write_oob()
3060 struct onfi_ext_ecc_info *ecc; nand_flash_detect_ext_param_page() local
3109 ecc = (struct onfi_ext_ecc_info *)cursor; nand_flash_detect_ext_param_page()
3111 if (!ecc->codeword_size) { nand_flash_detect_ext_param_page()
3116 chip->ecc_strength_ds = ecc->ecc_bits; nand_flash_detect_ext_param_page()
3117 chip->ecc_step_ds = 1 << ecc->codeword_size; nand_flash_detect_ext_param_page()
3260 struct jedec_ecc_info *ecc; nand_flash_detect_jedec() local
3322 ecc = &p->ecc_info[0]; nand_flash_detect_jedec()
3324 if (ecc->codeword_size >= 9) { nand_flash_detect_jedec()
3325 chip->ecc_strength_ds = ecc->ecc_bits; nand_flash_detect_jedec()
3326 chip->ecc_step_ds = 1 << ecc->codeword_size; nand_flash_detect_jedec()
3878 struct nand_ecc_ctrl *ecc = &chip->ecc; nand_ecc_strength_good() local
3881 if (ecc->size == 0 || chip->ecc_step_ds == 0) nand_ecc_strength_good()
3889 corr = (mtd->writesize * ecc->strength) / ecc->size; nand_ecc_strength_good()
3892 return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds; nand_ecc_strength_good()
3907 struct nand_ecc_ctrl *ecc = &chip->ecc; nand_scan_tail() local
3935 if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) { nand_scan_tail()
3938 ecc->layout = &nand_oob_8; nand_scan_tail()
3941 ecc->layout = &nand_oob_16; nand_scan_tail()
3944 ecc->layout = &nand_oob_64; nand_scan_tail()
3947 ecc->layout = &nand_oob_128; nand_scan_tail()
3964 switch (ecc->mode) { nand_scan_tail()
3967 if (!ecc->calculate || !ecc->correct || !ecc->hwctl) { nand_scan_tail()
3971 if (!ecc->read_page) nand_scan_tail()
3972 ecc->read_page = nand_read_page_hwecc_oob_first; nand_scan_tail()
3976 if (!ecc->read_page) nand_scan_tail()
3977 ecc->read_page = nand_read_page_hwecc; nand_scan_tail()
3978 if (!ecc->write_page) nand_scan_tail()
3979 ecc->write_page = nand_write_page_hwecc; nand_scan_tail()
3980 if (!ecc->read_page_raw) nand_scan_tail()
3981 ecc->read_page_raw = nand_read_page_raw; nand_scan_tail()
3982 if (!ecc->write_page_raw) nand_scan_tail()
3983 ecc->write_page_raw = nand_write_page_raw; nand_scan_tail()
3984 if (!ecc->read_oob) nand_scan_tail()
3985 ecc->read_oob = nand_read_oob_std; nand_scan_tail()
3986 if (!ecc->write_oob) nand_scan_tail()
3987 ecc->write_oob = nand_write_oob_std; nand_scan_tail()
3988 if (!ecc->read_subpage) nand_scan_tail()
3989 ecc->read_subpage = nand_read_subpage; nand_scan_tail()
3990 if (!ecc->write_subpage) nand_scan_tail()
3991 ecc->write_subpage = nand_write_subpage_hwecc; nand_scan_tail()
3994 if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && nand_scan_tail()
3995 (!ecc->read_page || nand_scan_tail()
3996 ecc->read_page == nand_read_page_hwecc || nand_scan_tail()
3997 !ecc->write_page || nand_scan_tail()
3998 ecc->write_page == nand_write_page_hwecc)) { nand_scan_tail()
4003 if (!ecc->read_page) nand_scan_tail()
4004 ecc->read_page = nand_read_page_syndrome; nand_scan_tail()
4005 if (!ecc->write_page) nand_scan_tail()
4006 ecc->write_page = nand_write_page_syndrome; nand_scan_tail()
4007 if (!ecc->read_page_raw) nand_scan_tail()
4008 ecc->read_page_raw = nand_read_page_raw_syndrome; nand_scan_tail()
4009 if (!ecc->write_page_raw) nand_scan_tail()
4010 ecc->write_page_raw = nand_write_page_raw_syndrome; nand_scan_tail()
4011 if (!ecc->read_oob) nand_scan_tail()
4012 ecc->read_oob = nand_read_oob_syndrome; nand_scan_tail()
4013 if (!ecc->write_oob) nand_scan_tail()
4014 ecc->write_oob = nand_write_oob_syndrome; nand_scan_tail()
4016 if (mtd->writesize >= ecc->size) { nand_scan_tail()
4017 if (!ecc->strength) { nand_scan_tail()
4018 pr_warn("Driver must set ecc.strength when using hardware ECC\n"); nand_scan_tail()
4024 ecc->size, mtd->writesize); nand_scan_tail()
4025 ecc->mode = NAND_ECC_SOFT; nand_scan_tail()
4028 ecc->calculate = nand_calculate_ecc; nand_scan_tail()
4029 ecc->correct = nand_correct_data; nand_scan_tail()
4030 ecc->read_page = nand_read_page_swecc; nand_scan_tail()
4031 ecc->read_subpage = nand_read_subpage; nand_scan_tail()
4032 ecc->write_page = nand_write_page_swecc; nand_scan_tail()
4033 ecc->read_page_raw = nand_read_page_raw; nand_scan_tail()
4034 ecc->write_page_raw = nand_write_page_raw; nand_scan_tail()
4035 ecc->read_oob = nand_read_oob_std; nand_scan_tail()
4036 ecc->write_oob = nand_write_oob_std; nand_scan_tail()
4037 if (!ecc->size) nand_scan_tail()
4038 ecc->size = 256; nand_scan_tail()
4039 ecc->bytes = 3; nand_scan_tail()
4040 ecc->strength = 1; nand_scan_tail()
4048 ecc->calculate = nand_bch_calculate_ecc; nand_scan_tail()
4049 ecc->correct = nand_bch_correct_data; nand_scan_tail()
4050 ecc->read_page = nand_read_page_swecc; nand_scan_tail()
4051 ecc->read_subpage = nand_read_subpage; nand_scan_tail()
4052 ecc->write_page = nand_write_page_swecc; nand_scan_tail()
4053 ecc->read_page_raw = nand_read_page_raw; nand_scan_tail()
4054 ecc->write_page_raw = nand_write_page_raw; nand_scan_tail()
4055 ecc->read_oob = nand_read_oob_std; nand_scan_tail()
4056 ecc->write_oob = nand_write_oob_std; nand_scan_tail()
4058 * Board driver should supply ecc.size and ecc.strength values nand_scan_tail()
4062 if (!ecc->size && (mtd->oobsize >= 64)) { nand_scan_tail()
4063 ecc->size = 512; nand_scan_tail()
4064 ecc->strength = 4; nand_scan_tail()
4068 ecc->bytes = DIV_ROUND_UP( nand_scan_tail()
4069 ecc->strength * fls(8 * ecc->size), 8); nand_scan_tail()
4070 ecc->priv = nand_bch_init(mtd, ecc->size, ecc->bytes, nand_scan_tail()
4071 &ecc->layout); nand_scan_tail()
4072 if (!ecc->priv) { nand_scan_tail()
4080 ecc->read_page = nand_read_page_raw; nand_scan_tail()
4081 ecc->write_page = nand_write_page_raw; nand_scan_tail()
4082 ecc->read_oob = nand_read_oob_std; nand_scan_tail()
4083 ecc->read_page_raw = nand_read_page_raw; nand_scan_tail()
4084 ecc->write_page_raw = nand_write_page_raw; nand_scan_tail()
4085 ecc->write_oob = nand_write_oob_std; nand_scan_tail()
4086 ecc->size = mtd->writesize; nand_scan_tail()
4087 ecc->bytes = 0; nand_scan_tail()
4088 ecc->strength = 0; nand_scan_tail()
4092 pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode); nand_scan_tail()
4097 if (!ecc->read_oob_raw) nand_scan_tail()
4098 ecc->read_oob_raw = ecc->read_oob; nand_scan_tail()
4099 if (!ecc->write_oob_raw) nand_scan_tail()
4100 ecc->write_oob_raw = ecc->write_oob; nand_scan_tail()
4106 ecc->layout->oobavail = 0; nand_scan_tail()
4107 for (i = 0; ecc->layout->oobfree[i].length nand_scan_tail()
4108 && i < ARRAY_SIZE(ecc->layout->oobfree); i++) nand_scan_tail()
4109 ecc->layout->oobavail += ecc->layout->oobfree[i].length; nand_scan_tail()
4110 mtd->oobavail = ecc->layout->oobavail; nand_scan_tail()
4121 ecc->steps = mtd->writesize / ecc->size; nand_scan_tail()
4122 if (ecc->steps * ecc->size != mtd->writesize) { nand_scan_tail()
4126 ecc->total = ecc->steps * ecc->bytes; nand_scan_tail()
4128 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ nand_scan_tail()
4130 switch (ecc->steps) { nand_scan_tail()
4150 switch (ecc->mode) { nand_scan_tail()
4184 /* propagate ecc info to mtd_info */ nand_scan_tail()
4185 mtd->ecclayout = ecc->layout; nand_scan_tail()
4186 mtd->ecc_strength = ecc->strength; nand_scan_tail()
4187 mtd->ecc_step_size = ecc->size; nand_scan_tail()
4252 if (chip->ecc.mode == NAND_ECC_SOFT_BCH) nand_release()
4253 nand_bch_free((struct nand_bch_control *)chip->ecc.priv); nand_release()
|
| H A D | omap_elm.c | 108 * @bch_type: Type of BCH ecc
122 dev_err(dev, "unsupported config ecc-size=%d\n", ecc_step_size); elm_config()
127 dev_err(dev, "unsupported config ecc-step=%d\n", ecc_steps); elm_config()
167 * @ecc: buffer with calculated ecc
169 * Load syndrome fragment registers with calculated ecc in reverse order.
172 struct elm_errorvec *err_vec, u8 *ecc) elm_load_syndrome()
186 /* syndrome fragment 0 = ecc[9-12B] */ elm_load_syndrome()
187 val = cpu_to_be32(*(u32 *) &ecc[9]); elm_load_syndrome()
190 /* syndrome fragment 1 = ecc[5-8B] */ elm_load_syndrome()
192 val = cpu_to_be32(*(u32 *) &ecc[5]); elm_load_syndrome()
195 /* syndrome fragment 2 = ecc[1-4B] */ elm_load_syndrome()
197 val = cpu_to_be32(*(u32 *) &ecc[1]); elm_load_syndrome()
200 /* syndrome fragment 3 = ecc[0B] */ elm_load_syndrome()
202 val = ecc[0]; elm_load_syndrome()
206 /* syndrome fragment 0 = ecc[20-52b] bits */ elm_load_syndrome()
207 val = (cpu_to_be32(*(u32 *) &ecc[3]) >> 4) | elm_load_syndrome()
208 ((ecc[2] & 0xf) << 28); elm_load_syndrome()
211 /* syndrome fragment 1 = ecc[0-20b] bits */ elm_load_syndrome()
213 val = cpu_to_be32(*(u32 *) &ecc[0]) >> 12; elm_load_syndrome()
217 val = cpu_to_be32(*(u32 *) &ecc[22]); elm_load_syndrome()
220 val = cpu_to_be32(*(u32 *) &ecc[18]); elm_load_syndrome()
223 val = cpu_to_be32(*(u32 *) &ecc[14]); elm_load_syndrome()
226 val = cpu_to_be32(*(u32 *) &ecc[10]); elm_load_syndrome()
229 val = cpu_to_be32(*(u32 *) &ecc[6]); elm_load_syndrome()
232 val = cpu_to_be32(*(u32 *) &ecc[2]); elm_load_syndrome()
235 val = cpu_to_be32(*(u32 *) &ecc[0]) >> 16; elm_load_syndrome()
243 /* Update ecc pointer with ecc byte size */ elm_load_syndrome()
244 ecc += info->ecc_syndrome_size; elm_load_syndrome()
357 /* Load valid ecc byte to syndrome fragment register */ elm_decode_bch_error_page()
171 elm_load_syndrome(struct elm_info *info, struct elm_errorvec *err_vec, u8 *ecc) elm_load_syndrome() argument
|
| H A D | atmel_nand.c | 124 void __iomem *ecc; member in struct:atmel_nand_host
459 * Return number of ecc bytes per sector according to sector size and
543 value = pmecc_readl_rem_relaxed(host->ecc, sector, i / 2); pmecc_gen_syndrome()
802 static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, pmecc_correct_data() argument
831 tmp = sector_num * nand_chip->ecc.bytes pmecc_correct_data()
833 err_byte = ecc[tmp]; pmecc_correct_data()
834 ecc[tmp] ^= (1 << bit_pos); pmecc_correct_data()
836 pos = tmp + nand_chip->ecc.layout->eccpos[0]; pmecc_correct_data()
838 pos, bit_pos, err_byte, ecc[tmp]); pmecc_correct_data()
849 u8 *ecc) pmecc_correction()
861 for (i = 0; i < nand_chip->ecc.total; i++) pmecc_correction()
862 if (ecc[i] != 0xff) pmecc_correction()
868 for (i = 0; i < nand_chip->ecc.steps; i++) { pmecc_correction()
883 pmecc_correct_data(mtd, buf_pos, ecc, i, pmecc_correction()
884 nand_chip->ecc.bytes, err_nbr); pmecc_correction()
904 pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); pmecc_enable()
905 pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); pmecc_enable()
906 val = pmecc_readl_relaxed(host->ecc, CFG); pmecc_enable()
909 pmecc_writel(host->ecc, CFG, (val & ~PMECC_CFG_WRITE_OP) pmecc_enable()
912 pmecc_writel(host->ecc, CFG, (val | PMECC_CFG_WRITE_OP) pmecc_enable()
915 pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE); pmecc_enable()
916 pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DATA); pmecc_enable()
923 int eccsize = chip->ecc.size * chip->ecc.steps; atmel_nand_pmecc_read_page()
925 uint32_t *eccpos = chip->ecc.layout->eccpos; atmel_nand_pmecc_read_page()
937 while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) { atmel_nand_pmecc_read_page()
945 stat = pmecc_readl_relaxed(host->ecc, ISR); atmel_nand_pmecc_read_page()
960 uint32_t *eccpos = chip->ecc.layout->eccpos; atmel_nand_pmecc_write_page()
970 while ((pmecc_readl_relaxed(host->ecc, SR) & PMECC_SR_BUSY)) { atmel_nand_pmecc_write_page()
978 for (i = 0; i < chip->ecc.steps; i++) { atmel_nand_pmecc_write_page()
979 for (j = 0; j < chip->ecc.bytes; j++) { atmel_nand_pmecc_write_page()
982 pos = i * chip->ecc.bytes + j; atmel_nand_pmecc_write_page()
984 pmecc_readb_ecc_relaxed(host->ecc, i, j); atmel_nand_pmecc_write_page()
999 pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); atmel_pmecc_core_init()
1000 pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); atmel_pmecc_core_init()
1025 switch (nand_chip->ecc.steps) { atmel_pmecc_core_init()
1042 pmecc_writel(host->ecc, CFG, val); atmel_pmecc_core_init()
1044 ecc_layout = nand_chip->ecc.layout; atmel_pmecc_core_init()
1045 pmecc_writel(host->ecc, SAREA, mtd->oobsize - 1); atmel_pmecc_core_init()
1046 pmecc_writel(host->ecc, SADDR, ecc_layout->eccpos[0]); atmel_pmecc_core_init()
1047 pmecc_writel(host->ecc, EADDR, atmel_pmecc_core_init()
1050 pmecc_writel(host->ecc, CLK, 2); atmel_pmecc_core_init()
1051 pmecc_writel(host->ecc, IDR, 0xff); atmel_pmecc_core_init()
1052 pmecc_writel(host->ecc, CTRL, PMECC_CTRL_ENABLE); atmel_pmecc_core_init()
1056 * Get minimum ecc requirements from NAND.
1058 * will set them according to minimum ecc requirement. Otherwise, use the
1079 /* use the most fitable ecc bits (the near bigger one ) */ pmecc_choose_ecc()
1190 nand_chip->ecc.mode = NAND_ECC_SOFT; atmel_pmecc_nand_init_params()
1194 host->ecc = devm_ioremap_resource(&pdev->dev, regs); atmel_pmecc_nand_init_params()
1195 if (IS_ERR(host->ecc)) { atmel_pmecc_nand_init_params()
1196 err_no = PTR_ERR(host->ecc); atmel_pmecc_nand_init_params()
1230 nand_chip->ecc.size = sector_size; atmel_pmecc_nand_init_params()
1252 nand_chip->ecc.strength = cap; atmel_pmecc_nand_init_params()
1253 nand_chip->ecc.bytes = pmecc_get_ecc_bytes(cap, sector_size); atmel_pmecc_nand_init_params()
1254 nand_chip->ecc.steps = mtd->writesize / sector_size; atmel_pmecc_nand_init_params()
1255 nand_chip->ecc.total = nand_chip->ecc.bytes * atmel_pmecc_nand_init_params()
1256 nand_chip->ecc.steps; atmel_pmecc_nand_init_params()
1257 if (nand_chip->ecc.total > atmel_pmecc_nand_init_params()
1265 nand_chip->ecc.total); atmel_pmecc_nand_init_params()
1267 nand_chip->ecc.layout = &atmel_pmecc_oobinfo; atmel_pmecc_nand_init_params()
1274 nand_chip->ecc.mode = NAND_ECC_SOFT; atmel_pmecc_nand_init_params()
1287 nand_chip->ecc.read_page = atmel_nand_pmecc_read_page; atmel_pmecc_nand_init_params()
1288 nand_chip->ecc.write_page = atmel_nand_pmecc_write_page; atmel_pmecc_nand_init_params()
1315 ecc_value = ecc_readl(host->ecc, PR); atmel_nand_calculate()
1321 ecc_value = ecc_readl(host->ecc, NPR) & ATMEL_ECC_NPARITY; atmel_nand_calculate()
1340 int eccsize = chip->ecc.size; atmel_nand_read_page()
1341 int eccbytes = chip->ecc.bytes; atmel_nand_read_page()
1342 uint32_t *eccpos = chip->ecc.layout->eccpos; atmel_nand_read_page()
1359 ecc_writel(host->ecc, CR, ATMEL_ECC_RST); atmel_nand_read_page()
1381 stat = chip->ecc.correct(mtd, p, oob, NULL); atmel_nand_read_page()
1420 ecc_status = ecc_readl(host->ecc, SR); atmel_nand_correct()
1427 ecc_bit = ecc_readl(host->ecc, PR) & ATMEL_ECC_BITADDR; atmel_nand_correct()
1429 ecc_word = ecc_readl(host->ecc, PR) & ATMEL_ECC_WORDADDR; atmel_nand_correct()
1484 ecc_writel(host->ecc, CR, ATMEL_ECC_RST); atmel_nand_hwctl()
1596 nand_chip->ecc.mode = NAND_ECC_SOFT; atmel_hw_nand_init_params()
1600 host->ecc = devm_ioremap_resource(&pdev->dev, regs); atmel_hw_nand_init_params()
1601 if (IS_ERR(host->ecc)) atmel_hw_nand_init_params()
1602 return PTR_ERR(host->ecc); atmel_hw_nand_init_params()
1605 nand_chip->ecc.size = mtd->writesize; atmel_hw_nand_init_params()
1610 nand_chip->ecc.layout = &atmel_oobinfo_small; atmel_hw_nand_init_params()
1611 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528); atmel_hw_nand_init_params()
1614 nand_chip->ecc.layout = &atmel_oobinfo_large; atmel_hw_nand_init_params()
1615 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056); atmel_hw_nand_init_params()
1618 nand_chip->ecc.layout = &atmel_oobinfo_large; atmel_hw_nand_init_params()
1619 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112); atmel_hw_nand_init_params()
1622 nand_chip->ecc.layout = &atmel_oobinfo_large; atmel_hw_nand_init_params()
1623 ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224); atmel_hw_nand_init_params()
1628 nand_chip->ecc.mode = NAND_ECC_SOFT; atmel_hw_nand_init_params()
1633 nand_chip->ecc.calculate = atmel_nand_calculate; atmel_hw_nand_init_params()
1634 nand_chip->ecc.correct = atmel_nand_correct; atmel_hw_nand_init_params()
1635 nand_chip->ecc.hwctl = atmel_nand_hwctl; atmel_hw_nand_init_params()
1636 nand_chip->ecc.read_page = atmel_nand_read_page; atmel_hw_nand_init_params()
1637 nand_chip->ecc.bytes = 4; atmel_hw_nand_init_params()
1638 nand_chip->ecc.strength = 1; atmel_hw_nand_init_params()
1907 if (chip->ecc.mode == NAND_ECC_HW && host->has_pmecc) nfc_nand_command()
1994 if (chip->ecc.mode == NAND_ECC_HW && host->has_pmecc) nfc_sram_write_page()
2007 /* Need to write ecc into oob */ nfc_sram_write_page()
2008 status = chip->ecc.write_page(mtd, chip, buf, oob_required); nfc_sram_write_page()
2072 if ((chip->ecc.mode == NAND_ECC_HW && host->has_pmecc) || nfc_sram_init()
2073 chip->ecc.mode == NAND_ECC_NONE) nfc_sram_init()
2166 nand_chip->ecc.mode = host->board.ecc_mode; atmel_nand_probe()
2234 if (nand_chip->ecc.mode == NAND_ECC_HW) { atmel_nand_probe()
2267 if (host->has_pmecc && host->nand_chip.ecc.mode == NAND_ECC_HW) atmel_nand_probe()
2268 pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); atmel_nand_probe()
2291 if (host->has_pmecc && host->nand_chip.ecc.mode == NAND_ECC_HW) { atmel_nand_remove()
2292 pmecc_writel(host->ecc, CTRL, PMECC_CTRL_DISABLE); atmel_nand_remove()
848 pmecc_correction(struct mtd_info *mtd, u32 pmecc_stat, uint8_t *buf, u8 *ecc) pmecc_correction() argument
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| H A D | fsmc_nand.c | 250 * There are 13 bytes of ecc for every 512 byte block and it has to be read
253 * Managing the ecc bytes in the following way makes it easier for software to
254 * read ecc bytes consecutive to data bytes. This way is similar to
467 uint8_t *ecc) fsmc_read_hwecc_ecc4()
484 dev_err(host->dev, "calculate ecc timed out\n"); fsmc_read_hwecc_ecc4()
489 ecc[0] = (uint8_t) (ecc_tmp >> 0); fsmc_read_hwecc_ecc4()
490 ecc[1] = (uint8_t) (ecc_tmp >> 8); fsmc_read_hwecc_ecc4()
491 ecc[2] = (uint8_t) (ecc_tmp >> 16); fsmc_read_hwecc_ecc4()
492 ecc[3] = (uint8_t) (ecc_tmp >> 24); fsmc_read_hwecc_ecc4()
495 ecc[4] = (uint8_t) (ecc_tmp >> 0); fsmc_read_hwecc_ecc4()
496 ecc[5] = (uint8_t) (ecc_tmp >> 8); fsmc_read_hwecc_ecc4()
497 ecc[6] = (uint8_t) (ecc_tmp >> 16); fsmc_read_hwecc_ecc4()
498 ecc[7] = (uint8_t) (ecc_tmp >> 24); fsmc_read_hwecc_ecc4()
501 ecc[8] = (uint8_t) (ecc_tmp >> 0); fsmc_read_hwecc_ecc4()
502 ecc[9] = (uint8_t) (ecc_tmp >> 8); fsmc_read_hwecc_ecc4()
503 ecc[10] = (uint8_t) (ecc_tmp >> 16); fsmc_read_hwecc_ecc4()
504 ecc[11] = (uint8_t) (ecc_tmp >> 24); fsmc_read_hwecc_ecc4()
507 ecc[12] = (uint8_t) (ecc_tmp >> 16); fsmc_read_hwecc_ecc4()
518 uint8_t *ecc) fsmc_read_hwecc_ecc1()
527 ecc[0] = (uint8_t) (ecc_tmp >> 0); fsmc_read_hwecc_ecc1()
528 ecc[1] = (uint8_t) (ecc_tmp >> 8); fsmc_read_hwecc_ecc1()
529 ecc[2] = (uint8_t) (ecc_tmp >> 16); fsmc_read_hwecc_ecc1()
708 * data(512 byte) -> ecc(13 byte)
718 int i, j, s, stat, eccsize = chip->ecc.size; fsmc_read_page_hwecc()
719 int eccbytes = chip->ecc.bytes; fsmc_read_page_hwecc()
720 int eccsteps = chip->ecc.steps; fsmc_read_page_hwecc()
736 chip->ecc.hwctl(mtd, NAND_ECC_READ); fsmc_read_page_hwecc()
757 memcpy(&ecc_code[i], oob, chip->ecc.bytes); fsmc_read_page_hwecc()
758 chip->ecc.calculate(mtd, p, &ecc_calc[i]); fsmc_read_page_hwecc()
760 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); fsmc_read_page_hwecc()
776 * @read_ecc: ecc read from device spare area
777 * @calc_ecc: ecc calculated from read data
804 * would result in an ecc error because the oob data is also fsmc_bch8_correct_data()
805 * erased to FF and the calculated ecc for an FF data is not fsmc_bch8_correct_data()
816 int bits_ecc = count_written_bits(read_ecc, chip->ecc.bytes, 8); fsmc_bch8_correct_data()
817 int bits_data = count_written_bits(dat, chip->ecc.size, 8); fsmc_bch8_correct_data()
821 memset(dat, 0xff, chip->ecc.size); fsmc_bch8_correct_data()
856 if (err_idx[i] < chip->ecc.size * 8) { fsmc_bch8_correct_data()
1026 nand->ecc.mode = NAND_ECC_HW; fsmc_nand_probe()
1027 nand->ecc.hwctl = fsmc_enable_hwecc; fsmc_nand_probe()
1028 nand->ecc.size = 512; fsmc_nand_probe()
1068 nand->ecc.read_page = fsmc_read_page_hwecc; fsmc_nand_probe()
1069 nand->ecc.calculate = fsmc_read_hwecc_ecc4; fsmc_nand_probe()
1070 nand->ecc.correct = fsmc_bch8_correct_data; fsmc_nand_probe()
1071 nand->ecc.bytes = 13; fsmc_nand_probe()
1072 nand->ecc.strength = 8; fsmc_nand_probe()
1074 nand->ecc.calculate = fsmc_read_hwecc_ecc1; fsmc_nand_probe()
1075 nand->ecc.correct = nand_correct_data; fsmc_nand_probe()
1076 nand->ecc.bytes = 3; fsmc_nand_probe()
1077 nand->ecc.strength = 1; fsmc_nand_probe()
1092 nand->ecc.layout = &fsmc_ecc4_16_layout; fsmc_nand_probe()
1096 nand->ecc.layout = &fsmc_ecc4_64_layout; fsmc_nand_probe()
1100 nand->ecc.layout = &fsmc_ecc4_128_layout; fsmc_nand_probe()
1104 nand->ecc.layout = &fsmc_ecc4_224_layout; fsmc_nand_probe()
1108 nand->ecc.layout = &fsmc_ecc4_256_layout; fsmc_nand_probe()
1119 nand->ecc.layout = &fsmc_ecc1_16_layout; fsmc_nand_probe()
1122 nand->ecc.layout = &fsmc_ecc1_64_layout; fsmc_nand_probe()
1125 nand->ecc.layout = &fsmc_ecc1_128_layout; fsmc_nand_probe()
466 fsmc_read_hwecc_ecc4(struct mtd_info *mtd, const uint8_t *data, uint8_t *ecc) fsmc_read_hwecc_ecc4() argument
517 fsmc_read_hwecc_ecc1(struct mtd_info *mtd, const uint8_t *data, uint8_t *ecc) fsmc_read_hwecc_ecc1() argument
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| H A D | sharpsl.c | 165 this->ecc.mode = NAND_ECC_HW; sharpsl_nand_probe()
166 this->ecc.size = 256; sharpsl_nand_probe()
167 this->ecc.bytes = 3; sharpsl_nand_probe()
168 this->ecc.strength = 1; sharpsl_nand_probe()
170 this->ecc.layout = data->ecc_layout; sharpsl_nand_probe()
171 this->ecc.hwctl = sharpsl_nand_enable_hwecc; sharpsl_nand_probe()
172 this->ecc.calculate = sharpsl_nand_calculate_ecc; sharpsl_nand_probe()
173 this->ecc.correct = nand_correct_data; sharpsl_nand_probe()
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| H A D | tmio_nand.c | 272 unsigned int ecc; tmio_nand_calculate_ecc() local
276 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); tmio_nand_calculate_ecc()
277 ecc_code[1] = ecc; /* 000-255 LP7-0 */ tmio_nand_calculate_ecc()
278 ecc_code[0] = ecc >> 8; /* 000-255 LP15-8 */ tmio_nand_calculate_ecc()
279 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); tmio_nand_calculate_ecc()
280 ecc_code[2] = ecc; /* 000-255 CP5-0,11b */ tmio_nand_calculate_ecc()
281 ecc_code[4] = ecc >> 8; /* 256-511 LP7-0 */ tmio_nand_calculate_ecc()
282 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); tmio_nand_calculate_ecc()
283 ecc_code[3] = ecc; /* 256-511 LP15-8 */ tmio_nand_calculate_ecc()
284 ecc_code[5] = ecc >> 8; /* 256-511 CP5-0,11b */ tmio_nand_calculate_ecc()
295 /* assume ecc.size = 512 and ecc.bytes = 6 */ tmio_nand_correct_data()
411 nand_chip->ecc.mode = NAND_ECC_HW; tmio_probe()
412 nand_chip->ecc.size = 512; tmio_probe()
413 nand_chip->ecc.bytes = 6; tmio_probe()
414 nand_chip->ecc.strength = 2; tmio_probe()
415 nand_chip->ecc.hwctl = tmio_nand_enable_hwecc; tmio_probe()
416 nand_chip->ecc.calculate = tmio_nand_calculate_ecc; tmio_probe()
417 nand_chip->ecc.correct = tmio_nand_correct_data; tmio_probe()
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| H A D | bf5xx_nand.c | 312 /* If ecc size is 512, correct second 256 bytes */ bf5xx_nand_correct_data()
313 if (chip->ecc.size == 512) { bf5xx_nand_correct_data()
343 dev_dbg(info->device, "returning ecc 0x%08x\n", code[0]); bf5xx_nand_calculate_ecc()
348 /* second 3 bytes ECC code for 512 ecc size */ bf5xx_nand_calculate_ecc()
349 if (chip->ecc.size == 512) { bf5xx_nand_calculate_ecc()
359 dev_dbg(info->device, "returning ecc 0x%08x\n", code[1]); bf5xx_nand_calculate_ecc()
483 (unsigned int)(buf + chip->ecc.size)); bf5xx_nand_dma_rw()
486 (unsigned int)(buf + chip->ecc.size)); bf5xx_nand_dma_rw()
507 set_dma_x_count(CH_NFC, (chip->ecc.size >> 1)); bf5xx_nand_dma_rw()
513 set_dma_x_count(CH_NFC, (chip->ecc.size >> 2)); bf5xx_nand_dma_rw()
539 if (len == chip->ecc.size) bf5xx_nand_dma_read_buf()
553 if (len == chip->ecc.size) bf5xx_nand_dma_write_buf()
699 chip->ecc.size = 512; bf5xx_nand_scan()
700 chip->ecc.bytes = 6; bf5xx_nand_scan()
701 chip->ecc.strength = 2; bf5xx_nand_scan()
703 chip->ecc.size = 256; bf5xx_nand_scan()
704 chip->ecc.bytes = 3; bf5xx_nand_scan()
705 chip->ecc.strength = 1; bf5xx_nand_scan()
795 chip->ecc.layout = &bootrom_ecclayout; bf5xx_nand_probe()
799 chip->ecc.calculate = bf5xx_nand_calculate_ecc; bf5xx_nand_probe()
800 chip->ecc.correct = bf5xx_nand_correct_data; bf5xx_nand_probe()
801 chip->ecc.mode = NAND_ECC_HW; bf5xx_nand_probe()
802 chip->ecc.hwctl = bf5xx_nand_enable_hwecc; bf5xx_nand_probe()
803 chip->ecc.read_page_raw = bf5xx_nand_read_page_raw; bf5xx_nand_probe()
804 chip->ecc.write_page_raw = bf5xx_nand_write_page_raw; bf5xx_nand_probe()
806 chip->ecc.mode = NAND_ECC_SOFT; bf5xx_nand_probe()
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| H A D | ndfc.c | 104 uint32_t ecc; ndfc_calculate_ecc() local
105 uint8_t *p = (uint8_t *)&ecc; ndfc_calculate_ecc()
108 ecc = in_be32(ndfc->ndfcbase + NDFC_ECC); ndfc_calculate_ecc()
164 chip->ecc.correct = nand_correct_data; ndfc_chip_init()
165 chip->ecc.hwctl = ndfc_enable_hwecc; ndfc_chip_init()
166 chip->ecc.calculate = ndfc_calculate_ecc; ndfc_chip_init()
167 chip->ecc.mode = NAND_ECC_HW; ndfc_chip_init()
168 chip->ecc.size = 256; ndfc_chip_init()
169 chip->ecc.bytes = 3; ndfc_chip_init()
170 chip->ecc.strength = 1; ndfc_chip_init()
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| H A D | txx9ndfmc.c | 185 for (eccbytes = chip->ecc.bytes; eccbytes > 0; eccbytes -= 3) { txx9ndfmc_calculate_ecc()
203 for (eccsize = chip->ecc.size; eccsize > 0; eccsize -= 256) { txx9ndfmc_correct_data()
267 chip->ecc.size = 512; txx9ndfmc_nand_scan()
268 chip->ecc.bytes = 6; txx9ndfmc_nand_scan()
335 chip->ecc.calculate = txx9ndfmc_calculate_ecc; txx9ndfmc_probe()
336 chip->ecc.correct = txx9ndfmc_correct_data; txx9ndfmc_probe()
337 chip->ecc.hwctl = txx9ndfmc_enable_hwecc; txx9ndfmc_probe()
338 chip->ecc.mode = NAND_ECC_HW; txx9ndfmc_probe()
339 /* txx9ndfmc_nand_scan will overwrite ecc.size and ecc.bytes */ txx9ndfmc_probe()
340 chip->ecc.size = 256; txx9ndfmc_probe()
341 chip->ecc.bytes = 3; txx9ndfmc_probe()
342 chip->ecc.strength = 1; txx9ndfmc_probe()
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| H A D | lpc32xx_slc.c | 405 static void lpc32xx_slc_ecc_copy(uint8_t *spare, const uint32_t *ecc, int count) lpc32xx_slc_ecc_copy() argument
410 uint32_t ce = ecc[i / 3]; lpc32xx_slc_ecc_copy()
529 for (i = 0; i < chip->ecc.steps; i++) { lpc32xx_xfer()
532 dma_buf + i * chip->ecc.size, lpc32xx_xfer()
533 mtd->writesize / chip->ecc.steps, dir); lpc32xx_xfer()
538 if (i == chip->ecc.steps - 1) lpc32xx_xfer()
570 host->ecc_buf[chip->ecc.steps - 1] = lpc32xx_xfer()
612 status = lpc32xx_xfer(mtd, buf, chip->ecc.steps, 1); lpc32xx_nand_read_page_syndrome()
618 lpc32xx_slc_ecc_copy(tmpecc, (uint32_t *) host->ecc_buf, chip->ecc.steps); lpc32xx_nand_read_page_syndrome()
621 oobecc = chip->oob_poi + chip->ecc.layout->eccpos[0]; lpc32xx_nand_read_page_syndrome()
623 for (i = 0; i < chip->ecc.steps; i++) { lpc32xx_nand_read_page_syndrome()
624 stat = chip->ecc.correct(mtd, buf, oobecc, lpc32xx_nand_read_page_syndrome()
625 &tmpecc[i * chip->ecc.bytes]); lpc32xx_nand_read_page_syndrome()
631 buf += chip->ecc.size; lpc32xx_nand_read_page_syndrome()
632 oobecc += chip->ecc.bytes; lpc32xx_nand_read_page_syndrome()
651 chip->read_buf(mtd, buf, chip->ecc.size * chip->ecc.steps); lpc32xx_nand_read_page_raw_syndrome()
666 uint8_t *pb = chip->oob_poi + chip->ecc.layout->eccpos[0]; lpc32xx_nand_write_page_syndrome()
670 error = lpc32xx_xfer(mtd, (uint8_t *)buf, chip->ecc.steps, 0); lpc32xx_nand_write_page_syndrome()
678 lpc32xx_slc_ecc_copy(pb, (uint32_t *)host->ecc_buf, chip->ecc.steps); lpc32xx_nand_write_page_syndrome()
695 chip->write_buf(mtd, buf, chip->ecc.size * chip->ecc.steps); lpc32xx_nand_write_page_raw_syndrome()
828 chip->ecc.mode = NAND_ECC_HW_SYNDROME; lpc32xx_nand_probe()
832 chip->ecc.read_page_raw = lpc32xx_nand_read_page_raw_syndrome; lpc32xx_nand_probe()
833 chip->ecc.read_page = lpc32xx_nand_read_page_syndrome; lpc32xx_nand_probe()
834 chip->ecc.write_page_raw = lpc32xx_nand_write_page_raw_syndrome; lpc32xx_nand_probe()
835 chip->ecc.write_page = lpc32xx_nand_write_page_syndrome; lpc32xx_nand_probe()
836 chip->ecc.write_oob = lpc32xx_nand_write_oob_syndrome; lpc32xx_nand_probe()
837 chip->ecc.read_oob = lpc32xx_nand_read_oob_syndrome; lpc32xx_nand_probe()
838 chip->ecc.calculate = lpc32xx_nand_ecc_calculate; lpc32xx_nand_probe()
839 chip->ecc.correct = nand_correct_data; lpc32xx_nand_probe()
840 chip->ecc.strength = 1; lpc32xx_nand_probe()
841 chip->ecc.hwctl = lpc32xx_nand_ecc_enable; lpc32xx_nand_probe()
876 chip->ecc.layout = &lpc32xx_nand_oob_16; lpc32xx_nand_probe()
879 chip->ecc.size = 256; lpc32xx_nand_probe()
880 chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES; lpc32xx_nand_probe()
881 chip->ecc.prepad = chip->ecc.postpad = 0; lpc32xx_nand_probe()
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| H A D | cs553x_nand.c | 172 uint32_t ecc; cs_calculate_ecc() local
176 ecc = readl(mmio_base + MM_NAND_STS); cs_calculate_ecc()
178 ecc_code[1] = ecc >> 8; cs_calculate_ecc()
179 ecc_code[0] = ecc >> 16; cs_calculate_ecc()
180 ecc_code[2] = ecc >> 24; cs_calculate_ecc()
229 this->ecc.mode = NAND_ECC_HW; cs553x_init_one()
230 this->ecc.size = 256; cs553x_init_one()
231 this->ecc.bytes = 3; cs553x_init_one()
232 this->ecc.hwctl = cs_enable_hwecc; cs553x_init_one()
233 this->ecc.calculate = cs_calculate_ecc; cs553x_init_one()
234 this->ecc.correct = nand_correct_data; cs553x_init_one()
235 this->ecc.strength = 1; cs553x_init_one()
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| H A D | s3c2410.c | 85 /* new oob placement block for use with hardware ecc generation
595 pr_debug("%s: returning ecc %*phN\n", __func__, 3, ecc_code); s3c2410_nand_calculate_ecc()
604 unsigned long ecc = readl(info->regs + S3C2412_NFMECC0); s3c2412_nand_calculate_ecc() local
606 ecc_code[0] = ecc; s3c2412_nand_calculate_ecc()
607 ecc_code[1] = ecc >> 8; s3c2412_nand_calculate_ecc()
608 ecc_code[2] = ecc >> 16; s3c2412_nand_calculate_ecc()
610 pr_debug("%s: returning ecc %*phN\n", __func__, 3, ecc_code); s3c2412_nand_calculate_ecc()
619 unsigned long ecc = readl(info->regs + S3C2440_NFMECC0); s3c2440_nand_calculate_ecc() local
621 ecc_code[0] = ecc; s3c2440_nand_calculate_ecc()
622 ecc_code[1] = ecc >> 8; s3c2440_nand_calculate_ecc()
623 ecc_code[2] = ecc >> 16; s3c2440_nand_calculate_ecc()
625 pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff); s3c2440_nand_calculate_ecc()
839 chip->ecc.calculate = s3c2410_nand_calculate_ecc; s3c2410_nand_init_chip()
840 chip->ecc.correct = s3c2410_nand_correct_data; s3c2410_nand_init_chip()
841 chip->ecc.mode = NAND_ECC_HW; s3c2410_nand_init_chip()
842 chip->ecc.strength = 1; s3c2410_nand_init_chip()
846 chip->ecc.hwctl = s3c2410_nand_enable_hwecc; s3c2410_nand_init_chip()
847 chip->ecc.calculate = s3c2410_nand_calculate_ecc; s3c2410_nand_init_chip()
851 chip->ecc.hwctl = s3c2412_nand_enable_hwecc; s3c2410_nand_init_chip()
852 chip->ecc.calculate = s3c2412_nand_calculate_ecc; s3c2410_nand_init_chip()
856 chip->ecc.hwctl = s3c2440_nand_enable_hwecc; s3c2410_nand_init_chip()
857 chip->ecc.calculate = s3c2440_nand_calculate_ecc; s3c2410_nand_init_chip()
861 chip->ecc.mode = NAND_ECC_SOFT; s3c2410_nand_init_chip()
865 chip->ecc.layout = set->ecc_layout; s3c2410_nand_init_chip()
868 chip->ecc.mode = NAND_ECC_NONE; s3c2410_nand_init_chip()
870 switch (chip->ecc.mode) { s3c2410_nand_init_chip()
913 if (chip->ecc.mode != NAND_ECC_HW) s3c2410_nand_update_chip()
920 chip->ecc.size = 256; s3c2410_nand_update_chip()
921 chip->ecc.bytes = 3; s3c2410_nand_update_chip()
923 chip->ecc.size = 512; s3c2410_nand_update_chip()
924 chip->ecc.bytes = 3; s3c2410_nand_update_chip()
925 chip->ecc.layout = &nand_hw_eccoob; s3c2410_nand_update_chip()
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| H A D | r852.h | 17 /* nand interface + ecc
21 results of ecc correction, if DMA read was done before.
22 If write was done two dword reads read generated ecc checksums
34 #define R852_CTL_ECC_ENABLE 0x20 /* enable ecc engine */
35 #define R852_CTL_ECC_ACCESS 0x40 /* read/write ecc via reg #0*/
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| H A D | hisi504_nand.c | 200 if (chip->ecc.mode == NAND_ECC_NONE) { hisi_nfc_dma_transfer()
496 if (chip->ecc.mode == NAND_ECC_HW) hisi_nfc_cmdfunc()
558 switch (chip->ecc.strength) { hisi_nand_read_page_hwecc()
651 dev_err(dev, "error ecc size: %d\n", size); hisi_nfc_ecc_probe()
657 dev_err(dev, "ecc size and strength do not match\n"); hisi_nfc_ecc_probe()
661 chip->ecc.size = size; hisi_nfc_ecc_probe()
662 chip->ecc.strength = strength; hisi_nfc_ecc_probe()
664 chip->ecc.read_page = hisi_nand_read_page_hwecc; hisi_nfc_ecc_probe()
665 chip->ecc.read_oob = hisi_nand_read_oob; hisi_nfc_ecc_probe()
666 chip->ecc.write_page = hisi_nand_write_page_hwecc; hisi_nfc_ecc_probe()
668 switch (chip->ecc.strength) { hisi_nfc_ecc_probe()
672 chip->ecc.layout = &nand_ecc_2K_16bits; hisi_nfc_ecc_probe()
677 /* TODO: add more ecc strength support */ hisi_nfc_ecc_probe()
679 dev_err(dev, "not support strength: %d\n", chip->ecc.strength); hisi_nfc_ecc_probe()
684 /* add ecc type configure */ hisi_nfc_ecc_probe()
689 /* enable ecc irq */ hisi_nfc_ecc_probe()
753 chip->ecc.mode = of_get_nand_ecc_mode(np); hisi_nfc_probe()
799 if (chip->ecc.mode == NAND_ECC_HW) hisi_nfc_probe()
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| H A D | fsl_ifc_nand.c | 268 for (i = 0; i < chip->ecc.layout->eccbytes; i++) { is_blank()
269 int pos = chip->ecc.layout->eccpos[i]; is_blank()
335 int sector = bufnum * chip->ecc.steps; fsl_ifc_run_command()
336 int sector_end = sector + chip->ecc.steps - 1; fsl_ifc_run_command()
431 if (chip->ecc.mode == NAND_ECC_HW) fsl_ifc_cmdfunc()
802 dev_dbg(priv->dev, "%s: nand->ecc.mode = %d\n", __func__, fsl_ifc_chip_init_tail()
803 chip->ecc.mode); fsl_ifc_chip_init_tail()
804 dev_dbg(priv->dev, "%s: nand->ecc.steps = %d\n", __func__, fsl_ifc_chip_init_tail()
805 chip->ecc.steps); fsl_ifc_chip_init_tail()
806 dev_dbg(priv->dev, "%s: nand->ecc.bytes = %d\n", __func__, fsl_ifc_chip_init_tail()
807 chip->ecc.bytes); fsl_ifc_chip_init_tail()
808 dev_dbg(priv->dev, "%s: nand->ecc.total = %d\n", __func__, fsl_ifc_chip_init_tail()
809 chip->ecc.total); fsl_ifc_chip_init_tail()
810 dev_dbg(priv->dev, "%s: nand->ecc.layout = %p\n", __func__, fsl_ifc_chip_init_tail()
811 chip->ecc.layout); fsl_ifc_chip_init_tail()
917 chip->ecc.read_page = fsl_ifc_read_page; fsl_ifc_chip_init()
918 chip->ecc.write_page = fsl_ifc_write_page; fsl_ifc_chip_init()
923 chip->ecc.size = 512; fsl_ifc_chip_init()
924 chip->ecc.bytes = 8; fsl_ifc_chip_init()
925 chip->ecc.strength = 4; fsl_ifc_chip_init()
953 chip->ecc.bytes = 16; fsl_ifc_chip_init()
954 chip->ecc.strength = 8; fsl_ifc_chip_init()
966 chip->ecc.bytes = 16; fsl_ifc_chip_init()
967 chip->ecc.strength = 8; fsl_ifc_chip_init()
980 chip->ecc.mode = NAND_ECC_HW; fsl_ifc_chip_init()
981 chip->ecc.layout = layout; fsl_ifc_chip_init()
983 chip->ecc.mode = NAND_ECC_SOFT; fsl_ifc_chip_init()
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| H A D | jz4740_nand.c | 193 * ecc, otherwise we will get in trouble when doing subpage writes. */ jz_nand_calculate_ecc_rs()
234 t &= dat[nand->chip.ecc.size / 2]; jz_nand_correct_ecc_rs()
235 t &= dat[nand->chip.ecc.size - 1]; jz_nand_correct_ecc_rs()
238 for (i = 1; i < nand->chip.ecc.size - 1; ++i) jz_nand_correct_ecc_rs()
440 chip->ecc.hwctl = jz_nand_hwctl; jz_nand_probe()
441 chip->ecc.calculate = jz_nand_calculate_ecc_rs; jz_nand_probe()
442 chip->ecc.correct = jz_nand_correct_ecc_rs; jz_nand_probe()
443 chip->ecc.mode = NAND_ECC_HW_OOB_FIRST; jz_nand_probe()
444 chip->ecc.size = 512; jz_nand_probe()
445 chip->ecc.bytes = 9; jz_nand_probe()
446 chip->ecc.strength = 4; jz_nand_probe()
449 chip->ecc.layout = pdata->ecc_layout; jz_nand_probe()
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| H A D | plat_nand.c | 79 data->chip.ecc.hwctl = pdata->ctrl.hwcontrol; plat_nand_probe()
80 data->chip.ecc.layout = pdata->chip.ecclayout; plat_nand_probe()
81 data->chip.ecc.mode = NAND_ECC_SOFT; plat_nand_probe()
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| H A D | docg4.c | 19 * Hamming ecc when reading oob only
200 /* all but the last byte is included in ecc calculation */
209 /* primitive polynomial used to build the Galois field used by hw ecc gen */
221 * Byte 7 is hamming ecc for first 7 oob bytes only.
222 * Bytes 8 - 14 are hw-generated ecc covering entire page + oob bytes 0 - 14.
362 /* read the 7 hw-generated ecc bytes */ read_hw_ecc()
385 read_hw_ecc(docptr, doc->ecc_buf); /* read 7 hw-generated ecc bytes */ correct_data()
395 * If the hw ecc bytes are not those of a blank page, there's correct_data()
419 * The hardware ecc unit produces oob_ecc ^ calc_ecc. The kernel's bch correct_data()
446 /* ignore if error within oob ecc bytes */ correct_data()
450 /* if error within oob area preceeding ecc bytes... */ correct_data()
663 * data contains the ecc bytes for the preceeding 512 bytes. mtd_to_docg4_address()
671 * its data read/written, and ecc handled before the next "sub-page" is mtd_to_docg4_address()
807 /* If bitflips are reported, attempt to correct with ecc */ read_page()
845 docg4_command(mtd, NAND_CMD_READ0, nand->ecc.size, page); docg4_read_oob()
950 /* write hw-generated ecc bytes to oob */ write_page()
958 /* read the 7 bch bytes from ecc regs */ write_page()
1005 /* note that bytes 7..14 are hw generated hamming/ecc and overwritten */ docg4_write_oob()
1045 * Whoops, an ecc failure ocurred reading the factory bbt. read_factory_bbt()
1221 nand->ecc.layout = &docg4_oobinfo; init_mtd_structs()
1222 nand->ecc.mode = NAND_ECC_HW_SYNDROME; init_mtd_structs()
1223 nand->ecc.size = DOCG4_PAGE_SIZE; init_mtd_structs()
1224 nand->ecc.prepad = 8; init_mtd_structs()
1225 nand->ecc.bytes = 8; init_mtd_structs()
1226 nand->ecc.strength = DOCG4_T; init_mtd_structs()
1242 nand->ecc.read_page = docg4_read_page; init_mtd_structs()
1243 nand->ecc.write_page = docg4_write_page; init_mtd_structs()
1244 nand->ecc.read_page_raw = docg4_read_page_raw; init_mtd_structs()
1245 nand->ecc.write_page_raw = docg4_write_page_raw; init_mtd_structs()
1246 nand->ecc.read_oob = docg4_read_oob; init_mtd_structs()
1247 nand->ecc.write_oob = docg4_write_oob; init_mtd_structs()
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| H A D | r852.c | 412 /* enable ecc generation/check*/ r852_ecc_hwctl()
415 /* flush ecc buffer */ r852_ecc_hwctl()
424 /* disable ecc generation */ r852_ecc_hwctl()
491 /* ecc uncorrectable error */ r852_ecc_correct()
493 dbg("ecc: unrecoverable error, in half %d", i); r852_ecc_correct()
502 dbg("ecc: recoverable error, " r852_ecc_correct()
867 /* ecc */ r852_probe()
868 chip->ecc.mode = NAND_ECC_HW_SYNDROME; r852_probe()
869 chip->ecc.size = R852_DMA_LEN; r852_probe()
870 chip->ecc.bytes = SM_OOB_SIZE; r852_probe()
871 chip->ecc.strength = 2; r852_probe()
872 chip->ecc.hwctl = r852_ecc_hwctl; r852_probe()
873 chip->ecc.calculate = r852_ecc_calculate; r852_probe()
874 chip->ecc.correct = r852_ecc_correct; r852_probe()
877 chip->ecc.read_oob = r852_read_oob; r852_probe()
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| H A D | fsl_elbc_nand.c | 240 if (chip->ecc.mode != NAND_ECC_HW) fsl_elbc_run_command()
653 dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.mode = %d\n", fsl_elbc_chip_init_tail()
654 chip->ecc.mode); fsl_elbc_chip_init_tail()
655 dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.steps = %d\n", fsl_elbc_chip_init_tail()
656 chip->ecc.steps); fsl_elbc_chip_init_tail()
657 dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.bytes = %d\n", fsl_elbc_chip_init_tail()
658 chip->ecc.bytes); fsl_elbc_chip_init_tail()
659 dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.total = %d\n", fsl_elbc_chip_init_tail()
660 chip->ecc.total); fsl_elbc_chip_init_tail()
661 dev_dbg(priv->dev, "fsl_elbc_init: nand->ecc.layout = %p\n", fsl_elbc_chip_init_tail()
662 chip->ecc.layout); fsl_elbc_chip_init_tail()
679 /* adjust ecc setup if needed */ fsl_elbc_chip_init_tail()
682 chip->ecc.size = 512; fsl_elbc_chip_init_tail()
683 chip->ecc.layout = (priv->fmr & FMR_ECCM) ? fsl_elbc_chip_init_tail()
775 chip->ecc.read_page = fsl_elbc_read_page; fsl_elbc_chip_init()
776 chip->ecc.write_page = fsl_elbc_write_page; fsl_elbc_chip_init()
777 chip->ecc.write_subpage = fsl_elbc_write_subpage; fsl_elbc_chip_init()
782 chip->ecc.mode = NAND_ECC_HW; fsl_elbc_chip_init()
784 chip->ecc.layout = (priv->fmr & FMR_ECCM) ? fsl_elbc_chip_init()
786 chip->ecc.size = 512; fsl_elbc_chip_init()
787 chip->ecc.bytes = 3; fsl_elbc_chip_init()
788 chip->ecc.strength = 1; fsl_elbc_chip_init()
791 chip->ecc.mode = NAND_ECC_SOFT; fsl_elbc_chip_init()
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| H A D | cafe_nand.c | 368 * cafe_nand_read_page_syndrome - [REPLACEABLE] hardware ecc syndrome based page read
740 cafe->nand.ecc.layout = &cafe_oobinfo_2048; cafe_nand_probe()
744 cafe->nand.ecc.layout = &cafe_oobinfo_512; cafe_nand_probe()
752 cafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME; cafe_nand_probe()
753 cafe->nand.ecc.size = mtd->writesize; cafe_nand_probe()
754 cafe->nand.ecc.bytes = 14; cafe_nand_probe()
755 cafe->nand.ecc.strength = 4; cafe_nand_probe()
756 cafe->nand.ecc.hwctl = (void *)cafe_nand_bug; cafe_nand_probe()
757 cafe->nand.ecc.calculate = (void *)cafe_nand_bug; cafe_nand_probe()
758 cafe->nand.ecc.correct = (void *)cafe_nand_bug; cafe_nand_probe()
759 cafe->nand.ecc.write_page = cafe_nand_write_page_lowlevel; cafe_nand_probe()
760 cafe->nand.ecc.write_oob = cafe_nand_write_oob; cafe_nand_probe()
761 cafe->nand.ecc.read_page = cafe_nand_read_page; cafe_nand_probe()
762 cafe->nand.ecc.read_oob = cafe_nand_read_oob; cafe_nand_probe()
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| H A D | diskonchip.c | 74 /* This is the syndrome computed by the HW ecc generator upon reading an empty
75 page, one with all 0xff for data and stored ecc code. */
78 /* This is the ecc value computed by the HW ecc generator upon writing an empty
141 static int doc_ecc_decode(struct rs_control *rs, uint8_t *data, uint8_t *ecc) doc_ecc_decode() argument
148 /* Convert the ecc bytes into words */ doc_ecc_decode()
149 ds[0] = ((ecc[4] & 0xff) >> 0) | ((ecc[5] & 0x03) << 8); doc_ecc_decode()
150 ds[1] = ((ecc[5] & 0xfc) >> 2) | ((ecc[2] & 0x0f) << 6); doc_ecc_decode()
151 ds[2] = ((ecc[2] & 0xf0) >> 4) | ((ecc[3] & 0x3f) << 4); doc_ecc_decode()
152 ds[3] = ((ecc[3] & 0xc0) >> 6) | ((ecc[0] & 0xff) << 2); doc_ecc_decode()
153 parity = ecc[1]; doc_ecc_decode()
895 Return all-0xff ecc value instead of the computed one, so doc200x_calculate_ecc()
940 all-0xff data and stored ecc block. Check the stored ecc. */ doc200x_correct_data()
1422 this->ecc.hwctl = doc2001plus_enable_hwecc; doc2001plus_init()
1584 nand->ecc.hwctl = doc200x_enable_hwecc; doc_probe()
1585 nand->ecc.calculate = doc200x_calculate_ecc; doc_probe()
1586 nand->ecc.correct = doc200x_correct_data; doc_probe()
1588 nand->ecc.layout = &doc200x_oobinfo; doc_probe()
1589 nand->ecc.mode = NAND_ECC_HW_SYNDROME; doc_probe()
1590 nand->ecc.size = 512; doc_probe()
1591 nand->ecc.bytes = 6; doc_probe()
1592 nand->ecc.strength = 2; doc_probe()
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| H A D | davinci_nand.c | 183 /* invert so that erased block ecc is correct */ nand_davinci_calculate_1bit()
205 if ((diff >> (12 + 3)) < chip->ecc.size) { nand_davinci_correct_1bit()
287 /* Pack eight raw 10-bit ecc values into ten bytes, making nand_davinci_calculate_4bit()
561 "nand-ecc-mode", &mode) || nand_davinci_get_pdata()
563 "ti,davinci-ecc-mode", &mode)) { nand_davinci_get_pdata()
572 "ti,davinci-ecc-bits", &prop)) nand_davinci_get_pdata()
722 info->chip.ecc.calculate = nand_davinci_calculate_4bit; nand_davinci_probe()
723 info->chip.ecc.correct = nand_davinci_correct_4bit; nand_davinci_probe()
724 info->chip.ecc.hwctl = nand_davinci_hwctl_4bit; nand_davinci_probe()
725 info->chip.ecc.bytes = 10; nand_davinci_probe()
727 info->chip.ecc.calculate = nand_davinci_calculate_1bit; nand_davinci_probe()
728 info->chip.ecc.correct = nand_davinci_correct_1bit; nand_davinci_probe()
729 info->chip.ecc.hwctl = nand_davinci_hwctl_1bit; nand_davinci_probe()
730 info->chip.ecc.bytes = 3; nand_davinci_probe()
732 info->chip.ecc.size = 512; nand_davinci_probe()
733 info->chip.ecc.strength = pdata->ecc_bits; nand_davinci_probe()
738 info->chip.ecc.mode = ecc_mode; nand_davinci_probe()
796 info->chip.ecc.mode = NAND_ECC_HW_OOB_FIRST; nand_davinci_probe()
815 info->chip.ecc.layout = &info->ecclayout; nand_davinci_probe()
857 if (info->chip.ecc.mode == NAND_ECC_HW_SYNDROME) nand_davinci_remove()
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| H A D | pxa3xx_nand.c | 650 * to return it to the MTD layer in ecc.read_page(). pxa3xx_nand_irq()
1393 struct nand_ecc_ctrl *ecc, pxa_ecc_init()
1400 ecc->mode = NAND_ECC_HW; pxa_ecc_init()
1401 ecc->size = 512; pxa_ecc_init()
1402 ecc->strength = 1; pxa_ecc_init()
1408 ecc->mode = NAND_ECC_HW; pxa_ecc_init()
1409 ecc->size = 512; pxa_ecc_init()
1410 ecc->strength = 1; pxa_ecc_init()
1421 ecc->mode = NAND_ECC_HW; pxa_ecc_init()
1422 ecc->size = info->chunk_size; pxa_ecc_init()
1423 ecc->layout = &ecc_layout_2KB_bch4bit; pxa_ecc_init()
1424 ecc->strength = 16; pxa_ecc_init()
1431 ecc->mode = NAND_ECC_HW; pxa_ecc_init()
1432 ecc->size = info->chunk_size; pxa_ecc_init()
1433 ecc->layout = &ecc_layout_4KB_bch4bit; pxa_ecc_init()
1434 ecc->strength = 16; pxa_ecc_init()
1445 ecc->mode = NAND_ECC_HW; pxa_ecc_init()
1446 ecc->size = info->chunk_size; pxa_ecc_init()
1447 ecc->layout = &ecc_layout_4KB_bch8bit; pxa_ecc_init()
1448 ecc->strength = 16; pxa_ecc_init()
1457 ecc->strength, ecc->size); pxa_ecc_init()
1587 ret = pxa_ecc_init(info, &chip->ecc, ecc_strength, pxa3xx_nand_scan()
1647 chip->ecc.read_page = pxa3xx_nand_read_page_hwecc; alloc_nand_resource()
1648 chip->ecc.write_page = pxa3xx_nand_write_page_hwecc; alloc_nand_resource()
1392 pxa_ecc_init(struct pxa3xx_nand_info *info, struct nand_ecc_ctrl *ecc, int strength, int ecc_stepsize, int page_size) pxa_ecc_init() argument
|
| H A D | denali.c | 1002 * Once handle all ecc errors, controller will triger handle_ecc()
1062 * if it is a raw xfer, we want to disable ecc and send the spare area. write_page()
1063 * !raw_xfer - enable ecc write_page()
1534 denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME; denali_init()
1549 denali->nand.ecc.strength = 15; denali_init()
1550 denali->nand.ecc.layout = &nand_15bit_oob; denali_init()
1551 denali->nand.ecc.bytes = ECC_15BITS; denali_init()
1559 denali->nand.ecc.strength = 8; denali_init()
1560 denali->nand.ecc.layout = &nand_8bit_oob; denali_init()
1561 denali->nand.ecc.bytes = ECC_8BITS; denali_init()
1565 denali->nand.ecc.bytes *= denali->devnum; denali_init()
1566 denali->nand.ecc.strength *= denali->devnum; denali_init()
1567 denali->nand.ecc.layout->eccbytes *= denali_init()
1569 denali->nand.ecc.layout->oobfree[0].offset = denali_init()
1570 denali->bbtskipbytes + denali->nand.ecc.layout->eccbytes; denali_init()
1571 denali->nand.ecc.layout->oobfree[0].length = denali_init()
1572 denali->mtd.oobsize - denali->nand.ecc.layout->eccbytes - denali_init()
1584 denali->nand.ecc.size = ECC_SECTOR_SIZE * denali->devnum; denali_init()
1585 denali->nand.ecc.read_page = denali_read_page; denali_init()
1586 denali->nand.ecc.read_page_raw = denali_read_page_raw; denali_init()
1587 denali->nand.ecc.write_page = denali_write_page; denali_init()
1588 denali->nand.ecc.write_page_raw = denali_write_page_raw; denali_init()
1589 denali->nand.ecc.read_oob = denali_read_oob; denali_init()
1590 denali->nand.ecc.write_oob = denali_write_oob; denali_init()
|
| H A D | sm_common.c | 124 chip->ecc.layout = &nand_oob_sm; sm_register_device()
126 chip->ecc.layout = &nand_oob_sm_small; sm_register_device()
|
| H A D | lpc32xx_mlc.c | 709 nand_chip->ecc.hwctl = lpc32xx_ecc_enable; lpc32xx_nand_probe()
710 nand_chip->ecc.read_page_raw = lpc32xx_read_page; lpc32xx_nand_probe()
711 nand_chip->ecc.read_page = lpc32xx_read_page; lpc32xx_nand_probe()
712 nand_chip->ecc.write_page_raw = lpc32xx_write_page_lowlevel; lpc32xx_nand_probe()
713 nand_chip->ecc.write_page = lpc32xx_write_page_lowlevel; lpc32xx_nand_probe()
714 nand_chip->ecc.write_oob = lpc32xx_write_oob; lpc32xx_nand_probe()
715 nand_chip->ecc.read_oob = lpc32xx_read_oob; lpc32xx_nand_probe()
716 nand_chip->ecc.strength = 4; lpc32xx_nand_probe()
753 nand_chip->ecc.mode = NAND_ECC_HW; lpc32xx_nand_probe()
754 nand_chip->ecc.size = mtd->writesize; lpc32xx_nand_probe()
755 nand_chip->ecc.layout = &lpc32xx_nand_oob; lpc32xx_nand_probe()
|
| H A D | mxc_nand.c | 203 /* OOB placement block for use with hardware ecc generation */
898 * v2 and v3 type controllers can do 4bit or 8bit ecc depending
899 * on how much oob the nand chip has. For 8bit ecc we need at least
920 if (nand_chip->ecc.mode == NAND_ECC_HW && mtd->writesize) preset_v1()
956 if (nand_chip->ecc.mode == NAND_ECC_HW) preset_v2()
1030 if (chip->ecc.mode == NAND_ECC_HW) preset_v3()
1171 * The generic flash bbt decriptors overlap with our ecc
1510 this->ecc.bytes = host->devtype_data->eccbytes; mxcnd_probe()
1514 this->ecc.size = 512; mxcnd_probe()
1515 this->ecc.layout = host->devtype_data->ecclayout_512; mxcnd_probe()
1518 this->ecc.calculate = mxc_nand_calculate_ecc; mxcnd_probe()
1519 this->ecc.hwctl = mxc_nand_enable_hwecc; mxcnd_probe()
1520 this->ecc.correct = host->devtype_data->correct_data; mxcnd_probe()
1521 this->ecc.mode = NAND_ECC_HW; mxcnd_probe()
1523 this->ecc.mode = NAND_ECC_SOFT; mxcnd_probe()
1589 this->ecc.layout = host->devtype_data->ecclayout_2k; mxcnd_probe()
1591 this->ecc.layout = host->devtype_data->ecclayout_4k; mxcnd_probe()
1593 if (this->ecc.mode == NAND_ECC_HW) { mxcnd_probe()
1595 this->ecc.strength = 1; mxcnd_probe()
1597 this->ecc.strength = (host->eccsize == 4) ? 4 : 8; mxcnd_probe()
|
| H A D | sh_flctl.c | 296 "reading empty sector %d, ecc error ignored\n", wait_recfifo_ready()
608 "applied ecc on page 0x%x", page_addr); execmd_read_page_sector()
989 chip->ecc.layout = &flctl_4secc_oob_16; flctl_chip_init_tail()
992 chip->ecc.layout = &flctl_4secc_oob_64; flctl_chip_init_tail()
996 chip->ecc.size = 512; flctl_chip_init_tail()
997 chip->ecc.bytes = 10; flctl_chip_init_tail()
998 chip->ecc.strength = 4; flctl_chip_init_tail()
999 chip->ecc.read_page = flctl_read_page_hwecc; flctl_chip_init_tail()
1000 chip->ecc.write_page = flctl_write_page_hwecc; flctl_chip_init_tail()
1001 chip->ecc.mode = NAND_ECC_HW; flctl_chip_init_tail()
1006 chip->ecc.mode = NAND_ECC_SOFT; flctl_chip_init_tail()
|
| H A D | cmx270_nand.c | 193 this->ecc.mode = NAND_ECC_SOFT; cmx270_init()
|
| H A D | nand_ecc.c | 163 /* 256 or 512 bytes/ecc */ __nand_calculate_ecc()
427 ((struct nand_chip *)mtd->priv)->ecc.size, code); nand_calculate_ecc()
448 /* 256 or 512 bytes/ecc */ __nand_correct_data()
527 ((struct nand_chip *)mtd->priv)->ecc.size); nand_correct_data()
|
| H A D | orion_nand.c | 133 nc->ecc.mode = NAND_ECC_SOFT; orion_nand_probe()
|
| H A D | pasemi_nand.c | 156 chip->ecc.mode = NAND_ECC_SOFT; pasemi_nand_probe()
|
| H A D | socrates_nand.c | 185 nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */ socrates_nand_probe()
|
| H A D | ams-delta.c | 232 this->ecc.mode = NAND_ECC_SOFT; ams_delta_init()
|
| H A D | fsl_upm.c | 171 fun->chip.ecc.mode = NAND_ECC_SOFT; fun_chip_init()
|
| H A D | gpio.c | 272 chip->ecc.mode = NAND_ECC_SOFT; gpio_nand_probe()
|
| H A D | nuc900_nand.c | 268 chip->ecc.mode = NAND_ECC_SOFT; nuc900_nand_probe()
|
| H A D | nandsim.c | 175 MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should "
1459 "reading from %d ecc: corrected=%u failed=%u\n", do_bit_flips()
2260 chip->ecc.mode = NAND_ECC_SOFT; ns_init_module()
2324 /* use 512-byte ecc blocks */ ns_init_module()
2338 chip->ecc.mode = NAND_ECC_SOFT_BCH; ns_init_module()
2339 chip->ecc.size = 512; ns_init_module()
2340 chip->ecc.strength = bch; ns_init_module()
2341 chip->ecc.bytes = eccbytes; ns_init_module()
2342 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size); ns_init_module()
|
| H A D | au1550nd.c | 459 this->ecc.mode = NAND_ECC_SOFT; au1550nd_probe()
|
| H A D | mpc5121_nfc.c | 714 chip->ecc.mode = NAND_ECC_SOFT; mpc5121_nfc_probe()
|
| /linux-4.1.27/arch/mips/dec/ |
| H A D | Makefile | 5 obj-y := ecc-berr.o int-handler.o ioasic-irq.o kn01-berr.o \
|
| H A D | ecc-berr.c | 30 #include <asm/dec/ecc.h>
|
| /linux-4.1.27/drivers/of/ |
| H A D | of_mtd.c | 16 * into the device tree binding of 'nand-ecc', so that MTD
17 * device driver can get nand ecc from device tree.
29 * of_get_nand_ecc_mode - Get nand ecc mode for given device_node
32 * The function gets ecc mode string from property 'nand-ecc-mode',
40 err = of_property_read_string(np, "nand-ecc-mode", &pm); of_get_nand_ecc_mode()
64 ret = of_property_read_u32(np, "nand-ecc-step-size", &val); of_get_nand_ecc_step_size()
71 * correspnding step size as defined by 'nand-ecc-size'
81 ret = of_property_read_u32(np, "nand-ecc-strength", &val); of_get_nand_ecc_strength()
|
| /linux-4.1.27/net/bluetooth/ |
| H A D | Makefile | 16 a2mp.o amp.o ecc.o hci_request.o mgmt_util.o
|
| H A D | selftest.c | 29 #include "ecc.h"
|
| H A D | ecc.c | 29 #include "ecc.h"
|
| H A D | smp.c | 33 #include "ecc.h"
|
| /linux-4.1.27/include/linux/ |
| H A D | bch.h | 36 * @ecc_bits: ecc exact size in bits, i.e. generator polynomial degree (<=m*t)
37 * @ecc_bytes: ecc max size (m*t bits) in bytes
41 * @ecc_buf: ecc parity words buffer
42 * @ecc_buf2: ecc parity words buffer
73 unsigned int len, uint8_t *ecc);
|
| H A D | ccp.h | 548 struct ccp_ecc_engine ecc; member in union:ccp_cmd::__anon11515
|
| /linux-4.1.27/lib/ |
| H A D | bch.c | 30 * Call encode_bch to compute and store ecc parity bytes to a given buffer.
116 uint32_t *ecc) encode_bch_unaligned()
123 p = bch->mod8_tab + (l+1)*(((ecc[0] >> 24)^(*data++)) & 0xff); encode_bch_unaligned()
126 ecc[i] = ((ecc[i] << 8)|(ecc[i+1] >> 24))^(*p++); encode_bch_unaligned()
128 ecc[l] = (ecc[l] << 8)^(*p); encode_bch_unaligned()
133 * convert ecc bytes to aligned, zero-padded 32-bit ecc words
149 * convert 32-bit ecc words to ecc bytes
171 * encode_bch - calculate BCH ecc parity of data
175 * @ecc: ecc parity data, must be initialized by caller
177 * The @ecc parity array is used both as input and output parameter, in order to
181 * The exact number of computed ecc parity bits is given by member @ecc_bits of
185 unsigned int len, uint8_t *ecc) encode_bch()
197 if (ecc) { encode_bch()
198 /* load ecc parity bytes into internal 32-bit buffer */ encode_bch()
199 load_ecc8(bch, bch->ecc_buf, ecc); encode_bch()
250 /* store ecc parity bytes into original parity buffer */ encode_bch()
251 if (ecc) encode_bch()
252 store_ecc8(bch, ecc, bch->ecc_buf); encode_bch()
335 * compute 2t syndromes of ecc polynomial, i.e. ecc(a^j) for j=1..2t
337 static void compute_syndromes(struct bch_control *bch, uint32_t *ecc, compute_syndromes() argument
347 /* make sure extra bits in last ecc word are cleared */ compute_syndromes()
350 ecc[s/32] &= ~((1u << (32-m))-1); compute_syndromes()
355 poly = *ecc++; compute_syndromes()
949 * @recv_ecc: received ecc, if NULL then assume it was XORed in @calc_ecc
950 * @calc_ecc: calculated ecc, if NULL then calc_ecc is computed from @data
968 * by providing ecc = recv_ecc XOR calc_ecc:
969 * decode_bch(@bch, NULL, @len, NULL, ecc, NULL, @errloc)
977 * if (errloc[n] >= 8*len), then n-th error is located in ecc (no need for
1002 /* compute received data ecc into an internal buffer */ decode_bch()
1007 /* load provided calculated ecc */ decode_bch()
1010 /* load received ecc or assume it was XORed in calc_ecc */ decode_bch()
1013 /* XOR received and calculated ecc */ decode_bch()
1246 * BCH control structure, ecc length in bytes is given by member @ecc_bytes of
114 encode_bch_unaligned(struct bch_control *bch, const unsigned char *data, unsigned int len, uint32_t *ecc) encode_bch_unaligned() argument
184 encode_bch(struct bch_control *bch, const uint8_t *data, unsigned int len, uint8_t *ecc) encode_bch() argument
|
| /linux-4.1.27/drivers/crypto/ccp/ |
| H A D | ccp-ops.c | 131 struct ccp_ecc_op ecc; member in union:ccp_op::__anon3808
416 | (op->u.ecc.function << REQ1_ECC_FUNCTION_SHIFT) ccp_perform_ecc()
1804 struct ccp_ecc_engine *ecc = &cmd->u.ecc; ccp_run_ecc_mm_cmd() local
1810 if (!ecc->u.mm.operand_1 || ccp_run_ecc_mm_cmd()
1811 (ecc->u.mm.operand_1_len > CCP_ECC_MODULUS_BYTES)) ccp_run_ecc_mm_cmd()
1814 if (ecc->function != CCP_ECC_FUNCTION_MINV_384BIT) ccp_run_ecc_mm_cmd()
1815 if (!ecc->u.mm.operand_2 || ccp_run_ecc_mm_cmd()
1816 (ecc->u.mm.operand_2_len > CCP_ECC_MODULUS_BYTES)) ccp_run_ecc_mm_cmd()
1819 if (!ecc->u.mm.result || ccp_run_ecc_mm_cmd()
1820 (ecc->u.mm.result_len < CCP_ECC_MODULUS_BYTES)) ccp_run_ecc_mm_cmd()
1843 ccp_reverse_set_dm_area(&src, ecc->mod, ecc->mod_len, ccp_run_ecc_mm_cmd()
1848 ccp_reverse_set_dm_area(&src, ecc->u.mm.operand_1, ccp_run_ecc_mm_cmd()
1849 ecc->u.mm.operand_1_len, ccp_run_ecc_mm_cmd()
1853 if (ecc->function != CCP_ECC_FUNCTION_MINV_384BIT) { ccp_run_ecc_mm_cmd()
1855 ccp_reverse_set_dm_area(&src, ecc->u.mm.operand_2, ccp_run_ecc_mm_cmd()
1856 ecc->u.mm.operand_2_len, ccp_run_ecc_mm_cmd()
1878 op.u.ecc.function = cmd->u.ecc.function; ccp_run_ecc_mm_cmd()
1886 ecc->ecc_result = le16_to_cpup( ccp_run_ecc_mm_cmd()
1888 if (!(ecc->ecc_result & CCP_ECC_RESULT_SUCCESS)) { ccp_run_ecc_mm_cmd()
1894 ccp_reverse_get_dm_area(&dst, ecc->u.mm.result, CCP_ECC_MODULUS_BYTES); ccp_run_ecc_mm_cmd()
1907 struct ccp_ecc_engine *ecc = &cmd->u.ecc; ccp_run_ecc_pm_cmd() local
1913 if (!ecc->u.pm.point_1.x || ccp_run_ecc_pm_cmd()
1914 (ecc->u.pm.point_1.x_len > CCP_ECC_MODULUS_BYTES) || ccp_run_ecc_pm_cmd()
1915 !ecc->u.pm.point_1.y || ccp_run_ecc_pm_cmd()
1916 (ecc->u.pm.point_1.y_len > CCP_ECC_MODULUS_BYTES)) ccp_run_ecc_pm_cmd()
1919 if (ecc->function == CCP_ECC_FUNCTION_PADD_384BIT) { ccp_run_ecc_pm_cmd()
1920 if (!ecc->u.pm.point_2.x || ccp_run_ecc_pm_cmd()
1921 (ecc->u.pm.point_2.x_len > CCP_ECC_MODULUS_BYTES) || ccp_run_ecc_pm_cmd()
1922 !ecc->u.pm.point_2.y || ccp_run_ecc_pm_cmd()
1923 (ecc->u.pm.point_2.y_len > CCP_ECC_MODULUS_BYTES)) ccp_run_ecc_pm_cmd()
1926 if (!ecc->u.pm.domain_a || ccp_run_ecc_pm_cmd()
1927 (ecc->u.pm.domain_a_len > CCP_ECC_MODULUS_BYTES)) ccp_run_ecc_pm_cmd()
1930 if (ecc->function == CCP_ECC_FUNCTION_PMUL_384BIT) ccp_run_ecc_pm_cmd()
1931 if (!ecc->u.pm.scalar || ccp_run_ecc_pm_cmd()
1932 (ecc->u.pm.scalar_len > CCP_ECC_MODULUS_BYTES)) ccp_run_ecc_pm_cmd()
1936 if (!ecc->u.pm.result.x || ccp_run_ecc_pm_cmd()
1937 (ecc->u.pm.result.x_len < CCP_ECC_MODULUS_BYTES) || ccp_run_ecc_pm_cmd()
1938 !ecc->u.pm.result.y || ccp_run_ecc_pm_cmd()
1939 (ecc->u.pm.result.y_len < CCP_ECC_MODULUS_BYTES)) ccp_run_ecc_pm_cmd()
1962 ccp_reverse_set_dm_area(&src, ecc->mod, ecc->mod_len, ccp_run_ecc_pm_cmd()
1967 ccp_reverse_set_dm_area(&src, ecc->u.pm.point_1.x, ccp_run_ecc_pm_cmd()
1968 ecc->u.pm.point_1.x_len, ccp_run_ecc_pm_cmd()
1971 ccp_reverse_set_dm_area(&src, ecc->u.pm.point_1.y, ccp_run_ecc_pm_cmd()
1972 ecc->u.pm.point_1.y_len, ccp_run_ecc_pm_cmd()
1980 if (ecc->function == CCP_ECC_FUNCTION_PADD_384BIT) { ccp_run_ecc_pm_cmd()
1982 ccp_reverse_set_dm_area(&src, ecc->u.pm.point_2.x, ccp_run_ecc_pm_cmd()
1983 ecc->u.pm.point_2.x_len, ccp_run_ecc_pm_cmd()
1986 ccp_reverse_set_dm_area(&src, ecc->u.pm.point_2.y, ccp_run_ecc_pm_cmd()
1987 ecc->u.pm.point_2.y_len, ccp_run_ecc_pm_cmd()
1996 ccp_reverse_set_dm_area(&src, ecc->u.pm.domain_a, ccp_run_ecc_pm_cmd()
1997 ecc->u.pm.domain_a_len, ccp_run_ecc_pm_cmd()
2001 if (ecc->function == CCP_ECC_FUNCTION_PMUL_384BIT) { ccp_run_ecc_pm_cmd()
2003 ccp_reverse_set_dm_area(&src, ecc->u.pm.scalar, ccp_run_ecc_pm_cmd()
2004 ecc->u.pm.scalar_len, ccp_run_ecc_pm_cmd()
2027 op.u.ecc.function = cmd->u.ecc.function; ccp_run_ecc_pm_cmd()
2035 ecc->ecc_result = le16_to_cpup( ccp_run_ecc_pm_cmd()
2037 if (!(ecc->ecc_result & CCP_ECC_RESULT_SUCCESS)) { ccp_run_ecc_pm_cmd()
2048 ccp_reverse_get_dm_area(&dst, ecc->u.pm.result.x, ccp_run_ecc_pm_cmd()
2051 ccp_reverse_get_dm_area(&dst, ecc->u.pm.result.y, ccp_run_ecc_pm_cmd()
2069 struct ccp_ecc_engine *ecc = &cmd->u.ecc; ccp_run_ecc_cmd() local
2071 ecc->ecc_result = 0; ccp_run_ecc_cmd()
2073 if (!ecc->mod || ccp_run_ecc_cmd()
2074 (ecc->mod_len > CCP_ECC_MODULUS_BYTES)) ccp_run_ecc_cmd()
2077 switch (ecc->function) { ccp_run_ecc_cmd()
|
| /linux-4.1.27/fs/ocfs2/ |
| H A D | blockcheck.c | 380 * ocfs2_block_check structure describing the crc32 and the ecc.
395 u32 ecc; ocfs2_block_check_compute() local
400 ecc = ocfs2_hamming_encode_block(data, blocksize); ocfs2_block_check_compute()
403 * No ecc'd ocfs2 structure is larger than 4K, so ecc will be no ocfs2_block_check_compute()
406 BUG_ON(ecc > USHRT_MAX); ocfs2_block_check_compute()
409 bc->bc_ecc = cpu_to_le16((u16)ecc); ocfs2_block_check_compute()
427 u32 crc, ecc; ocfs2_block_check_validate() local
447 ecc = ocfs2_hamming_encode_block(data, blocksize); ocfs2_block_check_validate()
448 ocfs2_hamming_fix_block(data, blocksize, ecc ^ bc_ecc); ocfs2_block_check_validate()
472 * ocfs2_block_check structure describing the crc32 and the ecc.
487 u32 crc, ecc; ocfs2_block_check_compute_bhs() local
496 for (i = 0, crc = ~0, ecc = 0; i < nr; i++) { ocfs2_block_check_compute_bhs()
503 ecc = (u16)ocfs2_hamming_encode(ecc, bhs[i]->b_data, ocfs2_block_check_compute_bhs()
509 * No ecc'd ocfs2 structure is larger than 4K, so ecc will be no ocfs2_block_check_compute_bhs()
512 BUG_ON(ecc > USHRT_MAX); ocfs2_block_check_compute_bhs()
515 bc->bc_ecc = cpu_to_le16((u16)ecc); ocfs2_block_check_compute_bhs()
534 u32 crc, ecc, fix; ocfs2_block_check_validate_bhs() local
560 for (i = 0, ecc = 0; i < nr; i++) { ocfs2_block_check_validate_bhs()
566 ecc = (u16)ocfs2_hamming_encode(ecc, bhs[i]->b_data, ocfs2_block_check_validate_bhs()
570 fix = ecc ^ bc_ecc; ocfs2_block_check_validate_bhs()
|
| H A D | blockcheck.h | 29 u64 b_recover_count; /* Number of blocks fixed by ecc */
|
| H A D | alloc.h | 49 * I/O on the tree. With metadata ecc, we now call different journal_access
|
| H A D | journal.c | 518 * must unconditionally compute the ecc data. ocfs2_frozen_trigger()
538 * must unconditionally compute the ecc data. ocfs2_dq_frozen_trigger()
558 * must unconditionally compute the ecc data. ocfs2_db_frozen_trigger()
|
| H A D | journal.h | 316 /* Anything that has no ecc */
|
| H A D | quota_global.c | 142 * If the ecc fails, we return the error but otherwise ocfs2_validate_quota_block()
|
| H A D | suballoc.c | 282 * If the ecc fails, we return the error but otherwise ocfs2_check_group_descriptor()
311 * If the ecc fails, we return the error but otherwise ocfs2_validate_group_descriptor()
|
| H A D | inode.c | 1335 * If the ecc fails, we return the error but otherwise ocfs2_validate_inode_block()
|
| H A D | dir.c | 454 * If the ecc fails, we return the error but otherwise ocfs2_validate_dir_block()
|
| H A D | refcounttree.c | 92 * If the ecc fails, we return the error but otherwise ocfs2_validate_refcount_block()
|
| H A D | alloc.c | 895 * If the ecc fails, we return the error but otherwise ocfs2_validate_extent_block()
|
| H A D | xattr.c | 489 * If the ecc fails, we return the error but otherwise ocfs2_validate_xattr_block()
|
| /linux-4.1.27/drivers/dma/ |
| H A D | edma.c | 112 struct edma_cc *ecc; member in struct:edma_chan
220 echan->ecc->dummy_slot); edma_execute()
957 static void __init edma_chan_init(struct edma_cc *ecc, edma_chan_init() argument
965 echan->ch_num = EDMA_CTLR_CHAN(ecc->ctlr, i); edma_chan_init()
966 echan->ecc = ecc; edma_chan_init()
982 static void edma_dma_init(struct edma_cc *ecc, struct dma_device *dma, edma_dma_init() argument
1015 struct edma_cc *ecc; edma_probe() local
1022 ecc = devm_kzalloc(&pdev->dev, sizeof(*ecc), GFP_KERNEL); edma_probe()
1023 if (!ecc) { edma_probe()
1028 ecc->ctlr = pdev->id; edma_probe()
1029 ecc->dummy_slot = edma_alloc_slot(ecc->ctlr, EDMA_SLOT_ANY); edma_probe()
1030 if (ecc->dummy_slot < 0) { edma_probe()
1032 return ecc->dummy_slot; edma_probe()
1035 dma_cap_zero(ecc->dma_slave.cap_mask); edma_probe()
1036 dma_cap_set(DMA_SLAVE, ecc->dma_slave.cap_mask); edma_probe()
1037 dma_cap_set(DMA_CYCLIC, ecc->dma_slave.cap_mask); edma_probe()
1038 dma_cap_set(DMA_MEMCPY, ecc->dma_slave.cap_mask); edma_probe()
1040 edma_dma_init(ecc, &ecc->dma_slave, &pdev->dev); edma_probe()
1042 edma_chan_init(ecc, &ecc->dma_slave, ecc->slave_chans); edma_probe()
1044 ret = dma_async_device_register(&ecc->dma_slave); edma_probe()
1048 platform_set_drvdata(pdev, ecc); edma_probe()
1055 edma_free_slot(ecc->dummy_slot); edma_probe()
1062 struct edma_cc *ecc = dev_get_drvdata(dev); edma_remove() local
1064 dma_async_device_unregister(&ecc->dma_slave); edma_remove()
1065 edma_free_slot(ecc->dummy_slot); edma_remove()
|
| /linux-4.1.27/drivers/usb/storage/ |
| H A D | alauda.c | 251 /* compute 3-byte ecc on 256 bytes */ nand_compute_ecc()
252 static void nand_compute_ecc(unsigned char *data, unsigned char *ecc) nand_compute_ecc() argument
266 /* put 4+4+4 = 12 bits in the ecc */ nand_compute_ecc()
268 ecc[0] = ~(a ^ (a<<1) ^ (parity[par] ? 0xaa : 0)); nand_compute_ecc()
271 ecc[1] = ~(a ^ (a<<1) ^ (parity[par] ? 0xaa : 0)); nand_compute_ecc()
273 ecc[2] = ecc2[par]; nand_compute_ecc()
276 static int nand_compare_ecc(unsigned char *data, unsigned char *ecc) nand_compare_ecc() argument
278 return (data[0] == ecc[0] && data[1] == ecc[1] && data[2] == ecc[2]); nand_compare_ecc()
281 static void nand_store_ecc(unsigned char *data, unsigned char *ecc) nand_store_ecc() argument
283 memcpy(data, ecc, 3); nand_store_ecc()
815 unsigned char ecc[3]; alauda_write_lba() local
861 nand_compute_ecc(bptr, ecc); alauda_write_lba()
862 if (!nand_compare_ecc(cptr+13, ecc)) { alauda_write_lba()
863 usb_stor_dbg(us, "Warning: bad ecc in page %d- of pba %d\n", alauda_write_lba()
865 nand_store_ecc(cptr+13, ecc); alauda_write_lba()
867 nand_compute_ecc(bptr + (pagesize / 2), ecc); alauda_write_lba()
868 if (!nand_compare_ecc(cptr+8, ecc)) { alauda_write_lba()
869 usb_stor_dbg(us, "Warning: bad ecc in page %d+ of pba %d\n", alauda_write_lba()
871 nand_store_ecc(cptr+8, ecc); alauda_write_lba()
884 nand_compute_ecc(bptr, ecc); alauda_write_lba()
885 nand_store_ecc(cptr+13, ecc); alauda_write_lba()
886 nand_compute_ecc(bptr + (pagesize / 2), ecc); alauda_write_lba()
887 nand_store_ecc(cptr+8, ecc); alauda_write_lba()
|
| H A D | sddr09.c | 219 /* compute 3-byte ecc on 256 bytes */ nand_compute_ecc()
220 static void nand_compute_ecc(unsigned char *data, unsigned char *ecc) { nand_compute_ecc() argument
233 /* put 4+4+4 = 12 bits in the ecc */ nand_compute_ecc()
235 ecc[0] = ~(a ^ (a<<1) ^ (parity[par] ? 0xaa : 0)); nand_compute_ecc()
238 ecc[1] = ~(a ^ (a<<1) ^ (parity[par] ? 0xaa : 0)); nand_compute_ecc()
240 ecc[2] = ecc2[par]; nand_compute_ecc()
243 static int nand_compare_ecc(unsigned char *data, unsigned char *ecc) { nand_compare_ecc() argument
244 return (data[0] == ecc[0] && data[1] == ecc[1] && data[2] == ecc[2]); nand_compare_ecc()
247 static void nand_store_ecc(unsigned char *data, unsigned char *ecc) { nand_store_ecc() argument
248 memcpy(data, ecc, 3); nand_store_ecc()
868 unsigned char ecc[3]; sddr09_write_lba() local
909 nand_compute_ecc(bptr, ecc); sddr09_write_lba()
910 if (!nand_compare_ecc(cptr+13, ecc)) { sddr09_write_lba()
911 usb_stor_dbg(us, "Warning: bad ecc in page %d- of pba %d\n", sddr09_write_lba()
913 nand_store_ecc(cptr+13, ecc); sddr09_write_lba()
915 nand_compute_ecc(bptr+(info->pagesize / 2), ecc); sddr09_write_lba()
916 if (!nand_compare_ecc(cptr+8, ecc)) { sddr09_write_lba()
917 usb_stor_dbg(us, "Warning: bad ecc in page %d+ of pba %d\n", sddr09_write_lba()
919 nand_store_ecc(cptr+8, ecc); sddr09_write_lba()
932 nand_compute_ecc(bptr, ecc); sddr09_write_lba()
933 nand_store_ecc(cptr+13, ecc); sddr09_write_lba()
934 nand_compute_ecc(bptr+(info->pagesize / 2), ecc); sddr09_write_lba()
935 nand_store_ecc(cptr+8, ecc); sddr09_write_lba()
|
| /linux-4.1.27/drivers/staging/mt29f_spinand/ |
| H A D | mt29f_spinand.c | 383 dev_err(&spi_nand->dev, "ecc error, page=%d\n", spinand_read_page()
401 dev_err(&spi_nand->dev, "disable ecc failed!!\n"); spinand_read_page()
494 dev_err(&spi_nand->dev, "enable ecc failed!!\n"); spinand_program_page()
538 dev_err(&spi_nand->dev, "disable ecc failed!!\n"); spinand_program_page()
618 int eccsize = chip->ecc.size; spinand_write_page_hwecc()
619 int eccsteps = chip->ecc.steps; spinand_write_page_hwecc()
632 int eccsize = chip->ecc.size; spinand_read_page_hwecc()
633 int eccsteps = chip->ecc.steps; spinand_read_page_hwecc()
883 chip->ecc.mode = NAND_ECC_HW; spinand_probe()
884 chip->ecc.size = 0x200; spinand_probe()
885 chip->ecc.bytes = 0x6; spinand_probe()
886 chip->ecc.steps = 0x4; spinand_probe()
888 chip->ecc.strength = 1; spinand_probe()
889 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; spinand_probe()
890 chip->ecc.layout = &spinand_oob_64; spinand_probe()
891 chip->ecc.read_page = spinand_read_page_hwecc; spinand_probe()
892 chip->ecc.write_page = spinand_write_page_hwecc; spinand_probe()
894 chip->ecc.mode = NAND_ECC_SOFT; spinand_probe()
896 pr_info("%s: disable ecc failed!\n", __func__); spinand_probe()
|
| /linux-4.1.27/drivers/mtd/tests/ |
| H A D | mtd_nandecctest.c | 205 .name = "single-bit-error-in-ecc-correct",
215 .name = "single-bit-error-in-data-and-ecc-detect",
220 .name = "double-bit-error-in-ecc-detect",
232 print_hex_dump(KERN_INFO, "hexdump of error ecc: ", dump_data_ecc()
238 print_hex_dump(KERN_INFO, "hexdump of correct ecc: ", dump_data_ecc()
|
| /linux-4.1.27/drivers/scsi/csiostor/ |
| H A D | csio_hw_t5.c | 166 * @ecc: where to store the corresponding 64-bit ECC word
174 uint64_t *ecc) csio_t5_mc_read()
202 if (ecc) csio_t5_mc_read()
203 *ecc = csio_rd_reg64(hw, MC_DATA(16)); csio_t5_mc_read()
214 * @ecc: where to store the corresponding 64-bit ECC word
222 uint64_t *ecc) csio_t5_edc_read()
258 if (ecc) csio_t5_edc_read()
259 *ecc = csio_rd_reg64(hw, EDC_DATA(16)); csio_t5_edc_read()
173 csio_t5_mc_read(struct csio_hw *hw, int idx, uint32_t addr, __be32 *data, uint64_t *ecc) csio_t5_mc_read() argument
221 csio_t5_edc_read(struct csio_hw *hw, int idx, uint32_t addr, __be32 *data, uint64_t *ecc) csio_t5_edc_read() argument
|
| /linux-4.1.27/arch/mips/include/asm/dec/ |
| H A D | ecc.h | 2 * include/asm-mips/dec/ecc.h
|
| H A D | kn03.h | 18 #include <asm/dec/ecc.h>
|
| /linux-4.1.27/include/linux/mtd/ |
| H A D | nand_bch.h | 22 * Calculate BCH ecc code mtd_nand_has_bch()
|
| H A D | fsmc.h | 107 * There are 13 bytes of ecc for every 512 byte block in FSMC version 8
110 * Managing the ecc bytes in the following way is easier. This way is
|
| H A D | nand.h | 570 * @ecc: [BOARDSPECIFIC] ECC control structure
710 struct nand_ecc_ctrl ecc; member in struct:nand_chip
769 #define NAND_ECC_STRENGTH(type) ((type)->ecc.strength_ds)
770 #define NAND_ECC_STEP(type) ((type)->ecc.step_ds)
789 * @ecc: ECC correctability and step information from the datasheet.
790 * @ecc.strength_ds: The ECC correctability from the datasheet, same as the
792 * @ecc.step_ds: The ECC step required by the @ecc.strength_ds, same as the
819 } ecc; member in struct:nand_flash_dev
|
| H A D | mtd.h | 159 * one region comprising an ecc step equals or exceeds this value.
173 /* the ecc step size. */
176 /* max number of correctible bit errors per ecc step */
|
| H A D | onenand.h | 83 * @ecclayout: [REPLACEABLE] the default ecc placement scheme
|
| /linux-4.1.27/drivers/edac/ |
| H A D | synopsys_edac.c | 145 * synps_edac_geterror_info - Get the current ecc error info
147 * @p: Pointer to the synopsys ecc status structure
149 * Determines there is any ecc error or not
201 * @p: Pointer to the synopsys ecc status structure
289 * synps_edac_get_eccstate - Return the controller ecc enable/disable status
294 * Return: a ecc status boolean i.e true/false - enabled/disabled.
329 * @base: pointer to the synopsys ecc status structure
|
| H A D | highbank_l2_edac.c | 54 { .compatible = "calxeda,hb-sregs-l2-ecc", },
|
| H A D | mce_amd.c | 754 int ecc; amd_decode_mce() local
777 ecc = (m->status >> 45) & 0x3; amd_decode_mce()
778 if (ecc) amd_decode_mce()
779 pr_cont("|%sECC", ((ecc == 2) ? "C" : "U")); amd_decode_mce()
|
| H A D | amd76x_edac.c | 9 * http://www.anime.net/~goemon/linux-ecc/
|
| H A D | mpc85xx_edac.c | 736 u8 ecc = 0; calculate_ecc() local
752 ecc |= bit_cnt << i; calculate_ecc()
755 return ecc; calculate_ecc()
779 * Decode data and ecc syndrome to determine what went wrong
|
| H A D | e7xxx_edac.c | 11 * http://www.anime.net/~goemon/linux-ecc/
|
| H A D | edac_core.h | 10 * http://www.anime.net/~goemon/linux-ecc/
|
| H A D | i82875p_edac.c | 146 * 19:18 Data Integ Mode 00=none,01=ecc
|
| H A D | edac_mc.c | 9 * http://www.anime.net/~goemon/linux-ecc/
|
| H A D | i7core_edac.c | 1020 edac_dbg(0, "Error inject addr match 0x%016llx, ecc 0x%08x, inject 0x%08x\n", i7core_inject_enable_store()
|
| H A D | amd64_edac.c | 1081 * non-chipkill ecc mode k8_map_sysaddr_to_csrow()
|
| /linux-4.1.27/drivers/mtd/nand/gpmi-nand/ |
| H A D | gpmi-nand.c | 159 "unsupported nand chip. ecc bits : %d, ecc size : %d\n", set_geometry_by_ecc_info()
171 "unsupported nand chip. ecc size: %d, oob size : %d\n", set_geometry_by_ecc_info()
205 * C : the ecc chunk size, aka the "data" above. set_geometry_by_ecc_info()
288 "required ecc strength of the NAND chip: %d is not supported by the GPMI controller (%d)\n", legacy_set_geometry()
334 * : C >= O (C is the ecc chunk size) legacy_set_geometry()
369 if (of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc") common_nfc_set_geometry()
1081 int size = chip->ecc.size; /* ECC chunk size */ gpmi_ecc_read_subpage()
1173 dev_dbg(this->dev, "ecc write page.\n"); gpmi_ecc_write_page()
1294 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
1720 chip->ecc.write_page_raw(mtd, chip, buffer, 0); mx23_write_transcription_stamp()
1842 struct nand_ecc_ctrl *ecc = &chip->ecc; gpmi_init_last() local
1852 ecc->read_page = gpmi_ecc_read_page; gpmi_init_last()
1853 ecc->write_page = gpmi_ecc_write_page; gpmi_init_last()
1854 ecc->read_oob = gpmi_ecc_read_oob; gpmi_init_last()
1855 ecc->write_oob = gpmi_ecc_write_oob; gpmi_init_last()
1856 ecc->read_page_raw = gpmi_ecc_read_page_raw; gpmi_init_last()
1857 ecc->write_page_raw = gpmi_ecc_write_page_raw; gpmi_init_last()
1858 ecc->read_oob_raw = gpmi_ecc_read_oob_raw; gpmi_init_last()
1859 ecc->write_oob_raw = gpmi_ecc_write_oob_raw; gpmi_init_last()
1860 ecc->mode = NAND_ECC_HW; gpmi_init_last()
1861 ecc->size = bch_geo->ecc_chunk_size; gpmi_init_last()
1862 ecc->strength = bch_geo->ecc_strength; gpmi_init_last()
1863 ecc->layout = &gpmi_hw_ecclayout; gpmi_init_last()
1872 ecc->read_subpage = gpmi_ecc_read_subpage; gpmi_init_last()
|
| /linux-4.1.27/include/linux/platform_data/ |
| H A D | atmel.h | 70 u8 ecc_mode; /* ecc mode */
|
| /linux-4.1.27/arch/mips/jz4740/ |
| H A D | board-qi_lb60.c | 69 * In order to support these devices as well the partition and ecc layout is
131 chip->ecc.layout = &qi_lb60_ecclayout_2gb; qi_lb60_nand_ident()
135 chip->ecc.layout = &qi_lb60_ecclayout_1gb; qi_lb60_nand_ident()
|
| /linux-4.1.27/arch/mips/mm/ |
| H A D | cerr-sb1.c | 494 uint8_t ecc, lru; extract_dc() local
564 ecc = dc_ecc(datalo); extract_dc()
565 if (ecc != datahi) { extract_dc()
568 ecc ^= datahi; extract_dc()
569 bits = hweight8(ecc); extract_dc()
|
| /linux-4.1.27/drivers/mtd/onenand/ |
| H A D | omap2.c | 237 int ecc = read_reg(c, ONENAND_REG_ECC_STATUS); omap2_onenand_wait() local
239 if (ecc) { omap2_onenand_wait()
244 if (ecc & ONENAND_ECC_2BIT_ALL) { omap2_onenand_wait()
247 ecc, addr1, addr8); omap2_onenand_wait()
250 } else if (ecc & ONENAND_ECC_1BIT_ALL) { omap2_onenand_wait()
253 "addr8 %#x\n", ecc, addr1, addr8); omap2_onenand_wait()
|
| H A D | samsung.c | 322 unsigned int stat, ecc; s3c_onenand_wait() local
362 ecc = s3c_read_reg(ECC_ERR_STAT_OFFSET); s3c_onenand_wait()
363 if (ecc & ONENAND_ECC_4BIT_UNCORRECTABLE) { s3c_onenand_wait()
365 ecc); s3c_onenand_wait()
724 int ecc = s3c_read_reg(ECC_ERR_STAT_OFFSET); s3c_onenand_bbt_wait() local
725 if (ecc & ONENAND_ECC_4BIT_UNCORRECTABLE) { s3c_onenand_bbt_wait()
|
| H A D | onenand_base.c | 69 * For now, we expose only 64 out of 80 ecc bytes
493 * onenand_read_ecc - return ecc status
498 int ecc, i, result = 0; onenand_read_ecc() local
504 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2); onenand_read_ecc()
505 if (likely(!ecc)) onenand_read_ecc()
507 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR) onenand_read_ecc()
555 int ecc = onenand_read_ecc(this); onenand_wait() local
556 if (ecc) { onenand_wait()
557 if (ecc & ONENAND_ECC_2BIT_ALL) { onenand_wait()
559 __func__, ecc); onenand_wait()
562 } else if (ecc & ONENAND_ECC_1BIT_ALL) { onenand_wait()
564 __func__, ecc); onenand_wait()
1203 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */ onenand_mlc_read_ops_nolock()
1336 /* return max bitflips per ecc step; ONENANDs correct 1 bit only */ onenand_read_ops_nolock()
1452 * Read with ecc
1523 unsigned int interrupt, ctrl, ecc, addr1, addr8; onenand_bbt_wait() local
1539 ecc = onenand_read_ecc(this); onenand_bbt_wait()
1540 if (ecc & ONENAND_ECC_2BIT_ALL) { onenand_bbt_wait()
1541 printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x " onenand_bbt_wait()
1543 __func__, ecc, ctrl, interrupt, addr1, addr8); onenand_bbt_wait()
|
| /linux-4.1.27/arch/sparc/include/asm/ |
| H A D | ecc.h | 2 * ecc.h: Definitions and defines for the external cache/memory
|
| /linux-4.1.27/fs/pstore/ |
| H A D | ram_core.c | 131 uint8_t *data, size_t len, uint8_t *ecc) persistent_ram_encode_rs8()
140 ecc[i] = par[i]; persistent_ram_encode_rs8()
144 void *data, size_t len, uint8_t *ecc) persistent_ram_decode_rs8()
150 par[i] = ecc[i]; persistent_ram_decode_rs8()
130 persistent_ram_encode_rs8(struct persistent_ram_zone *prz, uint8_t *data, size_t len, uint8_t *ecc) persistent_ram_encode_rs8() argument
143 persistent_ram_decode_rs8(struct persistent_ram_zone *prz, void *data, size_t len, uint8_t *ecc) persistent_ram_decode_rs8() argument
|
| H A D | ram.c | 79 module_param_named(ecc, ramoops_ecc, int, 0600);
546 pr_info("attached 0x%lx@0x%llx, ecc: %d/%d\n", ramoops_probe()
618 * For backwards compatibility ramoops.ecc=1 means 16 bytes ECC ramoops_register_dummy()
|
| /linux-4.1.27/drivers/net/can/sja1000/ |
| H A D | sja1000.c | 400 uint8_t ecc, alc; sja1000_err() local
438 ecc = priv->read_reg(priv, SJA1000_ECC); sja1000_err()
442 switch (ecc & ECC_MASK) { sja1000_err()
454 cf->data[3] = ecc & ECC_SEG; sja1000_err()
458 if ((ecc & ECC_DIR) == 0) sja1000_err()
|
| /linux-4.1.27/arch/powerpc/sysdev/ |
| H A D | fsl_85xx_cache_ctlr.h | 76 u32 errinjctl; /* 0xE08 - Error injection tag/ecc control */
|
| H A D | axonram.c | 82 static DEVICE_ATTR(ecc, S_IRUGO, axon_ram_sysfs_ecc, NULL);
|
| /linux-4.1.27/arch/cris/arch-v32/drivers/mach-a3/ |
| H A D | nandflash.c | 163 this->ecc.mode = NAND_ECC_SOFT; crisv32_nand_flash_probe()
|
| /linux-4.1.27/arch/cris/arch-v32/drivers/mach-fs/ |
| H A D | nandflash.c | 154 this->ecc.mode = NAND_ECC_SOFT; crisv32_nand_flash_probe()
|
| /linux-4.1.27/drivers/net/can/usb/ |
| H A D | ems_usb.c | 173 u8 ecc; member in struct:cpc_sja1000_can_error
368 u8 ecc = msg->msg.error.cc.regs.sja1000.ecc; ems_usb_rx_err() local
378 switch (ecc & SJA1000_ECC_MASK) { ems_usb_rx_err()
390 cf->data[3] = ecc & SJA1000_ECC_SEG; ems_usb_rx_err()
395 if ((ecc & SJA1000_ECC_DIR) == 0) ems_usb_rx_err()
|
| H A D | esd_usb2.c | 236 u8 ecc = msg->msg.rx.data[1]; esd_usb2_rx_event() local
274 switch (ecc & SJA1000_ECC_MASK) { esd_usb2_rx_event()
286 cf->data[3] = ecc & SJA1000_ECC_SEG; esd_usb2_rx_event()
291 if (!(ecc & SJA1000_ECC_DIR)) esd_usb2_rx_event()
|
| /linux-4.1.27/drivers/mtd/ |
| H A D | sm_ftl.c | 221 uint8_t ecc[3]; sm_correct_sector() local
223 __nand_calculate_ecc(buffer, SM_SMALL_PAGE, ecc); sm_correct_sector()
224 if (__nand_correct_data(buffer, ecc, oob->ecc1, SM_SMALL_PAGE) < 0) sm_correct_sector()
229 __nand_calculate_ecc(buffer, SM_SMALL_PAGE, ecc); sm_correct_sector()
230 if (__nand_correct_data(buffer, ecc, oob->ecc2, SM_SMALL_PAGE) < 0) sm_correct_sector()
|
| H A D | mtdcore.c | 881 * any one ecc region (if applicable; zero otherwise). mtd_read()
887 return 0; /* device lacks ecc */ mtd_read()
945 return 0; /* device lacks ecc */ mtd_read_oob()
|
| /linux-4.1.27/arch/mips/include/asm/sn/sn0/ |
| H A D | hubmd.h | 545 ae_vld: 1, /* 62: valid dir prot ecc error */
553 ae_ovr: 1, /* 1: multiple prot ecc errs*/
567 bad_syn: 8, /* 39-32: bad mem ecc syndrome */
|
| /linux-4.1.27/arch/blackfin/mm/ |
| H A D | sram-alloc.c | 194 printk(KERN_ERR "L2 ecc error happened\n"); l2_ecc_err()
220 ret = request_irq(IRQ_L2CTL0_ECC_ERR, l2_ecc_err, 0, "l2-ecc-err", l2_sram_init()
223 printk(KERN_INFO "Fail to request l2 ecc error interrupt"); l2_sram_init()
|
| /linux-4.1.27/arch/mips/kernel/ |
| H A D | mips-mt.c | 255 /* ErrCtl register is known as "ecc" to Linux */ mips_mt_set_cpuoptions()
|
| /linux-4.1.27/drivers/mtd/devices/ |
| H A D | docg3.c | 73 * @eccpos: ecc positions (byte 7 is Hamming ECC, byte 8-14 are BCH ECC)
622 * understands the (data, ecc, syndroms) in an inverted order in comparison to
626 * The hardware ecc unit produces oob_ecc ^ calc_ecc. The kernel's bch
637 u8 ecc[DOC_ECC_BCH_SIZE]; doc_ecc_bch_fix_data() local
641 ecc[i] = bitrev8(hwecc[i]); doc_ecc_bch_fix_data()
644 NULL, ecc, NULL, errorpos); doc_ecc_bch_fix_data()
775 * @hwecc: the array of 7 integers where the hardware ecc will be stored
|
| /linux-4.1.27/drivers/net/can/ |
| H A D | janz-ican3.c | 933 u8 isrc, ecc, status, rxerr, txerr; ican3_handle_cevtind() local
950 ecc = msg->data[2]; ican3_handle_cevtind()
970 if (!(ecc & ECC_DIR)) { ican3_handle_cevtind()
1028 switch (ecc & ECC_MASK) { ican3_handle_cevtind()
1040 cf->data[3] = ecc & ECC_SEG; ican3_handle_cevtind()
1044 if (!(ecc & ECC_DIR)) ican3_handle_cevtind()
|
| /linux-4.1.27/drivers/scsi/ |
| H A D | osst.h | 256 unsigned ecc :1; /* Supports error correction */ member in struct:__anon9414
268 unsigned ecc :1; /* Supports error correction */ member in struct:__anon9414
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| /linux-4.1.27/drivers/mtd/nand/bcm47xxnflash/ |
| H A D | ops_bcm4706.c | 398 b47n->nand_chip.ecc.mode = NAND_ECC_NONE; /* TODO: implement ECC */ bcm47xxnflash_ops_bcm4706_init()
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| /linux-4.1.27/include/uapi/mtd/ |
| H A D | mtd-abi.h | 118 #define MTD_NANDECC_PLACEONLY 3 // Use the given placement in the structure (Do not store ecc result on read)
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| /linux-4.1.27/include/linux/mmc/ |
| H A D | mmc.h | 219 u8 ecc; member in struct:_mmc_csd
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| /linux-4.1.27/drivers/memory/ |
| H A D | omap-gpmc.c | 1808 /* select ecc-scheme for NAND */ gpmc_probe_nand_child()
1809 if (of_property_read_string(child, "ti,nand-ecc-opt", &s)) { gpmc_probe_nand_child()
1810 pr_err("%s: ti,nand-ecc-opt not found\n", __func__); gpmc_probe_nand_child()
1841 pr_err("%s: ti,nand-ecc-opt invalid value\n", __func__); gpmc_probe_nand_child()
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| /linux-4.1.27/arch/sparc/kernel/ |
| H A D | sun4m_irq.c | 120 #define SUN4M_INT_ECC_ERR 0x10000000 /* ecc memory error */
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| /linux-4.1.27/arch/ia64/include/asm/sn/ |
| H A D | sn_sal.h | 1166 sn_inject_error(u64 paddr, u64 *data, u64 *ecc) sn_inject_error() argument
1171 (u64)ecc, 0, 0, 0, 0); sn_inject_error()
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| /linux-4.1.27/drivers/net/ethernet/chelsio/cxgb4/ |
| H A D | t4_hw.c | 341 * @ecc: where to store the corresponding 64-bit ECC word
347 int t4_mc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc) t4_mc_read() argument
382 if (ecc) t4_mc_read()
383 *ecc = t4_read_reg64(adap, MC_DATA(16)); t4_mc_read()
394 * @ecc: where to store the corresponding 64-bit ECC word
400 int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc) t4_edc_read() argument
439 if (ecc) t4_edc_read()
440 *ecc = t4_read_reg64(adap, EDC_DATA(16)); t4_edc_read()
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| /linux-4.1.27/drivers/video/fbdev/omap2/dss/ |
| H A D | dsi.c | 2672 int channel, u8 data_type, u16 len, u8 ecc) dsi_vc_write_long_header()
2683 FLD_VAL(ecc, 31, 24); dsi_vc_write_long_header()
2702 u8 data_type, u8 *data, u16 len, u8 ecc) dsi_vc_send_long()
2722 dsi_vc_write_long_header(dsidev, channel, data_type, len, ecc); dsi_vc_send_long()
2766 u8 data_type, u16 data, u8 ecc) dsi_vc_send_short()
2788 r = (data_id << 0) | (data << 8) | (ecc << 24); dsi_vc_send_short()
2671 dsi_vc_write_long_header(struct platform_device *dsidev, int channel, u8 data_type, u16 len, u8 ecc) dsi_vc_write_long_header() argument
2701 dsi_vc_send_long(struct platform_device *dsidev, int channel, u8 data_type, u8 *data, u16 len, u8 ecc) dsi_vc_send_long() argument
2765 dsi_vc_send_short(struct platform_device *dsidev, int channel, u8 data_type, u16 data, u8 ecc) dsi_vc_send_short() argument
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| /linux-4.1.27/drivers/scsi/libsas/ |
| H A D | sas_expander.c | 1777 static int sas_get_ex_change_count(struct domain_device *dev, int *ecc) sas_get_ex_change_count() argument
1804 *ecc = be16_to_cpu(rg_resp->rg.change_count); sas_get_ex_change_count()
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| /linux-4.1.27/arch/mips/include/asm/octeon/ |
| H A D | cvmx-l2c-defs.h | 2833 uint64_t ecc:6; member in struct:cvmx_l2c_tadx_tag::cvmx_l2c_tadx_tag_s
2849 uint64_t ecc:6;
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| /linux-4.1.27/drivers/scsi/megaraid/ |
| H A D | megaraid_sas.h | 1630 } __attribute__ ((packed)) ecc; member in union:megasas_evt_detail::__anon9307
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| /linux-4.1.27/fs/jffs2/ |
| H A D | wbuf.c | 980 * power loss before the ecc write or a erase was completed. jffs2_flash_read()
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| /linux-4.1.27/drivers/staging/rts5208/ |
| H A D | xd.c | 1275 dev_dbg(rtsx_dev(chip), "old block 0x%x ecc error\n", xd_copy_page()
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| /linux-4.1.27/drivers/crypto/qat/qat_common/ |
| H A D | qat_hal.c | 554 /* clear the ecc bits */ qat_hal_set_uword_ecc()
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| /linux-4.1.27/arch/arm/mm/ |
| H A D | mmu.c | 222 early_param("ecc", early_ecc);
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| /linux-4.1.27/drivers/net/ethernet/neterion/vxge/ |
| H A D | vxge-traffic.h | 80 * @VXGE_HW_EVENT_MRPCIM_ECCERR: mrpcim ecc error event.
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| /linux-4.1.27/drivers/scsi/qla2xxx/ |
| H A D | qla_dbg.c | 1994 /* select PCR and disable ecc checking and correction */ qla83xx_fw_dump()
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