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Searched refs:ecc (Results 1 – 171 of 171) sorted by relevance

/linux-4.1.27/drivers/mtd/nand/
Dnand_base.c1137 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome()
1138 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome()
1142 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
1146 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome()
1147 chip->read_buf(mtd, oob, chip->ecc.prepad); in nand_read_page_raw_syndrome()
1148 oob += chip->ecc.prepad; in nand_read_page_raw_syndrome()
1154 if (chip->ecc.postpad) { in nand_read_page_raw_syndrome()
1155 chip->read_buf(mtd, oob, chip->ecc.postpad); in nand_read_page_raw_syndrome()
1156 oob += chip->ecc.postpad; in nand_read_page_raw_syndrome()
1178 int i, eccsize = chip->ecc.size; in nand_read_page_swecc()
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Dsunxi_nand.c528 struct nand_ecc_ctrl *ecc = &chip->ecc; in sunxi_nfc_hw_ecc_read_page() local
529 struct nand_ecclayout *layout = ecc->layout; in sunxi_nfc_hw_ecc_read_page()
530 struct sunxi_nand_hw_ecc *data = ecc->priv; in sunxi_nfc_hw_ecc_read_page()
545 for (i = 0; i < ecc->steps; i++) { in sunxi_nfc_hw_ecc_read_page()
547 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, i * ecc->size, -1); in sunxi_nfc_hw_ecc_read_page()
549 offset = mtd->writesize + layout->eccpos[i * ecc->bytes] - 4; in sunxi_nfc_hw_ecc_read_page()
551 chip->read_buf(mtd, NULL, ecc->size); in sunxi_nfc_hw_ecc_read_page()
566 memcpy_fromio(buf + (i * ecc->size), in sunxi_nfc_hw_ecc_read_page()
567 nfc->regs + NFC_RAM0_BASE, ecc->size); in sunxi_nfc_hw_ecc_read_page()
586 ecc->bytes + 4); in sunxi_nfc_hw_ecc_read_page()
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Domap2.c895 if ((info->nand.ecc.mode == NAND_ECC_HW) && in omap_correct_data()
896 (info->nand.ecc.size == 2048)) in omap_correct_data()
967 val = ((((info->nand.ecc.size >> 1) - 1) << ECCSIZE1_SHIFT) | in omap_enable_hwecc()
1079 nsectors = chip->ecc.steps; in omap_enable_hwecc_bch()
1099 nsectors = chip->ecc.steps; in omap_enable_hwecc_bch()
1112 nsectors = chip->ecc.steps; in omap_enable_hwecc_bch()
1167 int eccbytes = info->nand.ecc.bytes; in omap_calculate_ecc_bch()
1299 for (i = 0; i < info->nand.ecc.size; i++) { in erased_sector_bitflips()
1301 if (flip_bits > info->nand.ecc.strength) in erased_sector_bitflips()
1305 for (i = 0; i < info->nand.ecc.bytes - 1; i++) { in erased_sector_bitflips()
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Datmel_nand.c124 void __iomem *ecc; member
543 value = pmecc_readl_rem_relaxed(host->ecc, sector, i / 2); in pmecc_gen_syndrome()
802 static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, in pmecc_correct_data() argument
831 tmp = sector_num * nand_chip->ecc.bytes in pmecc_correct_data()
833 err_byte = ecc[tmp]; in pmecc_correct_data()
834 ecc[tmp] ^= (1 << bit_pos); in pmecc_correct_data()
836 pos = tmp + nand_chip->ecc.layout->eccpos[0]; in pmecc_correct_data()
838 pos, bit_pos, err_byte, ecc[tmp]); in pmecc_correct_data()
849 u8 *ecc) in pmecc_correction() argument
861 for (i = 0; i < nand_chip->ecc.total; i++) in pmecc_correction()
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Dfsmc_nand.c467 uint8_t *ecc) in fsmc_read_hwecc_ecc4() argument
489 ecc[0] = (uint8_t) (ecc_tmp >> 0); in fsmc_read_hwecc_ecc4()
490 ecc[1] = (uint8_t) (ecc_tmp >> 8); in fsmc_read_hwecc_ecc4()
491 ecc[2] = (uint8_t) (ecc_tmp >> 16); in fsmc_read_hwecc_ecc4()
492 ecc[3] = (uint8_t) (ecc_tmp >> 24); in fsmc_read_hwecc_ecc4()
495 ecc[4] = (uint8_t) (ecc_tmp >> 0); in fsmc_read_hwecc_ecc4()
496 ecc[5] = (uint8_t) (ecc_tmp >> 8); in fsmc_read_hwecc_ecc4()
497 ecc[6] = (uint8_t) (ecc_tmp >> 16); in fsmc_read_hwecc_ecc4()
498 ecc[7] = (uint8_t) (ecc_tmp >> 24); in fsmc_read_hwecc_ecc4()
501 ecc[8] = (uint8_t) (ecc_tmp >> 0); in fsmc_read_hwecc_ecc4()
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Dlpc32xx_slc.c405 static void lpc32xx_slc_ecc_copy(uint8_t *spare, const uint32_t *ecc, int count) in lpc32xx_slc_ecc_copy() argument
410 uint32_t ce = ecc[i / 3]; in lpc32xx_slc_ecc_copy()
529 for (i = 0; i < chip->ecc.steps; i++) { in lpc32xx_xfer()
532 dma_buf + i * chip->ecc.size, in lpc32xx_xfer()
533 mtd->writesize / chip->ecc.steps, dir); in lpc32xx_xfer()
538 if (i == chip->ecc.steps - 1) in lpc32xx_xfer()
570 host->ecc_buf[chip->ecc.steps - 1] = in lpc32xx_xfer()
612 status = lpc32xx_xfer(mtd, buf, chip->ecc.steps, 1); in lpc32xx_nand_read_page_syndrome()
618 lpc32xx_slc_ecc_copy(tmpecc, (uint32_t *) host->ecc_buf, chip->ecc.steps); in lpc32xx_nand_read_page_syndrome()
621 oobecc = chip->oob_poi + chip->ecc.layout->eccpos[0]; in lpc32xx_nand_read_page_syndrome()
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Dtmio_nand.c272 unsigned int ecc; in tmio_nand_calculate_ecc() local
276 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); in tmio_nand_calculate_ecc()
277 ecc_code[1] = ecc; /* 000-255 LP7-0 */ in tmio_nand_calculate_ecc()
278 ecc_code[0] = ecc >> 8; /* 000-255 LP15-8 */ in tmio_nand_calculate_ecc()
279 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); in tmio_nand_calculate_ecc()
280 ecc_code[2] = ecc; /* 000-255 CP5-0,11b */ in tmio_nand_calculate_ecc()
281 ecc_code[4] = ecc >> 8; /* 256-511 LP7-0 */ in tmio_nand_calculate_ecc()
282 ecc = tmio_ioread16(tmio->fcr + FCR_DATA); in tmio_nand_calculate_ecc()
283 ecc_code[3] = ecc; /* 256-511 LP15-8 */ in tmio_nand_calculate_ecc()
284 ecc_code[5] = ecc >> 8; /* 256-511 CP5-0,11b */ in tmio_nand_calculate_ecc()
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Dbf5xx_nand.c313 if (chip->ecc.size == 512) { in bf5xx_nand_correct_data()
349 if (chip->ecc.size == 512) { in bf5xx_nand_calculate_ecc()
483 (unsigned int)(buf + chip->ecc.size)); in bf5xx_nand_dma_rw()
486 (unsigned int)(buf + chip->ecc.size)); in bf5xx_nand_dma_rw()
507 set_dma_x_count(CH_NFC, (chip->ecc.size >> 1)); in bf5xx_nand_dma_rw()
513 set_dma_x_count(CH_NFC, (chip->ecc.size >> 2)); in bf5xx_nand_dma_rw()
539 if (len == chip->ecc.size) in bf5xx_nand_dma_read_buf()
553 if (len == chip->ecc.size) in bf5xx_nand_dma_write_buf()
699 chip->ecc.size = 512; in bf5xx_nand_scan()
700 chip->ecc.bytes = 6; in bf5xx_nand_scan()
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Dcs553x_nand.c172 uint32_t ecc; in cs_calculate_ecc() local
176 ecc = readl(mmio_base + MM_NAND_STS); in cs_calculate_ecc()
178 ecc_code[1] = ecc >> 8; in cs_calculate_ecc()
179 ecc_code[0] = ecc >> 16; in cs_calculate_ecc()
180 ecc_code[2] = ecc >> 24; in cs_calculate_ecc()
229 this->ecc.mode = NAND_ECC_HW; in cs553x_init_one()
230 this->ecc.size = 256; in cs553x_init_one()
231 this->ecc.bytes = 3; in cs553x_init_one()
232 this->ecc.hwctl = cs_enable_hwecc; in cs553x_init_one()
233 this->ecc.calculate = cs_calculate_ecc; in cs553x_init_one()
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Ds3c2410.c604 unsigned long ecc = readl(info->regs + S3C2412_NFMECC0); in s3c2412_nand_calculate_ecc() local
606 ecc_code[0] = ecc; in s3c2412_nand_calculate_ecc()
607 ecc_code[1] = ecc >> 8; in s3c2412_nand_calculate_ecc()
608 ecc_code[2] = ecc >> 16; in s3c2412_nand_calculate_ecc()
619 unsigned long ecc = readl(info->regs + S3C2440_NFMECC0); in s3c2440_nand_calculate_ecc() local
621 ecc_code[0] = ecc; in s3c2440_nand_calculate_ecc()
622 ecc_code[1] = ecc >> 8; in s3c2440_nand_calculate_ecc()
623 ecc_code[2] = ecc >> 16; in s3c2440_nand_calculate_ecc()
625 pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff); in s3c2440_nand_calculate_ecc()
839 chip->ecc.calculate = s3c2410_nand_calculate_ecc; in s3c2410_nand_init_chip()
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Dsharpsl.c165 this->ecc.mode = NAND_ECC_HW; in sharpsl_nand_probe()
166 this->ecc.size = 256; in sharpsl_nand_probe()
167 this->ecc.bytes = 3; in sharpsl_nand_probe()
168 this->ecc.strength = 1; in sharpsl_nand_probe()
170 this->ecc.layout = data->ecc_layout; in sharpsl_nand_probe()
171 this->ecc.hwctl = sharpsl_nand_enable_hwecc; in sharpsl_nand_probe()
172 this->ecc.calculate = sharpsl_nand_calculate_ecc; in sharpsl_nand_probe()
173 this->ecc.correct = nand_correct_data; in sharpsl_nand_probe()
Domap_elm.c172 struct elm_errorvec *err_vec, u8 *ecc) in elm_load_syndrome() argument
187 val = cpu_to_be32(*(u32 *) &ecc[9]); in elm_load_syndrome()
192 val = cpu_to_be32(*(u32 *) &ecc[5]); in elm_load_syndrome()
197 val = cpu_to_be32(*(u32 *) &ecc[1]); in elm_load_syndrome()
202 val = ecc[0]; in elm_load_syndrome()
207 val = (cpu_to_be32(*(u32 *) &ecc[3]) >> 4) | in elm_load_syndrome()
208 ((ecc[2] & 0xf) << 28); in elm_load_syndrome()
213 val = cpu_to_be32(*(u32 *) &ecc[0]) >> 12; in elm_load_syndrome()
217 val = cpu_to_be32(*(u32 *) &ecc[22]); in elm_load_syndrome()
220 val = cpu_to_be32(*(u32 *) &ecc[18]); in elm_load_syndrome()
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Dndfc.c104 uint32_t ecc; in ndfc_calculate_ecc() local
105 uint8_t *p = (uint8_t *)&ecc; in ndfc_calculate_ecc()
108 ecc = in_be32(ndfc->ndfcbase + NDFC_ECC); in ndfc_calculate_ecc()
164 chip->ecc.correct = nand_correct_data; in ndfc_chip_init()
165 chip->ecc.hwctl = ndfc_enable_hwecc; in ndfc_chip_init()
166 chip->ecc.calculate = ndfc_calculate_ecc; in ndfc_chip_init()
167 chip->ecc.mode = NAND_ECC_HW; in ndfc_chip_init()
168 chip->ecc.size = 256; in ndfc_chip_init()
169 chip->ecc.bytes = 3; in ndfc_chip_init()
170 chip->ecc.strength = 1; in ndfc_chip_init()
Dnand_bch.c56 struct nand_bch_control *nbc = chip->ecc.priv; in nand_bch_calculate_ecc()
59 memset(code, 0, chip->ecc.bytes); in nand_bch_calculate_ecc()
60 encode_bch(nbc->bch, buf, chip->ecc.size, code); in nand_bch_calculate_ecc()
63 for (i = 0; i < chip->ecc.bytes; i++) in nand_bch_calculate_ecc()
83 struct nand_bch_control *nbc = chip->ecc.priv; in nand_bch_correct_data()
87 count = decode_bch(nbc->bch, NULL, chip->ecc.size, read_ecc, calc_ecc, in nand_bch_correct_data()
91 if (errloc[i] < (chip->ecc.size*8)) in nand_bch_correct_data()
Dtxx9ndfmc.c185 for (eccbytes = chip->ecc.bytes; eccbytes > 0; eccbytes -= 3) { in txx9ndfmc_calculate_ecc()
203 for (eccsize = chip->ecc.size; eccsize > 0; eccsize -= 256) { in txx9ndfmc_correct_data()
267 chip->ecc.size = 512; in txx9ndfmc_nand_scan()
268 chip->ecc.bytes = 6; in txx9ndfmc_nand_scan()
335 chip->ecc.calculate = txx9ndfmc_calculate_ecc; in txx9ndfmc_probe()
336 chip->ecc.correct = txx9ndfmc_correct_data; in txx9ndfmc_probe()
337 chip->ecc.hwctl = txx9ndfmc_enable_hwecc; in txx9ndfmc_probe()
338 chip->ecc.mode = NAND_ECC_HW; in txx9ndfmc_probe()
340 chip->ecc.size = 256; in txx9ndfmc_probe()
341 chip->ecc.bytes = 3; in txx9ndfmc_probe()
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Dfsl_ifc_nand.c268 for (i = 0; i < chip->ecc.layout->eccbytes; i++) { in is_blank()
269 int pos = chip->ecc.layout->eccpos[i]; in is_blank()
335 int sector = bufnum * chip->ecc.steps; in fsl_ifc_run_command()
336 int sector_end = sector + chip->ecc.steps - 1; in fsl_ifc_run_command()
431 if (chip->ecc.mode == NAND_ECC_HW) in fsl_ifc_cmdfunc()
803 chip->ecc.mode); in fsl_ifc_chip_init_tail()
805 chip->ecc.steps); in fsl_ifc_chip_init_tail()
807 chip->ecc.bytes); in fsl_ifc_chip_init_tail()
809 chip->ecc.total); in fsl_ifc_chip_init_tail()
811 chip->ecc.layout); in fsl_ifc_chip_init_tail()
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Ddavinci_nand.c205 if ((diff >> (12 + 3)) < chip->ecc.size) { in nand_davinci_correct_1bit()
722 info->chip.ecc.calculate = nand_davinci_calculate_4bit; in nand_davinci_probe()
723 info->chip.ecc.correct = nand_davinci_correct_4bit; in nand_davinci_probe()
724 info->chip.ecc.hwctl = nand_davinci_hwctl_4bit; in nand_davinci_probe()
725 info->chip.ecc.bytes = 10; in nand_davinci_probe()
727 info->chip.ecc.calculate = nand_davinci_calculate_1bit; in nand_davinci_probe()
728 info->chip.ecc.correct = nand_davinci_correct_1bit; in nand_davinci_probe()
729 info->chip.ecc.hwctl = nand_davinci_hwctl_1bit; in nand_davinci_probe()
730 info->chip.ecc.bytes = 3; in nand_davinci_probe()
732 info->chip.ecc.size = 512; in nand_davinci_probe()
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Dfsl_elbc_nand.c240 if (chip->ecc.mode != NAND_ECC_HW) in fsl_elbc_run_command()
654 chip->ecc.mode); in fsl_elbc_chip_init_tail()
656 chip->ecc.steps); in fsl_elbc_chip_init_tail()
658 chip->ecc.bytes); in fsl_elbc_chip_init_tail()
660 chip->ecc.total); in fsl_elbc_chip_init_tail()
662 chip->ecc.layout); in fsl_elbc_chip_init_tail()
682 chip->ecc.size = 512; in fsl_elbc_chip_init_tail()
683 chip->ecc.layout = (priv->fmr & FMR_ECCM) ? in fsl_elbc_chip_init_tail()
775 chip->ecc.read_page = fsl_elbc_read_page; in fsl_elbc_chip_init()
776 chip->ecc.write_page = fsl_elbc_write_page; in fsl_elbc_chip_init()
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Djz4740_nand.c234 t &= dat[nand->chip.ecc.size / 2]; in jz_nand_correct_ecc_rs()
235 t &= dat[nand->chip.ecc.size - 1]; in jz_nand_correct_ecc_rs()
238 for (i = 1; i < nand->chip.ecc.size - 1; ++i) in jz_nand_correct_ecc_rs()
440 chip->ecc.hwctl = jz_nand_hwctl; in jz_nand_probe()
441 chip->ecc.calculate = jz_nand_calculate_ecc_rs; in jz_nand_probe()
442 chip->ecc.correct = jz_nand_correct_ecc_rs; in jz_nand_probe()
443 chip->ecc.mode = NAND_ECC_HW_OOB_FIRST; in jz_nand_probe()
444 chip->ecc.size = 512; in jz_nand_probe()
445 chip->ecc.bytes = 9; in jz_nand_probe()
446 chip->ecc.strength = 4; in jz_nand_probe()
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Dhisi504_nand.c200 if (chip->ecc.mode == NAND_ECC_NONE) { in hisi_nfc_dma_transfer()
496 if (chip->ecc.mode == NAND_ECC_HW) in hisi_nfc_cmdfunc()
558 switch (chip->ecc.strength) { in hisi_nand_read_page_hwecc()
661 chip->ecc.size = size; in hisi_nfc_ecc_probe()
662 chip->ecc.strength = strength; in hisi_nfc_ecc_probe()
664 chip->ecc.read_page = hisi_nand_read_page_hwecc; in hisi_nfc_ecc_probe()
665 chip->ecc.read_oob = hisi_nand_read_oob; in hisi_nfc_ecc_probe()
666 chip->ecc.write_page = hisi_nand_write_page_hwecc; in hisi_nfc_ecc_probe()
668 switch (chip->ecc.strength) { in hisi_nfc_ecc_probe()
672 chip->ecc.layout = &nand_ecc_2K_16bits; in hisi_nfc_ecc_probe()
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Ddenali.c1534 denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME; in denali_init()
1549 denali->nand.ecc.strength = 15; in denali_init()
1550 denali->nand.ecc.layout = &nand_15bit_oob; in denali_init()
1551 denali->nand.ecc.bytes = ECC_15BITS; in denali_init()
1559 denali->nand.ecc.strength = 8; in denali_init()
1560 denali->nand.ecc.layout = &nand_8bit_oob; in denali_init()
1561 denali->nand.ecc.bytes = ECC_8BITS; in denali_init()
1565 denali->nand.ecc.bytes *= denali->devnum; in denali_init()
1566 denali->nand.ecc.strength *= denali->devnum; in denali_init()
1567 denali->nand.ecc.layout->eccbytes *= in denali_init()
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Dcafe_nand.c740 cafe->nand.ecc.layout = &cafe_oobinfo_2048; in cafe_nand_probe()
744 cafe->nand.ecc.layout = &cafe_oobinfo_512; in cafe_nand_probe()
752 cafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME; in cafe_nand_probe()
753 cafe->nand.ecc.size = mtd->writesize; in cafe_nand_probe()
754 cafe->nand.ecc.bytes = 14; in cafe_nand_probe()
755 cafe->nand.ecc.strength = 4; in cafe_nand_probe()
756 cafe->nand.ecc.hwctl = (void *)cafe_nand_bug; in cafe_nand_probe()
757 cafe->nand.ecc.calculate = (void *)cafe_nand_bug; in cafe_nand_probe()
758 cafe->nand.ecc.correct = (void *)cafe_nand_bug; in cafe_nand_probe()
759 cafe->nand.ecc.write_page = cafe_nand_write_page_lowlevel; in cafe_nand_probe()
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Dpxa3xx_nand.c1393 struct nand_ecc_ctrl *ecc, in pxa_ecc_init() argument
1400 ecc->mode = NAND_ECC_HW; in pxa_ecc_init()
1401 ecc->size = 512; in pxa_ecc_init()
1402 ecc->strength = 1; in pxa_ecc_init()
1408 ecc->mode = NAND_ECC_HW; in pxa_ecc_init()
1409 ecc->size = 512; in pxa_ecc_init()
1410 ecc->strength = 1; in pxa_ecc_init()
1421 ecc->mode = NAND_ECC_HW; in pxa_ecc_init()
1422 ecc->size = info->chunk_size; in pxa_ecc_init()
1423 ecc->layout = &ecc_layout_2KB_bch4bit; in pxa_ecc_init()
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Dlpc32xx_mlc.c709 nand_chip->ecc.hwctl = lpc32xx_ecc_enable; in lpc32xx_nand_probe()
710 nand_chip->ecc.read_page_raw = lpc32xx_read_page; in lpc32xx_nand_probe()
711 nand_chip->ecc.read_page = lpc32xx_read_page; in lpc32xx_nand_probe()
712 nand_chip->ecc.write_page_raw = lpc32xx_write_page_lowlevel; in lpc32xx_nand_probe()
713 nand_chip->ecc.write_page = lpc32xx_write_page_lowlevel; in lpc32xx_nand_probe()
714 nand_chip->ecc.write_oob = lpc32xx_write_oob; in lpc32xx_nand_probe()
715 nand_chip->ecc.read_oob = lpc32xx_read_oob; in lpc32xx_nand_probe()
716 nand_chip->ecc.strength = 4; in lpc32xx_nand_probe()
753 nand_chip->ecc.mode = NAND_ECC_HW; in lpc32xx_nand_probe()
754 nand_chip->ecc.size = mtd->writesize; in lpc32xx_nand_probe()
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Dplat_nand.c79 data->chip.ecc.hwctl = pdata->ctrl.hwcontrol; in plat_nand_probe()
80 data->chip.ecc.layout = pdata->chip.ecclayout; in plat_nand_probe()
81 data->chip.ecc.mode = NAND_ECC_SOFT; in plat_nand_probe()
Ddocg4.c845 docg4_command(mtd, NAND_CMD_READ0, nand->ecc.size, page); in docg4_read_oob()
1221 nand->ecc.layout = &docg4_oobinfo; in init_mtd_structs()
1222 nand->ecc.mode = NAND_ECC_HW_SYNDROME; in init_mtd_structs()
1223 nand->ecc.size = DOCG4_PAGE_SIZE; in init_mtd_structs()
1224 nand->ecc.prepad = 8; in init_mtd_structs()
1225 nand->ecc.bytes = 8; in init_mtd_structs()
1226 nand->ecc.strength = DOCG4_T; in init_mtd_structs()
1242 nand->ecc.read_page = docg4_read_page; in init_mtd_structs()
1243 nand->ecc.write_page = docg4_write_page; in init_mtd_structs()
1244 nand->ecc.read_page_raw = docg4_read_page_raw; in init_mtd_structs()
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Dmxc_nand.c920 if (nand_chip->ecc.mode == NAND_ECC_HW && mtd->writesize) in preset_v1()
956 if (nand_chip->ecc.mode == NAND_ECC_HW) in preset_v2()
1030 if (chip->ecc.mode == NAND_ECC_HW) in preset_v3()
1510 this->ecc.bytes = host->devtype_data->eccbytes; in mxcnd_probe()
1514 this->ecc.size = 512; in mxcnd_probe()
1515 this->ecc.layout = host->devtype_data->ecclayout_512; in mxcnd_probe()
1518 this->ecc.calculate = mxc_nand_calculate_ecc; in mxcnd_probe()
1519 this->ecc.hwctl = mxc_nand_enable_hwecc; in mxcnd_probe()
1520 this->ecc.correct = host->devtype_data->correct_data; in mxcnd_probe()
1521 this->ecc.mode = NAND_ECC_HW; in mxcnd_probe()
[all …]
Ddiskonchip.c141 static int doc_ecc_decode(struct rs_control *rs, uint8_t *data, uint8_t *ecc) in doc_ecc_decode() argument
149 ds[0] = ((ecc[4] & 0xff) >> 0) | ((ecc[5] & 0x03) << 8); in doc_ecc_decode()
150 ds[1] = ((ecc[5] & 0xfc) >> 2) | ((ecc[2] & 0x0f) << 6); in doc_ecc_decode()
151 ds[2] = ((ecc[2] & 0xf0) >> 4) | ((ecc[3] & 0x3f) << 4); in doc_ecc_decode()
152 ds[3] = ((ecc[3] & 0xc0) >> 6) | ((ecc[0] & 0xff) << 2); in doc_ecc_decode()
153 parity = ecc[1]; in doc_ecc_decode()
1422 this->ecc.hwctl = doc2001plus_enable_hwecc; in doc2001plus_init()
1584 nand->ecc.hwctl = doc200x_enable_hwecc; in doc_probe()
1585 nand->ecc.calculate = doc200x_calculate_ecc; in doc_probe()
1586 nand->ecc.correct = doc200x_correct_data; in doc_probe()
[all …]
Dsm_common.c124 chip->ecc.layout = &nand_oob_sm; in sm_register_device()
126 chip->ecc.layout = &nand_oob_sm_small; in sm_register_device()
Dr852.c868 chip->ecc.mode = NAND_ECC_HW_SYNDROME; in r852_probe()
869 chip->ecc.size = R852_DMA_LEN; in r852_probe()
870 chip->ecc.bytes = SM_OOB_SIZE; in r852_probe()
871 chip->ecc.strength = 2; in r852_probe()
872 chip->ecc.hwctl = r852_ecc_hwctl; in r852_probe()
873 chip->ecc.calculate = r852_ecc_calculate; in r852_probe()
874 chip->ecc.correct = r852_ecc_correct; in r852_probe()
877 chip->ecc.read_oob = r852_read_oob; in r852_probe()
Dsh_flctl.c989 chip->ecc.layout = &flctl_4secc_oob_16; in flctl_chip_init_tail()
992 chip->ecc.layout = &flctl_4secc_oob_64; in flctl_chip_init_tail()
996 chip->ecc.size = 512; in flctl_chip_init_tail()
997 chip->ecc.bytes = 10; in flctl_chip_init_tail()
998 chip->ecc.strength = 4; in flctl_chip_init_tail()
999 chip->ecc.read_page = flctl_read_page_hwecc; in flctl_chip_init_tail()
1000 chip->ecc.write_page = flctl_write_page_hwecc; in flctl_chip_init_tail()
1001 chip->ecc.mode = NAND_ECC_HW; in flctl_chip_init_tail()
1006 chip->ecc.mode = NAND_ECC_SOFT; in flctl_chip_init_tail()
Dnand_ecc.c427 ((struct nand_chip *)mtd->priv)->ecc.size, code); in nand_calculate_ecc()
527 ((struct nand_chip *)mtd->priv)->ecc.size); in nand_correct_data()
Dcmx270_nand.c193 this->ecc.mode = NAND_ECC_SOFT; in cmx270_init()
Dpasemi_nand.c156 chip->ecc.mode = NAND_ECC_SOFT; in pasemi_nand_probe()
Dsocrates_nand.c185 nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */ in socrates_nand_probe()
Dorion_nand.c133 nc->ecc.mode = NAND_ECC_SOFT; in orion_nand_probe()
Dams-delta.c232 this->ecc.mode = NAND_ECC_SOFT; in ams_delta_init()
Dnuc900_nand.c268 chip->ecc.mode = NAND_ECC_SOFT; in nuc900_nand_probe()
Dnandsim.c2260 chip->ecc.mode = NAND_ECC_SOFT; in ns_init_module()
2338 chip->ecc.mode = NAND_ECC_SOFT_BCH; in ns_init_module()
2339 chip->ecc.size = 512; in ns_init_module()
2340 chip->ecc.strength = bch; in ns_init_module()
2341 chip->ecc.bytes = eccbytes; in ns_init_module()
2342 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size); in ns_init_module()
Dgpio.c272 chip->ecc.mode = NAND_ECC_SOFT; in gpio_nand_probe()
Dfsl_upm.c171 fun->chip.ecc.mode = NAND_ECC_SOFT; in fun_chip_init()
Dau1550nd.c459 this->ecc.mode = NAND_ECC_SOFT; in au1550nd_probe()
Dmpc5121_nfc.c714 chip->ecc.mode = NAND_ECC_SOFT; in mpc5121_nfc_probe()
/linux-4.1.27/Documentation/devicetree/bindings/mtd/
Dhisi504-nand.txt11 - nand-ecc-mode: Support none and hw ecc mode.
17 - nand-ecc-strength: Number of bits to correct per ECC step.
18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
22 - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>
34 nand-ecc-mode = "hw";
35 nand-ecc-strength = <16>;
36 nand-ecc-step-size = <1024>;
Dpxa3xx-nand.txt20 - nand-ecc-strength: number of bits to correct per ECC step
21 - nand-ecc-step-size: number of data bytes covered by a single ECC step
25 - nand-ecc-strength = <1>, nand-ecc-step-size = <512>
26 - nand-ecc-strength = <4>, nand-ecc-step-size = <512>
27 - nand-ecc-strength = <8>, nand-ecc-step-size = <512>
Dgpmc-nand.txt24 - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
25 "sw" 1-bit Hamming ecc code via software
28 "ham1" 1-bit Hamming ecc code
29 "bch4" 4-bit BCH ecc code
30 "bch8" 8-bit BCH ecc code
70 ti,nand-ecc-opt = "bch8";
103 support ecc-schemes with hardware error-correction (BCHx_HW). However
104 such SoC can use ecc-schemes with software library for error-correction
110 Other factor which governs the selection of ecc-scheme is oob-size.
121 '3' for HAM1_xx ecc schemes
[all …]
Ddavinci-nand.txt42 - nand-ecc-mode: operation mode of the NAND ecc mode. ECC mode
48 - ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
58 - ti,davinci-ecc-mode: operation mode of the NAND ecc mode. ECC mode
86 nand-ecc-mode = "hw";
87 ti,davinci-ecc-bits = <4>;
Dnand.txt3 - nand-ecc-mode : String, operation mode of the NAND ecc mode.
9 - nand-ecc-strength: integer representing the number of bits to correct
12 - nand-ecc-step-size: integer representing the number of data bytes
Dmxc-nand.txt8 - nand-ecc-mode: see nand.txt
18 nand-ecc-mode = "hw";
Datmel-nand.txt21 - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
56 nand-ecc-mode = "soft";
79 nand-ecc-mode = "hw";
Dsunxi-nand.txt21 - nand-ecc-mode : one of the supported ECC modes ("hw", "hw_syndrome", "soft",
43 nand-ecc-mode = "soft_bch";
Dgpmi-nand.txt20 - fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC
/linux-4.1.27/fs/ocfs2/
Dblockcheck.c395 u32 ecc; in ocfs2_block_check_compute() local
400 ecc = ocfs2_hamming_encode_block(data, blocksize); in ocfs2_block_check_compute()
406 BUG_ON(ecc > USHRT_MAX); in ocfs2_block_check_compute()
409 bc->bc_ecc = cpu_to_le16((u16)ecc); in ocfs2_block_check_compute()
427 u32 crc, ecc; in ocfs2_block_check_validate() local
447 ecc = ocfs2_hamming_encode_block(data, blocksize); in ocfs2_block_check_validate()
448 ocfs2_hamming_fix_block(data, blocksize, ecc ^ bc_ecc); in ocfs2_block_check_validate()
487 u32 crc, ecc; in ocfs2_block_check_compute_bhs() local
496 for (i = 0, crc = ~0, ecc = 0; i < nr; i++) { in ocfs2_block_check_compute_bhs()
503 ecc = (u16)ocfs2_hamming_encode(ecc, bhs[i]->b_data, in ocfs2_block_check_compute_bhs()
[all …]
/linux-4.1.27/drivers/crypto/ccp/
Dccp-ops.c131 struct ccp_ecc_op ecc; member
416 | (op->u.ecc.function << REQ1_ECC_FUNCTION_SHIFT) in ccp_perform_ecc()
1804 struct ccp_ecc_engine *ecc = &cmd->u.ecc; in ccp_run_ecc_mm_cmd() local
1810 if (!ecc->u.mm.operand_1 || in ccp_run_ecc_mm_cmd()
1811 (ecc->u.mm.operand_1_len > CCP_ECC_MODULUS_BYTES)) in ccp_run_ecc_mm_cmd()
1814 if (ecc->function != CCP_ECC_FUNCTION_MINV_384BIT) in ccp_run_ecc_mm_cmd()
1815 if (!ecc->u.mm.operand_2 || in ccp_run_ecc_mm_cmd()
1816 (ecc->u.mm.operand_2_len > CCP_ECC_MODULUS_BYTES)) in ccp_run_ecc_mm_cmd()
1819 if (!ecc->u.mm.result || in ccp_run_ecc_mm_cmd()
1820 (ecc->u.mm.result_len < CCP_ECC_MODULUS_BYTES)) in ccp_run_ecc_mm_cmd()
[all …]
/linux-4.1.27/drivers/dma/
Dedma.c112 struct edma_cc *ecc; member
220 echan->ecc->dummy_slot); in edma_execute()
957 static void __init edma_chan_init(struct edma_cc *ecc, in edma_chan_init() argument
965 echan->ch_num = EDMA_CTLR_CHAN(ecc->ctlr, i); in edma_chan_init()
966 echan->ecc = ecc; in edma_chan_init()
982 static void edma_dma_init(struct edma_cc *ecc, struct dma_device *dma, in edma_dma_init() argument
1015 struct edma_cc *ecc; in edma_probe() local
1022 ecc = devm_kzalloc(&pdev->dev, sizeof(*ecc), GFP_KERNEL); in edma_probe()
1023 if (!ecc) { in edma_probe()
1028 ecc->ctlr = pdev->id; in edma_probe()
[all …]
/linux-4.1.27/drivers/staging/mt29f_spinand/
Dmt29f_spinand.c618 int eccsize = chip->ecc.size; in spinand_write_page_hwecc()
619 int eccsteps = chip->ecc.steps; in spinand_write_page_hwecc()
632 int eccsize = chip->ecc.size; in spinand_read_page_hwecc()
633 int eccsteps = chip->ecc.steps; in spinand_read_page_hwecc()
883 chip->ecc.mode = NAND_ECC_HW; in spinand_probe()
884 chip->ecc.size = 0x200; in spinand_probe()
885 chip->ecc.bytes = 0x6; in spinand_probe()
886 chip->ecc.steps = 0x4; in spinand_probe()
888 chip->ecc.strength = 1; in spinand_probe()
889 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; in spinand_probe()
[all …]
/linux-4.1.27/drivers/usb/storage/
Dalauda.c252 static void nand_compute_ecc(unsigned char *data, unsigned char *ecc) in nand_compute_ecc() argument
268 ecc[0] = ~(a ^ (a<<1) ^ (parity[par] ? 0xaa : 0)); in nand_compute_ecc()
271 ecc[1] = ~(a ^ (a<<1) ^ (parity[par] ? 0xaa : 0)); in nand_compute_ecc()
273 ecc[2] = ecc2[par]; in nand_compute_ecc()
276 static int nand_compare_ecc(unsigned char *data, unsigned char *ecc) in nand_compare_ecc() argument
278 return (data[0] == ecc[0] && data[1] == ecc[1] && data[2] == ecc[2]); in nand_compare_ecc()
281 static void nand_store_ecc(unsigned char *data, unsigned char *ecc) in nand_store_ecc() argument
283 memcpy(data, ecc, 3); in nand_store_ecc()
815 unsigned char ecc[3]; in alauda_write_lba() local
861 nand_compute_ecc(bptr, ecc); in alauda_write_lba()
[all …]
Dsddr09.c220 static void nand_compute_ecc(unsigned char *data, unsigned char *ecc) { in nand_compute_ecc() argument
235 ecc[0] = ~(a ^ (a<<1) ^ (parity[par] ? 0xaa : 0)); in nand_compute_ecc()
238 ecc[1] = ~(a ^ (a<<1) ^ (parity[par] ? 0xaa : 0)); in nand_compute_ecc()
240 ecc[2] = ecc2[par]; in nand_compute_ecc()
243 static int nand_compare_ecc(unsigned char *data, unsigned char *ecc) { in nand_compare_ecc() argument
244 return (data[0] == ecc[0] && data[1] == ecc[1] && data[2] == ecc[2]); in nand_compare_ecc()
247 static void nand_store_ecc(unsigned char *data, unsigned char *ecc) { in nand_store_ecc() argument
248 memcpy(data, ecc, 3); in nand_store_ecc()
868 unsigned char ecc[3]; in sddr09_write_lba() local
909 nand_compute_ecc(bptr, ecc); in sddr09_write_lba()
[all …]
/linux-4.1.27/drivers/scsi/csiostor/
Dcsio_hw_t5.c174 uint64_t *ecc) in csio_t5_mc_read() argument
202 if (ecc) in csio_t5_mc_read()
203 *ecc = csio_rd_reg64(hw, MC_DATA(16)); in csio_t5_mc_read()
222 uint64_t *ecc) in csio_t5_edc_read() argument
258 if (ecc) in csio_t5_edc_read()
259 *ecc = csio_rd_reg64(hw, EDC_DATA(16)); in csio_t5_edc_read()
/linux-4.1.27/Documentation/devicetree/bindings/arm/calxeda/
Dl2ecc.txt4 - compatible : Should be "calxeda,hb-sregs-l2-ecc"
12 compatible = "calxeda,hb-sregs-l2-ecc";
/linux-4.1.27/arch/mips/mm/
Dcerr-sb1.c494 uint8_t ecc, lru; in extract_dc() local
564 ecc = dc_ecc(datalo); in extract_dc()
565 if (ecc != datahi) { in extract_dc()
568 ecc ^= datahi; in extract_dc()
569 bits = hweight8(ecc); in extract_dc()
/linux-4.1.27/drivers/mtd/nand/gpmi-nand/
Dgpmi-nand.c1081 int size = chip->ecc.size; /* ECC chunk size */ in gpmi_ecc_read_subpage()
1720 chip->ecc.write_page_raw(mtd, chip, buffer, 0); in mx23_write_transcription_stamp()
1842 struct nand_ecc_ctrl *ecc = &chip->ecc; in gpmi_init_last() local
1852 ecc->read_page = gpmi_ecc_read_page; in gpmi_init_last()
1853 ecc->write_page = gpmi_ecc_write_page; in gpmi_init_last()
1854 ecc->read_oob = gpmi_ecc_read_oob; in gpmi_init_last()
1855 ecc->write_oob = gpmi_ecc_write_oob; in gpmi_init_last()
1856 ecc->read_page_raw = gpmi_ecc_read_page_raw; in gpmi_init_last()
1857 ecc->write_page_raw = gpmi_ecc_write_page_raw; in gpmi_init_last()
1858 ecc->read_oob_raw = gpmi_ecc_read_oob_raw; in gpmi_init_last()
[all …]
/linux-4.1.27/lib/
Dbch.c116 uint32_t *ecc) in encode_bch_unaligned() argument
123 p = bch->mod8_tab + (l+1)*(((ecc[0] >> 24)^(*data++)) & 0xff); in encode_bch_unaligned()
126 ecc[i] = ((ecc[i] << 8)|(ecc[i+1] >> 24))^(*p++); in encode_bch_unaligned()
128 ecc[l] = (ecc[l] << 8)^(*p); in encode_bch_unaligned()
185 unsigned int len, uint8_t *ecc) in encode_bch() argument
197 if (ecc) { in encode_bch()
199 load_ecc8(bch, bch->ecc_buf, ecc); in encode_bch()
251 if (ecc) in encode_bch()
252 store_ecc8(bch, ecc, bch->ecc_buf); in encode_bch()
337 static void compute_syndromes(struct bch_control *bch, uint32_t *ecc, in compute_syndromes() argument
[all …]
/linux-4.1.27/arch/mips/dec/
DMakefile5 obj-y := ecc-berr.o int-handler.o ioasic-irq.o kn01-berr.o \
/linux-4.1.27/arch/arm/boot/dts/
Dk2l-evm.dts74 nand-ecc-mode = "hw";
75 ti,davinci-ecc-bits = <4>;
Dk2e-evm.dts97 nand-ecc-mode = "hw";
98 ti,davinci-ecc-bits = <4>;
Dk2hk-evm.dts118 nand-ecc-mode = "hw";
119 ti,davinci-ecc-bits = <4>;
Dge863-pro3.dtsi37 nand-ecc-mode = "soft";
Darmada-398-db.dts119 nand-ecc-strength = <8>;
120 nand-ecc-step-size = <512>;
Dethernut5.dts60 nand-ecc-mode = "soft";
Dtny_a9260_common.dtsi46 nand-ecc-mode = "soft";
Dimx35-pdk.dts58 nand-ecc-mode = "hw";
Dtny_a9263.dts56 nand-ecc-mode = "soft";
Darmada-388-db.dts136 nand-ecc-strength = <4>;
137 nand-ecc-step-size = <512>;
Dat91sam9x5cm.dtsi53 nand-ecc-mode = "hw";
Dusb_a9260_common.dtsi48 nand-ecc-mode = "soft";
Dimx25-eukrea-cpuimx25.dtsi70 nand-ecc-mode = "hw";
Darmada-375-db.dts128 nand-ecc-strength = <4>;
129 nand-ecc-step-size = <512>;
Darmada-385-db-ap.dts166 nand-ecc-strength = <4>;
167 nand-ecc-step-size = <512>;
Dimx51-apf51.dts80 nand-ecc-mode = "hw";
Dimx27-phytec-phycard-s-som.dtsi100 nand-ecc-mode = "hw";
Daks-cdu.dts67 nand-ecc-mode = "soft";
Dimx27-apf27.dts87 nand-ecc-mode = "hw";
Dat91-cosino.dtsi96 nand-ecc-mode = "hw";
Dimx25-karo-tx25.dts110 nand-ecc-mode = "hw";
Dimx35-eukrea-cpuimx35.dtsi93 nand-ecc-mode = "hw";
Dsama5d3xcm.dtsi80 nand-ecc-mode = "hw";
Dusb_a9263.dts76 nand-ecc-mode = "soft";
Dkizbox.dts70 nand-ecc-mode = "soft";
Dda850.dtsi301 ti,davinci-ecc-mode = "hw";
302 ti,davinci-ecc-bits = <4>;
Dimx51-eukrea-cpuimx51.dtsi101 nand-ecc-mode = "hw";
Dpm9g45.dts88 nand-ecc-mode = "soft";
Danimeo_ip.dts97 nand-ecc-mode = "soft";
Dimx53-m53.dtsi138 nand-ecc-mode = "hw";
Dat91-qil_a9260.dts121 nand-ecc-mode = "soft";
Darmada-370-netgear-rn104.dts157 nand-ecc-strength = <4>;
158 nand-ecc-step-size = <512>;
Darmada-370-netgear-rn102.dts144 nand-ecc-strength = <4>;
145 nand-ecc-step-size = <512>;
Domap3-devkit8000.dts114 ti,nand-ecc-opt = "sw";
Dhighbank.dts134 compatible = "calxeda,hb-sregs-l2-ecc";
Darmada-xp-linksys-mamba.dts214 nand-ecc-strength = <4>;
215 nand-ecc-step-size = <512>;
Dat91sam9rlek.dts76 nand-ecc-mode = "soft";
Dat91sam9g20ek_common.dtsi136 nand-ecc-mode = "soft";
Dimx27-pdk.dts103 nand-ecc-mode = "hw";
Dat91sam9263ek.dts138 nand-ecc-mode = "soft";
Dat91sam9n12ek.dts148 nand-ecc-mode = "hw";
Darmada-xp-netgear-rn2120.dts185 nand-ecc-strength = <4>;
186 nand-ecc-step-size = <512>;
Dat91sam9261ek.dts81 nand-ecc-mode = "soft";
Ddm8168-evm.dts92 ti,nand-ecc-opt = "bch8";
Dat91-sama5d3_xplained.dts228 nand-ecc-mode = "hw";
Domap3-igep.dtsi108 ti,nand-ecc-opt = "bch8";
Domap3430-sdp.dts110 ti,nand-ecc-opt = "sw";
Dimx53-voipac-dmm-668.dtsi263 nand-ecc-mode = "hw";
Dimx27-eukrea-cpuimx27.dtsi58 nand-ecc-mode = "hw";
Dat91sam9m10g45ek.dts209 nand-ecc-mode = "soft";
Dam335x-chilisom.dtsi212 ti,nand-ecc-opt = "bch8";
Dat91-sama5d4_xplained.dts174 nand-ecc-mode = "hw";
Domap3-evm-37xx.dts165 ti,nand-ecc-opt = "bch8";
Dimx27-phytec-phycore-som.dtsi305 nand-ecc-mode = "hw";
Dam335x-igep0033.dtsi134 ti,nand-ecc-opt = "bch8";
Dimx51-digi-connectcore-som.dtsi196 nand-ecc-mode = "hw";
Domap3-ldp.dts108 ti,nand-ecc-opt = "bch8";
Domap3-cm-t3x.dtsi270 ti,nand-ecc-opt = "sw";
Dat91-sama5d4ek.dts234 nand-ecc-mode = "hw";
Domap3-tao3530.dtsi284 ti,nand-ecc-opt = "sw";
Domap3-beagle.dts389 ti,nand-ecc-opt = "ham1";
Dimx23.dtsi72 ecc@80008000 {
Dimx53-tx53.dtsi489 nand-ecc-mode = "hw";
Domap3-gta04.dtsi469 ti,nand-ecc-opt = "bch8";
Domap3-lilly-a83x.dtsi367 ti,nand-ecc-opt = "bch8";
Ddra72-evm.dts299 ti,nand-ecc-opt = "bch8";
Domap3-pandora-common.dtsi505 ti,nand-ecc-opt = "sw";
Ddra7-evm.dts575 ti,nand-ecc-opt = "bch8";
Dam335x-evm.dts450 ti,nand-ecc-opt = "bch8";
Dam437x-gp-evm.dts520 ti,nand-ecc-opt = "bch16";
Dam43x-epos-evm.dts479 ti,nand-ecc-opt = "bch16";
Dat91rm9200.dtsi931 nand-ecc-mode = "soft";
/linux-4.1.27/drivers/net/can/sja1000/
Dsja1000.c400 uint8_t ecc, alc; in sja1000_err() local
438 ecc = priv->read_reg(priv, SJA1000_ECC); in sja1000_err()
442 switch (ecc & ECC_MASK) { in sja1000_err()
454 cf->data[3] = ecc & ECC_SEG; in sja1000_err()
458 if ((ecc & ECC_DIR) == 0) in sja1000_err()
/linux-4.1.27/include/linux/
Dbch.h73 unsigned int len, uint8_t *ecc);
Dccp.h548 struct ccp_ecc_engine ecc; member
/linux-4.1.27/drivers/mtd/onenand/
Domap2.c237 int ecc = read_reg(c, ONENAND_REG_ECC_STATUS); in omap2_onenand_wait() local
239 if (ecc) { in omap2_onenand_wait()
244 if (ecc & ONENAND_ECC_2BIT_ALL) { in omap2_onenand_wait()
247 ecc, addr1, addr8); in omap2_onenand_wait()
250 } else if (ecc & ONENAND_ECC_1BIT_ALL) { in omap2_onenand_wait()
253 "addr8 %#x\n", ecc, addr1, addr8); in omap2_onenand_wait()
Dsamsung.c322 unsigned int stat, ecc; in s3c_onenand_wait() local
362 ecc = s3c_read_reg(ECC_ERR_STAT_OFFSET); in s3c_onenand_wait()
363 if (ecc & ONENAND_ECC_4BIT_UNCORRECTABLE) { in s3c_onenand_wait()
365 ecc); in s3c_onenand_wait()
724 int ecc = s3c_read_reg(ECC_ERR_STAT_OFFSET); in s3c_onenand_bbt_wait() local
725 if (ecc & ONENAND_ECC_4BIT_UNCORRECTABLE) { in s3c_onenand_bbt_wait()
Donenand_base.c498 int ecc, i, result = 0; in onenand_read_ecc() local
504 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2); in onenand_read_ecc()
505 if (likely(!ecc)) in onenand_read_ecc()
507 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR) in onenand_read_ecc()
555 int ecc = onenand_read_ecc(this); in onenand_wait() local
556 if (ecc) { in onenand_wait()
557 if (ecc & ONENAND_ECC_2BIT_ALL) { in onenand_wait()
559 __func__, ecc); in onenand_wait()
562 } else if (ecc & ONENAND_ECC_1BIT_ALL) { in onenand_wait()
564 __func__, ecc); in onenand_wait()
[all …]
/linux-4.1.27/drivers/edac/
Dmce_amd.c754 int ecc; in amd_decode_mce() local
777 ecc = (m->status >> 45) & 0x3; in amd_decode_mce()
778 if (ecc) in amd_decode_mce()
779 pr_cont("|%sECC", ((ecc == 2) ? "C" : "U")); in amd_decode_mce()
Dmpc85xx_edac.c736 u8 ecc = 0; in calculate_ecc() local
752 ecc |= bit_cnt << i; in calculate_ecc()
755 return ecc; in calculate_ecc()
DKconfig128 - inject_ecc_vector (hex ecc vector: select bits of inject word)
/linux-4.1.27/net/bluetooth/
DMakefile16 a2mp.o amp.o ecc.o hci_request.o mgmt_util.o
/linux-4.1.27/drivers/net/can/usb/
Dems_usb.c173 u8 ecc; member
368 u8 ecc = msg->msg.error.cc.regs.sja1000.ecc; in ems_usb_rx_err() local
378 switch (ecc & SJA1000_ECC_MASK) { in ems_usb_rx_err()
390 cf->data[3] = ecc & SJA1000_ECC_SEG; in ems_usb_rx_err()
395 if ((ecc & SJA1000_ECC_DIR) == 0) in ems_usb_rx_err()
Desd_usb2.c236 u8 ecc = msg->msg.rx.data[1]; in esd_usb2_rx_event() local
274 switch (ecc & SJA1000_ECC_MASK) { in esd_usb2_rx_event()
286 cf->data[3] = ecc & SJA1000_ECC_SEG; in esd_usb2_rx_event()
291 if (!(ecc & SJA1000_ECC_DIR)) in esd_usb2_rx_event()
/linux-4.1.27/fs/pstore/
Dram_core.c131 uint8_t *data, size_t len, uint8_t *ecc) in persistent_ram_encode_rs8() argument
140 ecc[i] = par[i]; in persistent_ram_encode_rs8()
144 void *data, size_t len, uint8_t *ecc) in persistent_ram_decode_rs8() argument
150 par[i] = ecc[i]; in persistent_ram_decode_rs8()
Dram.c79 module_param_named(ecc, ramoops_ecc, int, 0600);
/linux-4.1.27/include/linux/mtd/
Dnand.h710 struct nand_ecc_ctrl ecc; member
769 #define NAND_ECC_STRENGTH(type) ((type)->ecc.strength_ds)
770 #define NAND_ECC_STEP(type) ((type)->ecc.step_ds)
819 } ecc; member
/linux-4.1.27/arch/mips/jz4740/
Dboard-qi_lb60.c131 chip->ecc.layout = &qi_lb60_ecclayout_2gb; in qi_lb60_nand_ident()
135 chip->ecc.layout = &qi_lb60_ecclayout_1gb; in qi_lb60_nand_ident()
/linux-4.1.27/drivers/mtd/
Dsm_ftl.c221 uint8_t ecc[3]; in sm_correct_sector() local
223 __nand_calculate_ecc(buffer, SM_SMALL_PAGE, ecc); in sm_correct_sector()
224 if (__nand_correct_data(buffer, ecc, oob->ecc1, SM_SMALL_PAGE) < 0) in sm_correct_sector()
229 __nand_calculate_ecc(buffer, SM_SMALL_PAGE, ecc); in sm_correct_sector()
230 if (__nand_correct_data(buffer, ecc, oob->ecc2, SM_SMALL_PAGE) < 0) in sm_correct_sector()
/linux-4.1.27/arch/cris/arch-v32/drivers/mach-fs/
Dnandflash.c154 this->ecc.mode = NAND_ECC_SOFT; in crisv32_nand_flash_probe()
/linux-4.1.27/arch/cris/arch-v32/drivers/mach-a3/
Dnandflash.c163 this->ecc.mode = NAND_ECC_SOFT; in crisv32_nand_flash_probe()
/linux-4.1.27/drivers/scsi/
Dosst.h256 unsigned ecc :1; /* Supports error correction */ member
268 unsigned ecc :1; /* Supports error correction */ member
/linux-4.1.27/Documentation/
Dramoops.txt56 "mem=128M ramoops.mem_address=0x8000000 ramoops.ecc=1"
69 .ecc = <...>,
Dedac.txt707 bit 1 - ecc
/linux-4.1.27/drivers/net/can/
Djanz-ican3.c933 u8 isrc, ecc, status, rxerr, txerr; in ican3_handle_cevtind() local
950 ecc = msg->data[2]; in ican3_handle_cevtind()
970 if (!(ecc & ECC_DIR)) { in ican3_handle_cevtind()
1028 switch (ecc & ECC_MASK) { in ican3_handle_cevtind()
1040 cf->data[3] = ecc & ECC_SEG; in ican3_handle_cevtind()
1044 if (!(ecc & ECC_DIR)) in ican3_handle_cevtind()
/linux-4.1.27/include/linux/mmc/
Dmmc.h219 u8 ecc; member
/linux-4.1.27/Documentation/mtd/
Dnand_ecc.txt27 As I said before the ecc calculation is performed on sectors of 256
37 Back to ecc.
644 further there is still room to optimize the generation of the ecc codes.
687 the calculated ecc. If all bytes are 0 there is no problem. If 11 bits
689 error in the given ecc code.
700 The gain when calculating the ecc is tremendous. Om my development hardware
701 a speedup of a factor of 18 for ecc calculation was achieved. On a test on an
/linux-4.1.27/Documentation/ABI/testing/
Dsysfs-class-mtd144 region comprising an ecc step (as reported by the driver) equals
159 more regions comprising an ecc step". The precise definition of
/linux-4.1.27/arch/powerpc/sysdev/
Daxonram.c82 static DEVICE_ATTR(ecc, S_IRUGO, axon_ram_sysfs_ecc, NULL);
/linux-4.1.27/arch/ia64/include/asm/sn/
Dsn_sal.h1166 sn_inject_error(u64 paddr, u64 *data, u64 *ecc) in sn_inject_error() argument
1171 (u64)ecc, 0, 0, 0, 0); in sn_inject_error()
/linux-4.1.27/drivers/mtd/nand/bcm47xxnflash/
Dops_bcm4706.c398 b47n->nand_chip.ecc.mode = NAND_ECC_NONE; /* TODO: implement ECC */ in bcm47xxnflash_ops_bcm4706_init()
/linux-4.1.27/drivers/mtd/devices/
Ddocg3.c637 u8 ecc[DOC_ECC_BCH_SIZE]; in doc_ecc_bch_fix_data() local
641 ecc[i] = bitrev8(hwecc[i]); in doc_ecc_bch_fix_data()
644 NULL, ecc, NULL, errorpos); in doc_ecc_bch_fix_data()
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb4/
Dt4_hw.c347 int t4_mc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc) in t4_mc_read() argument
382 if (ecc) in t4_mc_read()
383 *ecc = t4_read_reg64(adap, MC_DATA(16)); in t4_mc_read()
400 int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc) in t4_edc_read() argument
439 if (ecc) in t4_edc_read()
440 *ecc = t4_read_reg64(adap, EDC_DATA(16)); in t4_edc_read()
/linux-4.1.27/drivers/video/fbdev/omap2/dss/
Ddsi.c2672 int channel, u8 data_type, u16 len, u8 ecc) in dsi_vc_write_long_header() argument
2683 FLD_VAL(ecc, 31, 24); in dsi_vc_write_long_header()
2702 u8 data_type, u8 *data, u16 len, u8 ecc) in dsi_vc_send_long() argument
2722 dsi_vc_write_long_header(dsidev, channel, data_type, len, ecc); in dsi_vc_send_long()
2766 u8 data_type, u16 data, u8 ecc) in dsi_vc_send_short() argument
2788 r = (data_id << 0) | (data << 8) | (ecc << 24); in dsi_vc_send_short()
/linux-4.1.27/drivers/scsi/libsas/
Dsas_expander.c1777 static int sas_get_ex_change_count(struct domain_device *dev, int *ecc) in sas_get_ex_change_count() argument
1804 *ecc = be16_to_cpu(rg_resp->rg.change_count); in sas_get_ex_change_count()
/linux-4.1.27/arch/mips/include/asm/octeon/
Dcvmx-l2c-defs.h2833 uint64_t ecc:6; member
2849 uint64_t ecc:6;
/linux-4.1.27/drivers/scsi/megaraid/
Dmegaraid_sas.h1630 } __attribute__ ((packed)) ecc; member