Searched refs:drm_dp_dpcd_write (Results 1 – 8 of 8) sorted by relevance
/linux-4.1.27/drivers/gpu/drm/ |
D | drm_dp_helper.c | 261 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, in drm_dp_dpcd_write() function 267 EXPORT_SYMBOL(drm_dp_dpcd_write); 405 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); in drm_dp_link_configure()
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D | drm_dp_mst_topology.c | 1055 ret = drm_dp_dpcd_write( in drm_dp_check_mstb_guid() 1370 ret = drm_dp_dpcd_write(mgr->aux, regbase + offset, in drm_dp_send_sideband_msg() 2575 ret = drm_dp_dpcd_write(mgr->aux, DP_PAYLOAD_ALLOCATE_SET, payload_alloc, 3); in drm_dp_dpcd_write_payload()
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/linux-4.1.27/include/drm/ |
D | drm_dp_helper.h | 705 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, 735 return drm_dp_dpcd_write(aux, offset, &value, 1); in drm_dp_dpcd_writeb()
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/linux-4.1.27/drivers/gpu/drm/tegra/ |
D | dpaux.c | 538 err = drm_dp_dpcd_write(&dpaux->aux, DP_TRAINING_LANE0_SET, values, in tegra_dpaux_train()
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/linux-4.1.27/drivers/gpu/drm/msm/edp/ |
D | edp_ctrl.c | 511 if (drm_dp_dpcd_write(ctrl->drm_aux, 0x103, buf, 4) < 4) { in edp_lane_set_write() 524 if (drm_dp_dpcd_write(ctrl->drm_aux, in edp_train_pattern_set_write()
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/linux-4.1.27/drivers/gpu/drm/i915/ |
D | intel_dp.c | 3470 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_PATTERN_SET, in intel_dp_set_link_train() 3500 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, in intel_dp_update_link_train() 3557 drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config, 2); in intel_dp_start_link_train() 3559 drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_RATE_SET, in intel_dp_start_link_train() 3564 drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2); in intel_dp_start_link_train() 4002 wret = drm_dp_dpcd_write(&intel_dp->aux, in intel_dp_check_mst_status()
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/linux-4.1.27/drivers/gpu/drm/radeon/ |
D | radeon_dp_mst.c | 726 wret = drm_dp_dpcd_write(&radeon_connector->ddc_bus->aux, in radeon_dp_mst_check_status()
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D | atombios_dp.c | 565 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in radeon_dp_update_vs_emph()
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