Searched refs:dpll_reg (Results 1 – 6 of 6) sorted by relevance
| /linux-4.1.27/drivers/gpu/drm/i915/ |
| D | intel_frontbuffer.c | 72 int dpll_reg = DPLL(pipe); in intel_increase_pllclock() local
81 dpll = I915_READ(dpll_reg); in intel_increase_pllclock()
88 I915_WRITE(dpll_reg, dpll); in intel_increase_pllclock()
91 dpll = I915_READ(dpll_reg); in intel_increase_pllclock()
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| D | intel_display.c | 1827 int dpll_reg; in vlv_wait_port_ready() local
1832 dpll_reg = DPLL(0); in vlv_wait_port_ready()
1836 dpll_reg = DPLL(0); in vlv_wait_port_ready()
1840 dpll_reg = DPIO_PHY_STATUS; in vlv_wait_port_ready()
1846 if (wait_for((I915_READ(dpll_reg) & port_mask) == 0, 1000)) in vlv_wait_port_ready()
1848 port_name(dport->port), I915_READ(dpll_reg)); in vlv_wait_port_ready()
6326 int dpll_reg = DPLL(crtc->pipe); in chv_prepare_pll() local
6346 I915_WRITE(dpll_reg, in chv_prepare_pll()
9412 int dpll_reg = DPLL(pipe); in intel_decrease_pllclock() local
9419 dpll = I915_READ(dpll_reg); in intel_decrease_pllclock()
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| /linux-4.1.27/drivers/gpu/drm/gma500/ |
| D | mdfld_dsi_pkg_sender.h | 46 u32 dpll_reg; member
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| D | cdv_intel_display.c | 229 int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B; in cdv_dpll_set_clock_cdv() local
236 REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS); in cdv_dpll_set_clock_cdv()
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| D | mdfld_dsi_pkg_sender.c | 625 pkg_sender->dpll_reg = map->dpll; in mdfld_dsi_pkg_sender_init()
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| /linux-4.1.27/drivers/video/fbdev/intelfb/ |
| D | intelfbhw.c | 1286 u32 dpll_reg, fp0_reg, fp1_reg, pipe_conf_reg, pipe_stat_reg; in intelfbhw_program_mode() local
1317 dpll_reg = DPLL_B; in intelfbhw_program_mode()
1341 dpll_reg = DPLL_A; in intelfbhw_program_mode()
1401 tmp = INREG(dpll_reg); in intelfbhw_program_mode()
1403 OUTREG(dpll_reg, tmp); in intelfbhw_program_mode()
1410 OUTREG(dpll_reg, *dpll); in intelfbhw_program_mode()
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