Searched refs:dp_op (Results 1 - 3 of 3) sorted by relevance
| /linux-4.1.27/arch/arm/mach-imx/ |
| H A D | clk-pllv2.c | 78 u32 dp_ctl, u32 dp_op, u32 dp_mfd, u32 dp_mfn) __clk_pllv2_recalc_rate()
86 pdf = dp_op & MXC_PLL_DP_OP_PDF_MASK; __clk_pllv2_recalc_rate()
87 mfi = (dp_op & MXC_PLL_DP_OP_MFI_MASK) >> MXC_PLL_DP_OP_MFI_OFFSET; __clk_pllv2_recalc_rate()
114 u32 dp_op, dp_mfd, dp_mfn, dp_ctl; clk_pllv2_recalc_rate() local
121 dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP); clk_pllv2_recalc_rate()
125 return __clk_pllv2_recalc_rate(parent_rate, dp_ctl, dp_op, dp_mfd, dp_mfn); clk_pllv2_recalc_rate()
129 u32 *dp_op, u32 *dp_mfd, u32 *dp_mfn) __clk_pllv2_set_rate()
150 *dp_op = reg; __clk_pllv2_set_rate()
162 u32 dp_ctl, dp_op, dp_mfd, dp_mfn; clk_pllv2_set_rate() local
168 ret = __clk_pllv2_set_rate(rate, parent_rate, &dp_op, &dp_mfd, &dp_mfn); clk_pllv2_set_rate()
176 __raw_writel(dp_op, pllbase + MXC_PLL_DP_OP); clk_pllv2_set_rate()
186 u32 dp_op, dp_mfd, dp_mfn; clk_pllv2_round_rate() local
188 __clk_pllv2_set_rate(rate, *prate, &dp_op, &dp_mfd, &dp_mfn); clk_pllv2_round_rate()
190 dp_op, dp_mfd, dp_mfn); clk_pllv2_round_rate()
77 __clk_pllv2_recalc_rate(unsigned long parent_rate, u32 dp_ctl, u32 dp_op, u32 dp_mfd, u32 dp_mfn) __clk_pllv2_recalc_rate() argument
128 __clk_pllv2_set_rate(unsigned long rate, unsigned long parent_rate, u32 *dp_op, u32 *dp_mfd, u32 *dp_mfn) __clk_pllv2_set_rate() argument
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| /linux-4.1.27/drivers/video/fbdev/ |
| H A D | w100fb.h | 874 u32 dp_op : 1; member in struct:dp_mix_t
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| H A D | w100fb.c | 346 dp_mix.f.dp_op = gmc.f.gmc_dp_op; w100_init_graphic_engine()
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