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Searched refs:divp_shift (Results 1 – 5 of 5) sorted by relevance

/linux-4.1.27/drivers/clk/tegra/
Dclk-tegra124.c165 .divp_shift = 20,
261 .divp_shift = 20,
335 .divp_shift = 20,
411 .divp_shift = 20,
451 .divp_shift = 24,
489 .divp_shift = 16,
516 .divp_shift = 20,
580 .divp_shift = 20,
698 .divp_shift = 20,
Dclk-tegra114.c183 .divp_shift = 20,
245 .divp_shift = 20,
318 .divp_shift = 20,
364 .divp_shift = 20,
492 .divp_shift = 20,
572 .divp_shift = 24,
600 .divp_shift = 16,
Dclk-pll.c204 #define divp_shift(p) (p)->params->div_nmp->divp_shift macro
208 #define divp_mask_shifted(p) (divp_mask(p) << divp_shift(p))
219 .divp_shift = PLL_BASE_DIVP_SHIFT,
508 (cfg->p << divp_shift(pll)); in _update_pll_mnp()
535 cfg->p = (val >> div_nmp->divp_shift) & divp_mask(pll); in _get_pll_mnp()
761 val |= sel.p << divp_shift(pll); in clk_plle_enable()
793 divp = (val >> pll->params->div_nmp->divp_shift) & (divp_mask(pll)); in clk_plle_recalc_rate()
1481 .divp_shift = PLLE_BASE_DIVP_SHIFT,
Dclk.h152 u8 divp_shift; member
Dclk-tegra30.c436 .divp_shift = 20,