Searched refs:div_offset (Results 1 - 3 of 3) sorted by relevance

/linux-4.1.27/drivers/clk/tegra/
H A Dclk-tegra-audio.c79 u8 div_offset; member in struct:tegra_audio2x_clk_initdata
90 .div_offset = _offset,\
206 0, 0, data->div_offset, 1, 0, tegra_audio_clk_init()
/linux-4.1.27/arch/mips/jz4740/
H A Dclock.c106 uint32_t div_offset; member in struct:main_clk
263 div >>= mclk->div_offset; jz_clk_main_get_rate()
287 jz_clk_reg_write_mask(JZ_REG_CLOCK_CTRL, i << mclk->div_offset, jz_clk_main_set_rate()
288 0xf << mclk->div_offset); jz_clk_main_set_rate()
340 .div_offset = JZ_CLOCK_CTRL_CDIV_OFFSET,
349 .div_offset = JZ_CLOCK_CTRL_MDIV_OFFSET,
358 .div_offset = JZ_CLOCK_CTRL_HDIV_OFFSET,
368 .div_offset = JZ_CLOCK_CTRL_PDIV_OFFSET,
/linux-4.1.27/drivers/clk/
H A Dclk-si570.c64 * @div_offset: Rgister offset for dividers
76 unsigned int div_offset; member in struct:clk_si570
109 err = regmap_bulk_read(data->regmap, SI570_REG_HS_N1 + data->div_offset, si570_get_divs()
179 data->div_offset, reg, ARRAY_SIZE(reg)); si570_update_rfreq()
300 regmap_write(data->regmap, SI570_REG_HS_N1 + data->div_offset, si570_set_frequency()
435 data->div_offset = SI570_DIV_OFFSET_7PPM; si570_probe()

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