| /linux-4.1.27/arch/arm/mach-shmobile/ |
| D | clock-sh73a0.c | 396 static struct clk div6_clks[DIV6_NR] = { variable
532 .parent = &div6_clks[DIV6_DSI0P], /* late install */
538 .parent = &div6_clks[DIV6_DSI1P], /* late install */
568 [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
573 [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
576 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
577 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
578 [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
579 [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
580 [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
[all …]
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| D | clock-r8a7740.c | 382 static struct clk div6_clks[DIV6_NR] = { variable
471 [MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
474 [MSTP111] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 11, 0), /* TMU1 */
477 [MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */
479 [MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */
484 [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
485 [MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
486 [MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
487 [MSTP203] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
488 [MSTP202] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
[all …]
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| /linux-4.1.27/arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7724.c | 201 static struct clk div6_clks[DIV6_NR] = { variable
287 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
288 CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]),
289 CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]),
290 CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
291 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
373 ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR); in arch_clk_init()
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| D | clock-sh7722.c | 149 struct clk div6_clks[DIV6_NR] = { variable
200 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
259 ret = sh_clk_div6_register(div6_clks, DIV6_NR); in arch_clk_init()
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| D | clock-sh7366.c | 136 struct clk div6_clks[DIV6_NR] = { variable
213 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
276 ret = sh_clk_div6_register(div6_clks, DIV6_NR); in arch_clk_init()
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| D | clock-sh7723.c | 149 struct clk div6_clks[DIV6_NR] = { variable
225 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
307 ret = sh_clk_div6_register(div6_clks, DIV6_NR); in arch_clk_init()
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| D | clock-sh7343.c | 133 struct clk div6_clks[DIV6_NR] = { variable
215 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
283 ret = sh_clk_div6_register(div6_clks, DIV6_NR); in arch_clk_init()
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