Searched refs:dim1 (Results 1 - 6 of 6) sorted by relevance
| /linux-4.1.27/arch/alpha/kernel/ |
| H A D | sys_titan.c | 69 volatile unsigned long *dim0, *dim1, *dim2, *dim3; titan_update_irq_hw()
85 dim1 = &cchip->dim1.csr; titan_update_irq_hw()
89 if (!cpumask_test_cpu(1, &cpm)) dim1 = &dummy; titan_update_irq_hw()
94 *dim1 = mask1; titan_update_irq_hw()
99 *dim1; titan_update_irq_hw()
105 if (bcpu == 1) dimB = &cchip->dim1.csr; titan_update_irq_hw()
68 volatile unsigned long *dim0, *dim1, *dim2, *dim3; titan_update_irq_hw() local
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| H A D | sys_dp264.c | 54 volatile unsigned long *dim0, *dim1, *dim2, *dim3; tsunami_update_irq_hw() local
69 dim1 = &cchip->dim1.csr; tsunami_update_irq_hw()
73 if (!cpu_possible(1)) dim1 = &dummy; tsunami_update_irq_hw()
78 *dim1 = mask1; tsunami_update_irq_hw()
83 *dim1; tsunami_update_irq_hw()
89 else if (bcpu == 1) dimB = &cchip->dim1.csr; tsunami_update_irq_hw()
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| H A D | core_tsunami.c | 399 printk("%s: CSR_DIM1 0x%lx\n", __func__, TSUNAMI_cchip->dim1.csr); tsunami_init_arch()
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| H A D | core_titan.c | 377 printk("%s: CSR_DIM1 0x%lx\n", __func__, TITAN_cchip->dim1.csr); titan_init_arch()
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| /linux-4.1.27/arch/alpha/include/asm/ |
| H A D | core_titan.h | 44 titan_64 dim1; member in struct:__anon21
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| H A D | core_tsunami.h | 43 tsunami_64 dim1; member in struct:__anon34
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