/linux-4.1.27/arch/cris/arch-v32/mach-a3/ |
D | dram_init.S | 25 ;; Refer to ddr2 MDS for initialization sequence 33 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0 34 move.d REG_STATE(ddr2, rw_phy_cfg, en, yes), $r1 43 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0 44 move.d REG_STATE(ddr2, rw_phy_ctrl, rst, yes) | \ 45 REG_STATE(ddr2, rw_phy_ctrl, cal_rst, yes), $r1 47 move.d REG_STATE(ddr2, rw_phy_ctrl, cal_start, yes), $r1 56 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_ctrl), $r0 74 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing), $r0 79 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0 [all …]
|
D | hw_settings.S | 32 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg) 34 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency) 36 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing)
|
/linux-4.1.27/arch/mips/ralink/ |
D | rt3883.c | 81 u32 ddr2; in ralink_clk_init() local 86 ddr2 = syscfg0 & RT3883_SYSCFG0_DRAM_TYPE_DDR2; in ralink_clk_init() 91 sys_rate = (ddr2) ? 125000000 : 83000000; in ralink_clk_init() 95 sys_rate = (ddr2) ? 128000000 : 96000000; in ralink_clk_init() 99 sys_rate = (ddr2) ? 160000000 : 120000000; in ralink_clk_init() 103 sys_rate = (ddr2) ? 166000000 : 125000000; in ralink_clk_init()
|
/linux-4.1.27/drivers/cpufreq/ |
D | cris-artpec3-cpufreq.c | 81 REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg); in cris_sdram_freq_notifier()
|
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
D | clkgen_defs.h | 101 unsigned int ddr2 : 1; member
|
/linux-4.1.27/arch/powerpc/boot/dts/fsl/ |
D | b4860si-post.dtsi | 80 dev-handle = <&ddr2>; 171 ddr2: memory-controller@9000 { label
|
D | p5020si-post.dtsi | 225 dev-handle = <&ddr2>; 273 ddr2: memory-controller@9000 { label
|
D | p5040si-post.dtsi | 170 dev-handle = <&ddr2>; 228 ddr2: memory-controller@9000 { label
|
D | p4080si-post.dtsi | 197 dev-handle = <&ddr2>; 276 ddr2: memory-controller@9000 { label
|
D | t4240si-post.dtsi | 212 dev-handle = <&ddr2>; 583 ddr2: memory-controller@9000 { label
|
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/ |
D | startup.inc | 68 REG_STATE(clkgen, rw_clk_ctrl, ddr2, yes) | \
|
/linux-4.1.27/arch/powerpc/boot/dts/ |
D | haleakala.dts | 92 compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2";
|
D | obs600.dts | 106 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
|
D | makalu.dts | 93 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
|
D | kilauea.dts | 102 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
|
/linux-4.1.27/arch/mips/include/asm/octeon/ |
D | cvmx-lmcx-defs.h | 1414 uint64_t ddr2:1; member 1416 uint64_t ddr2:1; 1455 uint64_t ddr2:1; member 1457 uint64_t ddr2:1;
|