| /linux-4.1.27/arch/sh/drivers/dma/ |
| D | dmabrg.c | 87 unsigned long dcr; in dmabrg_irq() local
90 dcr = __raw_readl(DMABRGCR); in dmabrg_irq()
91 __raw_writel(dcr & ~0x00ff0003, DMABRGCR); /* ack all */ in dmabrg_irq()
92 dcr &= dcr >> 8; /* ignore masked */ in dmabrg_irq()
95 if (dcr & 1) in dmabrg_irq()
97 if (dcr & 2) in dmabrg_irq()
101 dcr >>= 16; in dmabrg_irq()
102 while (dcr) { in dmabrg_irq()
103 i = __ffs(dcr); in dmabrg_irq()
104 dcr &= dcr - 1; in dmabrg_irq()
[all …]
|
| /linux-4.1.27/drivers/dma/ |
| D | mic_x100_dma.h | 214 u32 dcr = mic_dma_mmio_read(ch, MIC_DMA_SBOX_BASE + MIC_DMA_SBOX_DCR); in mic_dma_chan_set_owner() local
217 dcr = (dcr & ~(0x1 << (chan_num * 2))) | (ch->owner << (chan_num * 2)); in mic_dma_chan_set_owner()
218 mic_dma_mmio_write(ch, dcr, MIC_DMA_SBOX_BASE + MIC_DMA_SBOX_DCR); in mic_dma_chan_set_owner()
223 u32 dcr = mic_dma_mmio_read(ch, MIC_DMA_SBOX_BASE + MIC_DMA_SBOX_DCR); in mic_dma_enable_chan() local
225 dcr |= 2 << (ch->ch_num << 1); in mic_dma_enable_chan()
226 mic_dma_mmio_write(ch, dcr, MIC_DMA_SBOX_BASE + MIC_DMA_SBOX_DCR); in mic_dma_enable_chan()
231 u32 dcr = mic_dma_mmio_read(ch, MIC_DMA_SBOX_BASE + MIC_DMA_SBOX_DCR); in mic_dma_disable_chan() local
233 dcr &= ~(2 << (ch->ch_num << 1)); in mic_dma_disable_chan()
234 mic_dma_mmio_write(ch, dcr, MIC_DMA_SBOX_BASE + MIC_DMA_SBOX_DCR); in mic_dma_disable_chan()
|
| /linux-4.1.27/arch/powerpc/sysdev/ |
| D | dcr-low.S | 40 dcr = 1 define
42 mfdcr r3,dcr; blr
43 mtdcr dcr,r4; blr
44 dcr = dcr + 1 define
|
| D | Makefile | 16 obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o
56 obj-$(CONFIG_PPC_DCR) += dcr.o
|
| /linux-4.1.27/arch/powerpc/boot/dts/ |
| D | iss4xx-mpic.dts | 24 dcr-parent = <&{/cpus/cpu@0}>;
44 dcr-controller;
45 dcr-access-method = "native";
58 dcr-controller;
59 dcr-access-method = "native";
74 dcr-controller;
75 dcr-access-method = "native";
90 dcr-controller;
91 dcr-access-method = "native";
107 dcr-reg = <0xffc00000 0x00030000>;
|
| D | warp.dts | 19 dcr-parent = <&{/cpus/cpu@0}>;
40 dcr-controller;
41 dcr-access-method = "native";
54 dcr-reg = <0x0c0 0x009>;
64 dcr-reg = <0x0d0 0x009>;
74 dcr-reg = <0x00e 0x002>;
79 dcr-reg = <0x00c 0x002>;
91 dcr-reg = <0x010 0x002>;
96 dcr-reg = <0x100 0x027>;
101 dcr-reg = <0x180 0x062>;
[all …]
|
| D | klondike.dts | 31 dcr-parent = <&{/cpus/cpu@0}>;
52 dcr-controller;
53 dcr-access-method = "native";
66 dcr-reg = <0x0c0 0x010>;
76 dcr-reg = <0x0d0 0x010>;
88 dcr-reg = <0x0e0 0x010>;
100 dcr-reg = <0x0f0 0x010>;
117 dcr-reg = <0x010 0x002>;
122 dcr-reg = <0x180 0x062>;
143 dcr-reg = <0x100 0x020>;
|
| D | taishan.dts | 20 dcr-parent = <&{/cpus/cpu@0}>;
43 dcr-controller;
44 dcr-access-method = "native";
58 dcr-reg = <0x200 0x009>;
69 dcr-reg = <0x0c0 0x009>;
82 dcr-reg = <0x0d0 0x009>;
94 dcr-reg = <0x210 0x009>;
105 dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
111 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
128 dcr-reg = <0x010 0x002>;
[all …]
|
| D | icon.dts | 18 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
56 dcr-reg = <0x0c0 0x009>;
66 dcr-reg = <0x0d0 0x009>;
78 dcr-reg = <0x0e0 0x009>;
90 dcr-reg = <0x0f0 0x009>;
100 dcr-reg = <0x00e 0x002>;
105 dcr-reg = <0x00c 0x002>;
110 dcr-reg = <0x040 0x020>;
[all …]
|
| D | ebony.dts | 21 dcr-parent = <&{/cpus/cpu@0}>;
44 dcr-controller;
45 dcr-access-method = "native";
58 dcr-reg = <0x0c0 0x009>;
69 dcr-reg = <0x0d0 0x009>;
79 dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
92 dcr-reg = <0x010 0x002>;
98 dcr-reg = <0x020 0x008 0x00a 0x001>;
104 dcr-reg = <0x100 0x027>;
109 dcr-reg = <0x180 0x062>;
[all …]
|
| D | obs600.dts | 22 dcr-parent = <&{/cpus/cpu@0}>;
45 dcr-controller;
46 dcr-access-method = "native";
59 dcr-reg = <0x0c0 0x009>;
69 dcr-reg = <0x0d0 0x009>;
81 dcr-reg = <0x0e0 0x009>;
91 dcr-access-method = "native";
92 dcr-reg = <0x0b0 0x003>;
107 dcr-reg = <0x010 0x002>;
122 dcr-reg = <0x180 0x062>;
[all …]
|
| D | bluestone.dts | 31 dcr-parent = <&{/cpus/cpu@0}>;
53 dcr-controller;
54 dcr-access-method = "native";
68 dcr-reg = <0x0c0 0x009>;
78 dcr-reg = <0x0d0 0x009>;
90 dcr-reg = <0x0e0 0x009>;
102 dcr-reg = <0x0f0 0x009>;
120 dcr-reg = <0x00e 0x002>;
125 dcr-reg = <0x00c 0x002>;
130 dcr-reg = <0x020 0x008
[all …]
|
| D | haleakala.dts | 18 dcr-parent = <&{/cpus/cpu@0}>;
40 dcr-controller;
41 dcr-access-method = "native";
54 dcr-reg = <0x0c0 0x009>;
64 dcr-reg = <0x0d0 0x009>;
76 dcr-reg = <0x0e0 0x009>;
93 dcr-reg = <0x010 0x002>;
101 dcr-reg = <0x180 0x062>;
124 dcr-reg = <0x0a0 0x005>;
129 dcr-reg = <0x012 0x002>;
[all …]
|
| D | bamboo.dts | 21 dcr-parent = <&{/cpus/cpu@0}>;
46 dcr-controller;
47 dcr-access-method = "native";
60 dcr-reg = <0x0c0 0x009>;
70 dcr-reg = <0x0d0 0x009>;
80 dcr-reg = <0x00e 0x002>;
85 dcr-reg = <0x00c 0x002>;
97 dcr-reg = <0x010 0x002>;
102 dcr-reg = <0x100 0x027>;
107 dcr-reg = <0x180 0x062>;
[all …]
|
| D | arches.dts | 38 dcr-parent = <&{/cpus/cpu@0}>;
61 dcr-controller;
62 dcr-access-method = "native";
76 dcr-reg = <0x0c0 0x009>;
86 dcr-reg = <0x0d0 0x009>;
98 dcr-reg = <0x0e0 0x009>;
110 dcr-reg = <0x0f0 0x009>;
120 dcr-reg = <0x00e 0x002>;
125 dcr-reg = <0x00c 0x002>;
130 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
[all …]
|
| D | redwood.dts | 18 dcr-parent = <&{/cpus/cpu@0}>;
39 dcr-controller;
40 dcr-access-method = "native";
53 dcr-reg = <0x0c0 0x009>;
63 dcr-reg = <0x0d0 0x009>;
75 dcr-reg = <0x0e0 0x009>;
87 dcr-reg = <0x0f0 0x009>;
97 dcr-reg = <0x00e 0x002>;
102 dcr-reg = <0x00c 0x002>;
114 dcr-reg = <0x010 0x002>;
[all …]
|
| D | acadia.dts | 18 dcr-parent = <&{/cpus/cpu@0}>;
40 dcr-controller;
41 dcr-access-method = "native";
53 dcr-reg = <0x0c0 0x009>;
69 dcr-reg = <0x380 0x62>;
88 dcr-reg = <0x0a 0x05>;
180 dcr-reg = <0xe0 0x9>;
214 dcr-reg = <0x12 0x2>;
|
| D | ep405.dts | 19 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
55 dcr-reg = <0x0c0 0x009>;
70 dcr-reg = <0x010 0x002>;
75 dcr-reg = <0x180 0x062>;
92 dcr-reg = <0x0a0 0x005>;
154 dcr-reg = <0x012 0x002>;
|
| D | katmai.dts | 22 dcr-parent = <&{/cpus/cpu@0}>;
45 dcr-controller;
46 dcr-access-method = "native";
60 dcr-reg = <0x0c0 0x009>;
70 dcr-reg = <0x0d0 0x009>;
82 dcr-reg = <0x0e0 0x009>;
94 dcr-reg = <0x0f0 0x009>;
104 dcr-reg = <0x00e 0x002>;
109 dcr-reg = <0x00c 0x002>;
114 dcr-reg = <0x040 0x020>;
[all …]
|
| D | sam440ep.dts | 47 dcr-controller;
48 dcr-access-method = "native";
61 dcr-reg = <0x0c0 9>;
71 dcr-reg = <0x0d0 9>;
81 dcr-reg = <0x00e 2>;
86 dcr-reg = <0x00c 2>;
98 dcr-reg = <0x010 2>;
103 dcr-reg = <0x100 0x027>;
108 dcr-reg = <0x180 0x062>;
138 dcr-reg = <0x012 2>;
|
| D | rainier.dts | 22 dcr-parent = <&{/cpus/cpu@0}>;
47 dcr-controller;
48 dcr-access-method = "native";
61 dcr-reg = <0x0c0 0x009>;
71 dcr-reg = <0x0d0 0x009>;
83 dcr-reg = <0x0e0 0x009>;
93 dcr-reg = <0x00e 0x002>;
98 dcr-reg = <0x00c 0x002>;
110 dcr-reg = <0x010 0x002>;
115 dcr-reg = <0x100 0x027>;
[all …]
|
| D | yosemite.dts | 19 dcr-parent = <&{/cpus/cpu@0}>;
44 dcr-controller;
45 dcr-access-method = "native";
58 dcr-reg = <0x0c0 0x009>;
68 dcr-reg = <0x0d0 0x009>;
78 dcr-reg = <0x00e 0x002>;
83 dcr-reg = <0x00c 0x002>;
95 dcr-reg = <0x010 0x002>;
100 dcr-reg = <0x100 0x027>;
105 dcr-reg = <0x180 0x062>;
[all …]
|
| D | walnut.dts | 19 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
55 dcr-reg = <0x0c0 0x009>;
70 dcr-reg = <0x010 0x002>;
75 dcr-reg = <0x180 0x062>;
92 dcr-reg = <0x0a0 0x005>;
153 dcr-reg = <0x012 0x002>;
|
| D | iss4xx.dts | 22 dcr-parent = <&{/cpus/cpu@0}>;
42 dcr-controller;
43 dcr-access-method = "native";
56 dcr-reg = <0x0c0 0x009>;
67 dcr-reg = <0x0d0 0x009>;
|
| D | sequoia.dts | 22 dcr-parent = <&{/cpus/cpu@0}>;
47 dcr-controller;
48 dcr-access-method = "native";
61 dcr-reg = <0x0c0 0x009>;
71 dcr-reg = <0x0d0 0x009>;
83 dcr-reg = <0x0e0 0x009>;
93 dcr-reg = <0x00e 0x002>;
98 dcr-reg = <0x00c 0x002>;
110 dcr-reg = <0x010 0x002>;
127 dcr-reg = <0x100 0x027>;
[all …]
|
| D | eiger.dts | 18 dcr-parent = <&{/cpus/cpu@0}>;
43 dcr-controller;
44 dcr-access-method = "native";
57 dcr-reg = <0x0c0 0x009>;
67 dcr-reg = <0x0d0 0x009>;
79 dcr-reg = <0x0e0 0x009>;
91 dcr-reg = <0x0f0 0x009>;
101 dcr-reg = <0x00e 0x002>;
106 dcr-reg = <0x00c 0x002>;
118 dcr-reg = <0x010 0x002>;
[all …]
|
| D | makalu.dts | 18 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
55 dcr-reg = <0x0c0 0x009>;
65 dcr-reg = <0x0d0 0x009>;
77 dcr-reg = <0x0e0 0x009>;
94 dcr-reg = <0x010 0x002>;
102 dcr-reg = <0x180 0x062>;
125 dcr-reg = <0x0a0 0x005>;
130 dcr-reg = <0x012 0x002>;
[all …]
|
| D | kilauea.dts | 18 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
55 dcr-reg = <0x0c0 0x009>;
65 dcr-reg = <0x0d0 0x009>;
77 dcr-reg = <0x0e0 0x009>;
87 dcr-access-method = "native";
88 dcr-reg = <0x0b0 0x003>;
103 dcr-reg = <0x010 0x002>;
118 dcr-reg = <0x180 0x062>;
[all …]
|
| D | canyonlands.dts | 18 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
56 dcr-reg = <0x0c0 0x009>;
66 dcr-reg = <0x0d0 0x009>;
78 dcr-reg = <0x0e0 0x009>;
90 dcr-reg = <0x0f0 0x009>;
100 dcr-reg = <0x00e 0x002>;
105 dcr-reg = <0x00c 0x002>;
110 dcr-access-method = "native";
[all …]
|
| D | hotfoot.dts | 18 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
55 dcr-reg = <0x0c0 0x009>;
70 dcr-reg = <0x010 0x002>;
75 dcr-reg = <0x180 0x062>;
92 dcr-reg = <0x0a0 0x005>;
205 dcr-reg = <0x012 0x002>;
|
| D | currituck.dts | 20 dcr-parent = <&{/cpus/cpu@0}>;
40 dcr-controller;
41 dcr-access-method = "native";
54 dcr-controller;
55 dcr-access-method = "native";
70 dcr-reg = <0xffc00000 0x00040000>;
135 dcr-reg = <0x80 0x20>;
173 dcr-reg = <0x60 0x20>;
210 dcr-reg = <0xA0 0x20>;
|
| D | glacier.dts | 18 dcr-parent = <&{/cpus/cpu@0}>;
43 dcr-controller;
44 dcr-access-method = "native";
58 dcr-reg = <0x0c0 0x009>;
68 dcr-reg = <0x0d0 0x009>;
80 dcr-reg = <0x0e0 0x009>;
92 dcr-reg = <0x0f0 0x009>;
102 dcr-reg = <0x00e 0x002>;
107 dcr-reg = <0x00c 0x002>;
112 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
[all …]
|
| D | akebono.dts | 21 dcr-parent = <&{/cpus/cpu@0}>;
41 dcr-controller;
42 dcr-access-method = "native";
55 dcr-controller;
56 dcr-access-method = "native";
71 dcr-reg = <0xffc00000 0x00040000>;
109 dcr-reg = <0xc0000000 0x062>;
261 dcr-reg = <0xc0 0x20>;
301 dcr-reg = <0x100 0x20>;
341 dcr-reg = <0xe0 0x20>;
[all …]
|
| D | virtex440-ml507.dts | 27 dcr-parent = <&ppc440_0>;
46 dcr-access-method = "native";
47 dcr-controller ;
71 xlnx,dcr-autolock-enable = <1>;
146 dcr-reg = < 0x80 0x11 >;
|
| D | virtex440-ml510.dts | 17 dcr-parent = <&ppc440_0>;
41 dcr-access-method = "native";
42 dcr-controller ;
66 xlnx,dcr-autolock-enable = <0x1>;
454 xlnx,dcr-splb-slave-if = <0x1>;
|
| /linux-4.1.27/include/linux/ |
| D | parport_pc.h | 85 unsigned char dcr = inb (CONTROL (p)); in dump_parport_state() local
99 dcr = i ? priv->ctr : inb (CONTROL (p)); in dump_parport_state()
101 if (dcr & 0x20) { in dump_parport_state()
106 if (dcr & 0x10) printk (",ackIntEn"); in dump_parport_state()
107 if (!(dcr & 0x08)) printk (",N-SELECT-IN"); in dump_parport_state()
108 if (dcr & 0x04) printk (",N-INIT"); in dump_parport_state()
109 if (!(dcr & 0x02)) printk (",N-AUTOFD"); in dump_parport_state()
110 if (!(dcr & 0x01)) printk (",N-STROBE"); in dump_parport_state()
|
| D | parport.h | 47 unsigned int dcr; member
|
| /linux-4.1.27/Documentation/devicetree/bindings/powerpc/4xx/ |
| D | ppc440spe-adma.txt | 17 - dcr-reg : <DCR registers range>
24 dcr-reg = <0x060 0x020>;
36 - dcr-reg : <DCR registers range>
49 dcr-reg = <0x060 0x020>;
85 - dcr-reg : <DCR registers range>
91 dcr-reg = <0x040 0x020>;
|
| D | cpm.txt | 5 - dcr-access-method : "native"
6 - dcr-reg : < DCR register range >
45 dcr-access-method = "native";
46 dcr-reg = <0x160 0x003>;
|
| D | emac.txt | 123 - dcr-reg : < DCR registers range >
124 - dcr-parent : if needed for dcr-reg
|
| /linux-4.1.27/arch/frv/kernel/ |
| D | gdb-stub.c | 907 if (!(__debug_regs->dcr & DCR_IBE0)) { in gdbstub_set_breakpoint()
909 __debug_regs->dcr |= DCR_IBE0; in gdbstub_set_breakpoint()
915 if (!(__debug_regs->dcr & DCR_IBE1)) { in gdbstub_set_breakpoint()
917 __debug_regs->dcr |= DCR_IBE1; in gdbstub_set_breakpoint()
923 if (!(__debug_regs->dcr & DCR_IBE2)) { in gdbstub_set_breakpoint()
925 __debug_regs->dcr |= DCR_IBE2; in gdbstub_set_breakpoint()
931 if (!(__debug_regs->dcr & DCR_IBE3)) { in gdbstub_set_breakpoint()
933 __debug_regs->dcr |= DCR_IBE3; in gdbstub_set_breakpoint()
956 if (!(__debug_regs->dcr & (DCR_DRBE0|DCR_DWBE0))) { in gdbstub_set_breakpoint()
960 __debug_regs->dcr |= tmp; in gdbstub_set_breakpoint()
[all …]
|
| D | debug-stub.c | 69 __debug_status.dcr &= ~DCR_SE; in debug_stub()
126 __debug_status.dcr = DCR_EBE; in debug_stub_init()
|
| D | asm-offsets.c | 63 DEF_0REG(REG_DCR, debug.dcr); in foo()
102 OFFSET(DEBUG_DCR, frv_debug_status, dcr); in foo()
|
| D | break.S | 287 movsg dcr,gr2
291 movgs gr2,dcr
390 movsg dcr,gr2
394 movgs gr2,dcr
|
| /linux-4.1.27/arch/arm/mach-shmobile/ |
| D | setup-r8a7778.c | 323 .dcr = HPB_DMAE_DCR_CT | \
333 .dcr = HPB_DMAE_DCR_CT | \
346 .dcr = HPB_DMAE_DCR_CT | \
356 .dcr = HPB_DMAE_DCR_CT | \
369 .dcr = HPB_DMAE_DCR_SPDS_16BIT |
383 .dcr = HPB_DMAE_DCR_SMDL |
397 .dcr = HPB_DMAE_DCR_SPDS_32BIT |
405 .dcr = HPB_DMAE_DCR_SMDL |
|
| D | setup-r8a7779.c | 569 .dcr = HPB_DMAE_DCR_SPDS_16BIT |
585 .dcr = HPB_DMAE_DCR_SMDL |
|
| /linux-4.1.27/drivers/staging/comedi/drivers/ |
| D | mite.c | 352 unsigned int chor, chcr, mcr, dcr, lkcr; in mite_prep_dma() local
405 dcr = CR_RL(64) | CR_ASEQUP; in mite_prep_dma()
406 dcr |= CR_PORTIO | CR_AMDEVICE | CR_REQSDRQ(mite_chan->channel); in mite_prep_dma()
409 dcr |= CR_PSIZE8; in mite_prep_dma()
412 dcr |= CR_PSIZE16; in mite_prep_dma()
415 dcr |= CR_PSIZE32; in mite_prep_dma()
421 writel(dcr, mite->mite_io_addr + MITE_DCR(mite_chan->channel)); in mite_prep_dma()
|
| /linux-4.1.27/drivers/dma/hsu/ |
| D | hsu.c | 62 u32 dcr = HSU_CH_DCR_CHSOE | HSU_CH_DCR_CHEI; in hsu_dma_chan_start() local
86 dcr |= HSU_CH_DCR_DESCA(i); in hsu_dma_chan_start()
87 dcr |= HSU_CH_DCR_CHTOI(i); /* timeout bit, see HSU Errata 1 */ in hsu_dma_chan_start()
92 dcr |= HSU_CH_DCR_CHSOD(count - 1); in hsu_dma_chan_start()
93 dcr |= HSU_CH_DCR_CHDI(count - 1); in hsu_dma_chan_start()
95 hsu_chan_writel(hsuc, HSU_CH_DCR, dcr); in hsu_dma_chan_start()
|
| /linux-4.1.27/drivers/parport/ |
| D | parport_ip32.c | 171 void __iomem *dcr; member
399 unsigned int dcr = i ? priv->dcr_cache : readb(priv->regs.dcr); in parport_ip32_dump_state() local
401 i ? "soft" : "hard", dcr); in parport_ip32_dump_state()
402 printk(" %s", (dcr & DCR_DIR) ? "rev" : "fwd"); in parport_ip32_dump_state()
403 if (dcr & DCR_IRQ) in parport_ip32_dump_state()
405 if (!(dcr & DCR_SELECT)) in parport_ip32_dump_state()
407 if (dcr & DCR_nINIT) in parport_ip32_dump_state()
409 if (!(dcr & DCR_AUTOFD)) in parport_ip32_dump_state()
411 if (!(dcr & DCR_STROBE)) in parport_ip32_dump_state()
915 writeb(c, priv->regs.dcr); in __parport_ip32_write_control()
[all …]
|
| /linux-4.1.27/include/linux/platform_data/ |
| D | dma-rcar-hpbdma.h | 72 u32 dcr; member
|
| /linux-4.1.27/arch/ia64/kernel/ |
| D | paravirt.c | 443 __DEFINE_GET_CR(DCR, dcr)
526 __DEFINE_SET_CR(DCR, dcr)
724 IA64_NATIVE_PATCH_DEFINE_CR(dcr, dcr);
836 IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(dcr, DCR),
|
| D | perfmon.c | 5734 unsigned long dcr; in pfm_syst_wide_update_task() local
5752 dcr = ia64_getreg(_IA64_REG_CR_DCR); in pfm_syst_wide_update_task()
5758 ia64_setreg(_IA64_REG_CR_DCR, dcr & ~IA64_DCR_PP); in pfm_syst_wide_update_task()
5770 ia64_setreg(_IA64_REG_CR_DCR, dcr |IA64_DCR_PP); in pfm_syst_wide_update_task()
6688 unsigned long psr, dcr, info, flags; in dump_pmu_state() local
6696 dcr = ia64_getreg(_IA64_REG_CR_DCR); in dump_pmu_state()
6698 if (info == 0 && ia64_psr(regs)->pp == 0 && (dcr & IA64_DCR_PP) == 0) { in dump_pmu_state()
6722 dcr & IA64_DCR_PP ? 1 : 0, in dump_pmu_state()
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| D | head.S | 122 SAVE_FROM_REG(cr.dcr,_reg1,_reg2);; \
1162 RESTORE_REG(cr.dcr, r25, r17);;
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| /linux-4.1.27/arch/frv/include/asm/ |
| D | gdb-stub.h | 138 unsigned long dcr; member
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| /linux-4.1.27/arch/frv/include/uapi/asm/ |
| D | registers.h | 147 unsigned long dcr; member
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| /linux-4.1.27/drivers/dma/sh/ |
| D | rcar-hpbdma.c | 437 if ((cfg->dcr & (HPB_DMAE_DCR_CT | HPB_DMAE_DCR_DIP)) == 0) { in hpb_dmae_alloc_chan_resources()
439 } else if ((cfg->dcr & (HPB_DMAE_DCR_CT | HPB_DMAE_DCR_DIP)) == in hpb_dmae_alloc_chan_resources()
449 ch_reg_write(hpb_chan, cfg->dcr, HPB_DMAE_DCR); in hpb_dmae_alloc_chan_resources()
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| /linux-4.1.27/drivers/usb/serial/ |
| D | mos7720.c | 521 __u8 dcr; in parport_mos7715_read_control() local
529 dcr = mos_parport->shadowDCR & 0x0f; in parport_mos7715_read_control()
531 return dcr; in parport_mos7715_read_control()
539 __u8 dcr; in parport_mos7715_frob_control() local
547 dcr = mos_parport->shadowDCR & 0x0f; in parport_mos7715_frob_control()
549 return dcr; in parport_mos7715_frob_control()
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| /linux-4.1.27/arch/sparc/kernel/ |
| D | traps_64.c | 601 unsigned long dcr; in cheetah_enable_pcache() local
607 : "=r" (dcr) in cheetah_enable_pcache()
609 dcr |= (DCU_PE | DCU_HPE | DCU_SPE | DCU_SL); in cheetah_enable_pcache()
613 : "r" (dcr), "i" (ASI_DCU_CONTROL_REG)); in cheetah_enable_pcache()
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| /linux-4.1.27/arch/ia64/include/asm/ |
| D | sal.h | 874 u64 dcr; /* Default Control Register */ member
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| /linux-4.1.27/include/uapi/linux/ |
| D | kvm.h | 287 } dcr; member
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| /linux-4.1.27/arch/sh/kernel/cpu/sh5/ |
| D | entry.S | 1758 getcon dcr, r14
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| /linux-4.1.27/Documentation/virtual/kvm/ |
| D | api.txt | 3166 } dcr;
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