Searched refs:ctx_reg (Results 1 – 3 of 3) sorted by relevance
54 struct ti_qspi_regs ctx_reg; member136 struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg; in ti_qspi_setup() local184 ctx_reg->clkctrl = clk_mask; in ti_qspi_setup()198 struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg; in ti_qspi_restore_ctx() local200 ti_qspi_write(qspi, ctx_reg->clkctrl, QSPI_SPI_CLOCK_CNTRL_REG); in ti_qspi_restore_ctx()
2496 #define GEN7_CXT_POWER_SIZE(ctx_reg) ((ctx_reg >> 25) & 0x7f) argument2497 #define GEN7_CXT_RING_SIZE(ctx_reg) ((ctx_reg >> 22) & 0x7) argument2498 #define GEN7_CXT_RENDER_SIZE(ctx_reg) ((ctx_reg >> 16) & 0x3f) argument2499 #define GEN7_CXT_EXTENDED_SIZE(ctx_reg) ((ctx_reg >> 9) & 0x7f) argument2500 #define GEN7_CXT_GT1_SIZE(ctx_reg) ((ctx_reg >> 6) & 0x7) argument2501 #define GEN7_CXT_VFSTATE_SIZE(ctx_reg) ((ctx_reg >> 0) & 0x3f) argument2502 #define GEN7_CXT_TOTAL_SIZE(ctx_reg) (GEN7_CXT_EXTENDED_SIZE(ctx_reg) + \ argument2503 GEN7_CXT_VFSTATE_SIZE(ctx_reg))
1100 static u32 *ctx_reg(struct nv04_gr_chan *chan, u32 reg) in ctx_reg() function1138 *ctx_reg(chan, NV04_PGRAPH_DEBUG_3) = 0xfad4ff31; in nv04_gr_context_ctor()