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Searched refs:csr_addr (Results 1 – 8 of 8) sorted by relevance

/linux-4.1.27/drivers/crypto/qat/qat_dh895xcc/
Dadf_hw_arbiter.c64 #define WRITE_CSR_ARB_RINGSRVARBEN(csr_addr, index, value) \ argument
65 ADF_CSR_WR(csr_addr, ADF_ARB_RINGSRVARBEN_OFFSET + \
68 #define WRITE_CSR_ARB_RESPORDERING(csr_addr, index, value) \ argument
69 ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \
72 #define WRITE_CSR_ARB_WEIGHT(csr_addr, arb, index, value) \ argument
73 ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \
77 #define WRITE_CSR_ARB_SARCONFIG(csr_addr, index, value) \ argument
78 ADF_CSR_WR(csr_addr, ADF_ARB_OFFSET + \
81 #define WRITE_CSR_ARB_WRK_2_SER_MAP(csr_addr, index, value) \ argument
82 ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \
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Dadf_isr.c91 WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number, 0); in adf_msix_isr_bundle()
/linux-4.1.27/drivers/crypto/qat/qat_common/
Dadf_transport.c104 WRITE_CSR_INT_COL_EN(bank->csr_addr, bank->bank_number, bank->irq_mask); in adf_enable_ring_irq()
105 WRITE_CSR_INT_COL_CTL(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq()
114 WRITE_CSR_INT_COL_EN(bank->csr_addr, bank->bank_number, bank->irq_mask); in adf_disable_ring_irq()
131 WRITE_CSR_RING_TAIL(ring->bank->csr_addr, ring->bank->bank_number, in adf_send_message()
152 WRITE_CSR_RING_HEAD(ring->bank->csr_addr, in adf_handle_response()
164 WRITE_CSR_RING_CONFIG(ring->bank->csr_addr, ring->bank->bank_number, in adf_configure_tx_ring()
175 WRITE_CSR_RING_CONFIG(ring->bank->csr_addr, ring->bank->bank_number, in adf_configure_rx_ring()
211 WRITE_CSR_RING_BASE(ring->bank->csr_addr, ring->bank->bank_number, in adf_init_ring()
318 WRITE_CSR_RING_CONFIG(bank->csr_addr, bank->bank_number, in adf_remove_ring()
320 WRITE_CSR_RING_BASE(bank->csr_addr, bank->bank_number, in adf_remove_ring()
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Dadf_transport_internal.h78 void __iomem *csr_addr; member
Dadf_transport_debug.c90 void __iomem *csr = ring->bank->csr_addr; in adf_ring_show()
226 void __iomem *csr = bank->csr_addr; in adf_bank_show()
Dqat_hal.c443 void __iomem *csr_addr = handle->hal_ep_csr_addr_v + in qat_hal_init_esram() local
447 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
451 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
453 ADF_CSR_WR(csr_addr, 0, csr_val); in qat_hal_init_esram()
457 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
/linux-4.1.27/arch/mips/include/asm/octeon/
Dcvmx.h264 static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val) in cvmx_write_csr() argument
266 cvmx_write64(csr_addr, val); in cvmx_write_csr()
274 if (((csr_addr >> 40) & 0x7ffff) == (0x118)) in cvmx_write_csr()
284 static inline uint64_t cvmx_read_csr(uint64_t csr_addr) in cvmx_read_csr() argument
286 uint64_t val = cvmx_read64(csr_addr); in cvmx_read_csr()
297 static inline void cvmx_read_csr_async(uint64_t scraddr, uint64_t csr_addr) in cvmx_read_csr_async() argument
307 addr.u64 = csr_addr; in cvmx_read_csr_async()
Docteon-model.h309 static inline uint64_t cvmx_read_csr(uint64_t csr_addr);