Searched refs:crtc_clock (Results 1 – 18 of 18) sorted by relevance
128 int crtc_clock; /* in KHz */ member
818 pipe_config->base.adjusted_mode.crtc_clock = in skl_ddi_clock_get()822 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; in skl_ddi_clock_get()870 pipe_config->base.adjusted_mode.crtc_clock = in hsw_ddi_clock_get()874 pipe_config->base.adjusted_mode.crtc_clock = in hsw_ddi_clock_get()878 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; in hsw_ddi_clock_get()
659 clock = adjusted_mode->crtc_clock; in pineview_update_wm()728 clock = adjusted_mode->crtc_clock; in g4x_compute_wm0()815 clock = adjusted_mode->crtc_clock; in g4x_compute_srwm()916 int clock = intel_crtc->config->base.adjusted_mode.crtc_clock; in vlv_compute_drain_latency()965 clock = crtc->config->base.adjusted_mode.crtc_clock; in vlv_compute_wm()1198 int clock = adjusted_mode->crtc_clock; in i965_update_wm()1285 planea_wm = intel_calculate_wm(adjusted_mode->crtc_clock, in i9xx_update_wm()1307 planeb_wm = intel_calculate_wm(adjusted_mode->crtc_clock, in i9xx_update_wm()1346 int clock = adjusted_mode->crtc_clock; in i9xx_update_wm()1402 planea_wm = intel_calculate_wm(adjusted_mode->crtc_clock, in i845_update_wm()[all …]
166 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
806 pipe_config->base.adjusted_mode.crtc_clock = dotclock; in intel_hdmi_get_config()995 int clock_12bpc = pipe_config->base.adjusted_mode.crtc_clock * 3 / 2; in intel_hdmi_compute_config()1050 if (adjusted_mode->crtc_clock > portclock_limit) { in intel_hdmi_compute_config()
94 adjusted_mode->crtc_clock, in intel_dp_mst_compute_config()
914 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_tv_get_config()927 pipe_config->base.adjusted_mode.crtc_clock = tv_mode->clock; in intel_tv_compute_config()
133 pipe_config->base.adjusted_mode.crtc_clock = dotclock; in intel_lvds_get_config()
126 pipe_config->base.adjusted_mode.crtc_clock = dotclock; in intel_crt_get_config()
974 intel_crtc->config->base.adjusted_mode.crtc_clock; in intel_crtc_active()3825 int clock = to_intel_crtc(crtc)->config->base.adjusted_mode.crtc_clock; in lpt_program_iclkip()5174 intel_crtc->new_config->base.adjusted_mode.crtc_clock); in intel_mode_max_pixclk()5779 fdi_dotclock = adjusted_mode->crtc_clock; in ironlake_fdi_compute_config()5835 adjusted_mode->crtc_clock > clock_limit * 9 / 10) { in intel_crtc_compute_config()5840 if (adjusted_mode->crtc_clock > clock_limit * 9 / 10) in intel_crtc_compute_config()6714 mode->clock = pipe_config->base.adjusted_mode.crtc_clock; in intel_mode_from_pipe_config()9341 pipe_config->base.adjusted_mode.crtc_clock = in ironlake_pch_clock_get()10477 mode->crtc_clock, in intel_dump_crtc_timings()10737 pipe_config->port_clock = pipe_config->base.adjusted_mode.crtc_clock in intel_modeset_pipe_config()[all …]
639 pipe_config->base.adjusted_mode.crtc_clock = pclk; in intel_dsi_get_config()
1379 adjusted_mode->crtc_clock); in intel_dp_compute_config()1403 mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock, in intel_dp_compute_config()1462 adjusted_mode->crtc_clock, in intel_dp_compute_config()2272 pipe_config->base.adjusted_mode.crtc_clock = dotclock; in intel_dp_get_config()
61 return DIV_ROUND_UP(usecs * mode->crtc_clock, 1000 * mode->crtc_htotal); in usecs_to_scanlines()
1396 pipe_config->base.adjusted_mode.crtc_clock = dotclock; in intel_sdvo_get_config()
91 mode_rate = adj->crtc_clock * 1000; in atmel_hlcdc_crtc_mode_set_nofb()
790 p->crtc_clock = p->clock; in drm_mode_set_crtcinfo()833 p->crtc_clock *= 2; in drm_mode_set_crtcinfo()
580 int dotclock = mode->crtc_clock; in drm_calc_timestamping_constants()
1843 mode->crtc_clock = mode->clock = in radeon_atom_get_tv_timings()1887 mode->crtc_clock = mode->clock = in radeon_atom_get_tv_timings()