Searched refs:cpu_rate (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/pmcs-msp71xx/
H A Dmsp_time.c49 unsigned long cpu_rate = 0; plat_time_init() local
51 if (cpu_rate == 0) { plat_time_init()
53 cpu_rate = simple_strtoul(s, &endp, 10); plat_time_init()
57 cpu_rate = 0; plat_time_init()
61 if (cpu_rate == 0) { plat_time_init()
63 cpu_rate = 1000 * simple_strtoul(s, &endp, 10); plat_time_init()
67 cpu_rate = 0; plat_time_init()
71 if (cpu_rate == 0) { plat_time_init()
74 cpu_rate = 400000000; plat_time_init()
76 cpu_rate = 25000000; plat_time_init()
78 cpu_rate = 150000000; plat_time_init()
82 "assuming %ld hz ...\n", cpu_rate); plat_time_init()
85 printk(KERN_WARNING "Clock rate set to %ld\n", cpu_rate); plat_time_init()
88 mips_hpt_frequency = cpu_rate/2; plat_time_init()
/linux-4.1.27/arch/mips/ralink/
H A Drt288x.c55 unsigned long cpu_rate, wmac_rate = 40000000; ralink_clk_init() local
61 cpu_rate = 250000000; ralink_clk_init()
64 cpu_rate = 266666667; ralink_clk_init()
67 cpu_rate = 280000000; ralink_clk_init()
70 cpu_rate = 300000000; ralink_clk_init()
74 ralink_clk_add("cpu", cpu_rate); ralink_clk_init()
75 ralink_clk_add("300100.timer", cpu_rate / 2); ralink_clk_init()
76 ralink_clk_add("300120.watchdog", cpu_rate / 2); ralink_clk_init()
77 ralink_clk_add("300500.uart", cpu_rate / 2); ralink_clk_init()
78 ralink_clk_add("300c00.uartlite", cpu_rate / 2); ralink_clk_init()
79 ralink_clk_add("400000.ethernet", cpu_rate / 2); ralink_clk_init()
H A Drt305x.c141 unsigned long cpu_rate, sys_rate, wdt_rate, uart_rate; ralink_clk_init() local
151 cpu_rate = 320000000; ralink_clk_init()
154 cpu_rate = 384000000; ralink_clk_init()
157 sys_rate = uart_rate = wdt_rate = cpu_rate / 3; ralink_clk_init()
163 cpu_rate = 384000000; ralink_clk_init()
166 cpu_rate = 400000000; ralink_clk_init()
169 sys_rate = wdt_rate = cpu_rate / 3; ralink_clk_init()
176 cpu_rate = 360000000; ralink_clk_init()
177 sys_rate = cpu_rate / 3; ralink_clk_init()
180 cpu_rate = 320000000; ralink_clk_init()
181 sys_rate = cpu_rate / 4; ralink_clk_init()
184 cpu_rate = 300000000; ralink_clk_init()
185 sys_rate = cpu_rate / 3; ralink_clk_init()
203 ralink_clk_add("cpu", cpu_rate); ralink_clk_init()
H A Drt3883.c78 unsigned long cpu_rate, sys_rate; ralink_clk_init() local
90 cpu_rate = 250000000; ralink_clk_init()
94 cpu_rate = 384000000; ralink_clk_init()
98 cpu_rate = 480000000; ralink_clk_init()
102 cpu_rate = 500000000; ralink_clk_init()
107 ralink_clk_add("cpu", cpu_rate); ralink_clk_init()
H A Dmt7620.c347 mt7620_get_sys_rate(unsigned long cpu_rate) mt7620_get_sys_rate() argument
359 return cpu_rate; mt7620_get_sys_rate()
363 return cpu_rate; mt7620_get_sys_rate()
365 return cpu_rate / div; mt7620_get_sys_rate()
373 unsigned long cpu_rate; ralink_clk_init() local
386 cpu_rate = MHZ(580); ralink_clk_init()
388 cpu_rate = MHZ(575); ralink_clk_init()
389 dram_rate = sys_rate = cpu_rate / 3; ralink_clk_init()
398 cpu_rate = mt7620_get_cpu_rate(pll_rate); ralink_clk_init()
400 sys_rate = mt7620_get_sys_rate(cpu_rate); ralink_clk_init()
412 RINT(cpu_rate), RFRAC(cpu_rate), ralink_clk_init()
420 ralink_clk_add("cpu", cpu_rate); ralink_clk_init()
/linux-4.1.27/arch/mips/ath79/
H A Dclock.c54 unsigned long cpu_rate; ar71xx_clocks_init() local
69 cpu_rate = freq / div; ar71xx_clocks_init()
75 ahb_rate = cpu_rate / div; ar71xx_clocks_init()
78 ath79_add_sys_clkdev("cpu", cpu_rate); ar71xx_clocks_init()
89 unsigned long cpu_rate; ar724x_clocks_init() local
105 cpu_rate = freq; ar724x_clocks_init()
111 ahb_rate = cpu_rate / div; ar724x_clocks_init()
114 ath79_add_sys_clkdev("cpu", cpu_rate); ar724x_clocks_init()
125 unsigned long cpu_rate; ar913x_clocks_init() local
138 cpu_rate = freq; ar913x_clocks_init()
144 ahb_rate = cpu_rate / div; ar913x_clocks_init()
147 ath79_add_sys_clkdev("cpu", cpu_rate); ar913x_clocks_init()
158 unsigned long cpu_rate; ar933x_clocks_init() local
174 cpu_rate = ref_rate; ar933x_clocks_init()
197 cpu_rate = freq / t; ar933x_clocks_init()
209 ath79_add_sys_clkdev("cpu", cpu_rate); ar933x_clocks_init()
240 unsigned long cpu_rate; ar934x_clocks_init() local
316 cpu_rate = ref_rate; ar934x_clocks_init()
318 cpu_rate = cpu_pll / (postdiv + 1); ar934x_clocks_init()
320 cpu_rate = ddr_pll / (postdiv + 1); ar934x_clocks_init()
343 ath79_add_sys_clkdev("cpu", cpu_rate); ar934x_clocks_init()
356 unsigned long cpu_rate; qca955x_clocks_init() local
403 cpu_rate = ref_rate; qca955x_clocks_init()
405 cpu_rate = ddr_pll / (postdiv + 1); qca955x_clocks_init()
407 cpu_rate = cpu_pll / (postdiv + 1); qca955x_clocks_init()
430 ath79_add_sys_clkdev("cpu", cpu_rate); qca955x_clocks_init()
/linux-4.1.27/arch/arm/mach-imx/
H A Dmxc.h189 u32 cpu_rate; member in struct:cpu_op

Completed in 154 milliseconds