Searched refs:clkcon (Results 1 – 2 of 2) sorted by relevance
107 u32 clkcon; in spdif_snd_txctrl() local111 clkcon = readl(regs + CLKCON) & CLKCTL_MASK; in spdif_snd_txctrl()113 writel(clkcon | CLKCTL_PWR_ON, regs + CLKCON); in spdif_snd_txctrl()115 writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON); in spdif_snd_txctrl()122 u32 clkcon; in spdif_set_sysclk() local126 clkcon = readl(spdif->regs + CLKCON); in spdif_set_sysclk()129 clkcon &= ~CLKCTL_MCLK_EXT; in spdif_set_sysclk()131 clkcon |= CLKCTL_MCLK_EXT; in spdif_set_sysclk()133 writel(clkcon, spdif->regs + CLKCON); in spdif_set_sysclk()183 u32 con, clkcon, cstas; in spdif_hw_params() local[all …]
155 assigned-clocks = <&clkcon 0>, <&pll 2>;160 In this example the <&pll 2> clock is set as parent of clock <&clkcon 0> and