Searched refs:clk_type (Results 1 - 4 of 4) sorted by relevance

/linux-4.1.27/drivers/phy/
H A Dphy-xgene.c546 enum clk_type_t clk_type; /* Input clock selection */ member in struct:xgene_phy_ctx
717 enum clk_type_t clk_type) xgene_phy_cfg_cmu_clk_type()
730 if (clk_type == CLK_EXT_DIFF) { xgene_phy_cfg_cmu_clk_type()
740 } else if (clk_type == CLK_INT_DIFF) { xgene_phy_cfg_cmu_clk_type()
750 } else if (clk_type == CLK_INT_SING) { xgene_phy_cfg_cmu_clk_type()
771 enum clk_type_t clk_type) xgene_phy_sata_cfg_cmu_core()
817 if (clk_type == CLK_EXT_DIFF) xgene_phy_sata_cfg_cmu_core()
1147 enum clk_type_t clk_type) xgene_phy_cal_rdy_chk()
1247 enum clk_type_t clk_type) xgene_phy_pdwn_force_vco()
1264 enum clk_type_t clk_type, int ssc_enable) xgene_phy_hw_init_sata()
1294 xgene_phy_cfg_cmu_clk_type(ctx, PHY_CMU, clk_type); xgene_phy_hw_init_sata()
1297 xgene_phy_sata_cfg_cmu_core(ctx, PHY_CMU, clk_type); xgene_phy_hw_init_sata()
1315 if (!xgene_phy_cal_rdy_chk(ctx, PHY_CMU, clk_type)) xgene_phy_hw_init_sata()
1318 xgene_phy_pdwn_force_vco(ctx, PHY_CMU, clk_type); xgene_phy_hw_init_sata()
1328 enum clk_type_t clk_type, xgene_phy_hw_initialize()
1333 dev_dbg(ctx->dev, "PHY init clk type %d\n", clk_type); xgene_phy_hw_initialize()
1336 rc = xgene_phy_hw_init_sata(ctx, clk_type, ssc_enable); xgene_phy_hw_initialize()
715 xgene_phy_cfg_cmu_clk_type(struct xgene_phy_ctx *ctx, enum cmu_type_t cmu_type, enum clk_type_t clk_type) xgene_phy_cfg_cmu_clk_type() argument
769 xgene_phy_sata_cfg_cmu_core(struct xgene_phy_ctx *ctx, enum cmu_type_t cmu_type, enum clk_type_t clk_type) xgene_phy_sata_cfg_cmu_core() argument
1145 xgene_phy_cal_rdy_chk(struct xgene_phy_ctx *ctx, enum cmu_type_t cmu_type, enum clk_type_t clk_type) xgene_phy_cal_rdy_chk() argument
1245 xgene_phy_pdwn_force_vco(struct xgene_phy_ctx *ctx, enum cmu_type_t cmu_type, enum clk_type_t clk_type) xgene_phy_pdwn_force_vco() argument
1263 xgene_phy_hw_init_sata(struct xgene_phy_ctx *ctx, enum clk_type_t clk_type, int ssc_enable) xgene_phy_hw_init_sata() argument
1327 xgene_phy_hw_initialize(struct xgene_phy_ctx *ctx, enum clk_type_t clk_type, int ssc_enable) xgene_phy_hw_initialize() argument
/linux-4.1.27/drivers/input/
H A Devdev.c59 int clk_type; member in struct:evdev_client
116 time = client->clk_type == EV_CLK_REAL ? __evdev_queue_syn_dropped()
118 client->clk_type == EV_CLK_MONO ? __evdev_queue_syn_dropped()
150 if (client->clk_type == clkid) evdev_set_clk_type()
156 client->clk_type = EV_CLK_REAL; evdev_set_clk_type()
159 client->clk_type = EV_CLK_MONO; evdev_set_clk_type()
162 client->clk_type = EV_CLK_BOOT; evdev_set_clk_type()
223 event.time = ktime_to_timeval(ev_time[client->clk_type]); evdev_pass_values()
/linux-4.1.27/drivers/clk/
H A Dclk-u300.c875 u32 clk_type; of_u300_syscon_clk_init() local
879 if (of_property_read_u32(np, "clock-type", &clk_type)) { of_u300_syscon_clk_init()
891 switch (clk_type) { of_u300_syscon_clk_init()
905 pr_err("unknown clock type %x specified\n", clk_type); of_u300_syscon_clk_init()
912 if (u3clk->type == clk_type && u3clk->id == clk_id) of_u300_syscon_clk_init()
929 if (clk_type == U300_CLK_TYPE_REST && clk_id == 5) of_u300_syscon_clk_init()
931 if (clk_type == U300_CLK_TYPE_REST && clk_id == 9) of_u300_syscon_clk_init()
933 if (clk_type == U300_CLK_TYPE_REST && clk_id == 12) of_u300_syscon_clk_init()
/linux-4.1.27/drivers/video/fbdev/aty/
H A Datyfb_base.c2344 u8 dac_type, dac_subtype, clk_type; aty_init() local
2352 clk_type = CLK_ATI18818_1; aty_init()
2361 clk_type = CLK_IBMRGB514; aty_init()
2382 switch (clk_type) { aty_init()

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