Searched refs:cha_num (Results 1 – 3 of 3) sorted by relevance
315 #define SXGBE_DMA_CHA_CTL_REG(cha_num) \ argument316 (SXGBE_DMA_CHA_BASE_REG + (cha_num * 0x80) + 0x00)319 #define SXGBE_DMA_CHA_TXCTL_REG(cha_num) \ argument320 (SXGBE_DMA_CHA_BASE_REG + (cha_num * 0x80) + 0x04)321 #define SXGBE_DMA_CHA_RXCTL_REG(cha_num) \ argument322 (SXGBE_DMA_CHA_BASE_REG + (cha_num * 0x80) + 0x08)323 #define SXGBE_DMA_CHA_TXDESC_HADD_REG(cha_num) \ argument324 (SXGBE_DMA_CHA_BASE_REG + (cha_num * 0x80) + 0x10)325 #define SXGBE_DMA_CHA_TXDESC_LADD_REG(cha_num) \ argument326 (SXGBE_DMA_CHA_BASE_REG + (cha_num * 0x80) + 0x14)[all …]
46 static void sxgbe_dma_channel_init(void __iomem *ioaddr, int cha_num, in sxgbe_dma_channel_init() argument53 reg_val = readl(ioaddr + SXGBE_DMA_CHA_CTL_REG(cha_num)); in sxgbe_dma_channel_init()57 writel(reg_val, ioaddr + SXGBE_DMA_CHA_CTL_REG(cha_num)); in sxgbe_dma_channel_init()59 reg_val = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_dma_channel_init()61 writel(reg_val, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_dma_channel_init()63 reg_val = readl(ioaddr + SXGBE_DMA_CHA_RXCTL_REG(cha_num)); in sxgbe_dma_channel_init()65 writel(reg_val, ioaddr + SXGBE_DMA_CHA_RXCTL_REG(cha_num)); in sxgbe_dma_channel_init()70 ioaddr + SXGBE_DMA_CHA_TXDESC_HADD_REG(cha_num)); in sxgbe_dma_channel_init()72 ioaddr + SXGBE_DMA_CHA_TXDESC_LADD_REG(cha_num)); in sxgbe_dma_channel_init()75 ioaddr + SXGBE_DMA_CHA_RXDESC_HADD_REG(cha_num)); in sxgbe_dma_channel_init()[all …]
26 void (*cha_init)(void __iomem *ioaddr, int cha_num, int fix_burst,