Searched refs:cfg_fcp_io_channel (Results 1 - 6 of 6) sorted by relevance

/linux-4.1.27/drivers/scsi/lpfc/
H A Dlpfc_debugfs.h372 if (fcp_wqidx >= phba->cfg_fcp_io_channel) lpfc_debug_dump_fcp_wq()
394 if (fcp_wqidx >= phba->cfg_fcp_io_channel) lpfc_debug_dump_fcp_cq()
398 for (fcp_cqidx = 0; fcp_cqidx < phba->cfg_fcp_io_channel; fcp_cqidx++) lpfc_debug_dump_fcp_cq()
402 if (fcp_cqidx >= phba->cfg_fcp_io_channel) lpfc_debug_dump_fcp_cq()
431 if (fcp_wqidx >= phba->cfg_fcp_io_channel) lpfc_debug_dump_hba_eq()
434 for (fcp_cqidx = 0; fcp_cqidx < phba->cfg_fcp_io_channel; fcp_cqidx++) lpfc_debug_dump_hba_eq()
438 if (fcp_cqidx >= phba->cfg_fcp_io_channel) lpfc_debug_dump_hba_eq()
555 for (wq_idx = 0; wq_idx < phba->cfg_fcp_io_channel; wq_idx++) lpfc_debug_dump_wq_by_id()
558 if (wq_idx < phba->cfg_fcp_io_channel) { lpfc_debug_dump_wq_by_id()
625 } while (++cq_idx < phba->cfg_fcp_io_channel); lpfc_debug_dump_cq_by_id()
627 if (cq_idx < phba->cfg_fcp_io_channel) { lpfc_debug_dump_cq_by_id()
658 for (eq_idx = 0; eq_idx < phba->cfg_fcp_io_channel; eq_idx++) { lpfc_debug_dump_eq_by_id()
663 if (eq_idx < phba->cfg_fcp_io_channel) { lpfc_debug_dump_eq_by_id()
H A Dlpfc_init.c5168 (LPFC_SLI3_MAX_RING + phba->cfg_fcp_io_channel) * lpfc_sli4_driver_resource_setup()
5417 (fof_vectors + phba->cfg_fcp_io_channel)), lpfc_sli4_driver_resource_setup()
5429 phba->cfg_fcp_io_channel)), GFP_KERNEL); lpfc_sli4_driver_resource_setup()
5469 if (rc >= phba->cfg_fcp_io_channel) lpfc_sli4_driver_resource_setup()
7071 int cfg_fcp_io_channel; lpfc_sli4_queue_verify() local
7082 cfg_fcp_io_channel = phba->cfg_fcp_io_channel; lpfc_sli4_queue_verify()
7093 if (i < cfg_fcp_io_channel) {
7098 cfg_fcp_io_channel, i);
7099 cfg_fcp_io_channel = i;
7102 if (cfg_fcp_io_channel + fof_vectors >
7111 phba->cfg_fcp_io_channel);
7117 cfg_fcp_io_channel,
7119 cfg_fcp_io_channel = phba->sli4_hba.max_cfg_param.max_eq -
7124 phba->cfg_fcp_io_channel = cfg_fcp_io_channel;
7162 if (!phba->cfg_fcp_io_channel) lpfc_sli4_queue_create()
7173 phba->cfg_fcp_io_channel), GFP_KERNEL); lpfc_sli4_queue_create()
7182 phba->cfg_fcp_io_channel), GFP_KERNEL); lpfc_sli4_queue_create()
7191 phba->cfg_fcp_io_channel), GFP_KERNEL); lpfc_sli4_queue_create()
7205 phba->cfg_fcp_io_channel), GFP_KERNEL); lpfc_sli4_queue_create()
7214 * Create HBA Event Queues (EQs). The cfg_fcp_io_channel specifies lpfc_sli4_queue_create()
7217 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++) { lpfc_sli4_queue_create()
7363 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++) { lpfc_sli4_queue_destroy()
7376 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++) { lpfc_sli4_queue_destroy()
7389 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++) { lpfc_sli4_queue_destroy()
7516 if (phba->cfg_fcp_io_channel && !phba->sli4_hba.hba_eq) { lpfc_sli4_queue_setup()
7522 for (fcp_eqidx = 0; fcp_eqidx < phba->cfg_fcp_io_channel; fcp_eqidx++) { lpfc_sli4_queue_setup()
7531 (phba->cfg_fcp_imax / phba->cfg_fcp_io_channel)); lpfc_sli4_queue_setup()
7554 for (fcp_cqidx = 0; fcp_cqidx < phba->cfg_fcp_io_channel; fcp_cqidx++) { lpfc_sli4_queue_setup()
7594 for (fcp_wqidx = 0; fcp_wqidx < phba->cfg_fcp_io_channel; fcp_wqidx++) { lpfc_sli4_queue_setup()
7763 for (fcp_eqidx = 0; fcp_eqidx < phba->cfg_fcp_io_channel; lpfc_sli4_queue_setup()
7819 for (fcp_qidx = 0; fcp_qidx < phba->cfg_fcp_io_channel; lpfc_sli4_queue_unset()
7829 for (fcp_qidx = 0; fcp_qidx < phba->cfg_fcp_io_channel; lpfc_sli4_queue_unset()
7835 for (fcp_qidx = 0; fcp_qidx < phba->cfg_fcp_io_channel; lpfc_sli4_queue_unset()
8741 if (chan >= phba->cfg_fcp_io_channel) lpfc_sli4_set_affinity()
8798 for (idx = 0; idx < phba->cfg_fcp_io_channel; idx++) lpfc_sli4_set_affinity()
8829 phba->cfg_fcp_io_channel; lpfc_sli4_set_affinity()
8908 for (index = 0; index < phba->cfg_fcp_io_channel; index++) lpfc_sli4_enable_msix()
8912 vectors = phba->cfg_fcp_io_channel; lpfc_sli4_enable_msix()
8967 if (vectors != phba->cfg_fcp_io_channel) { lpfc_sli4_enable_msix()
8971 phba->cfg_fcp_io_channel, vectors); lpfc_sli4_enable_msix()
8972 phba->cfg_fcp_io_channel = vectors; lpfc_sli4_enable_msix()
9007 for (index = 0; index < phba->cfg_fcp_io_channel; index++) { lpfc_sli4_disable_msix()
9061 for (index = 0; index < phba->cfg_fcp_io_channel; index++) { lpfc_sli4_enable_msi()
9145 for (index = 0; index < phba->cfg_fcp_io_channel; lpfc_sli4_enable_intr()
10385 adjusted_fcp_io_channel = phba->cfg_fcp_io_channel; lpfc_pci_probe_one_s4()
10386 phba->cfg_fcp_io_channel = adjusted_fcp_io_channel; lpfc_pci_probe_one_s4()
H A Dlpfc_debugfs.c2018 if (phba->sli4_hba.hba_eq && phba->cfg_fcp_io_channel) { lpfc_idiag_queinfo_read()
2019 cnt = phba->cfg_fcp_io_channel; lpfc_idiag_queinfo_read()
2598 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; lpfc_idiag_queacc_write()
2657 } while (++qidx < phba->cfg_fcp_io_channel); lpfc_idiag_queacc_write()
2689 for (qidx = 0; qidx < phba->cfg_fcp_io_channel; lpfc_idiag_queacc_write()
4679 for (fcp_wqidx = 0; fcp_wqidx < phba->cfg_fcp_io_channel; fcp_wqidx++) lpfc_debug_dump_all_queues()
4690 for (fcp_wqidx = 0; fcp_wqidx < phba->cfg_fcp_io_channel; fcp_wqidx++) lpfc_debug_dump_all_queues()
4696 for (fcp_wqidx = 0; fcp_wqidx < phba->cfg_fcp_io_channel; fcp_wqidx++) lpfc_debug_dump_all_queues()
H A Dlpfc.h717 uint32_t cfg_fcp_io_channel; member in struct:lpfc_hba
H A Dlpfc_sli.c3587 for (i = 0; i < phba->cfg_fcp_io_channel; i++) { lpfc_sli_abort_fcp_rings()
3624 for (i = 0; i < phba->cfg_fcp_io_channel; i++) { lpfc_sli_flush_fcp_rings()
5082 } while (++fcp_eqidx < phba->cfg_fcp_io_channel); lpfc_sli4_arm_cqeq_intr()
5089 for (fcp_eqidx = 0; fcp_eqidx < phba->cfg_fcp_io_channel; lpfc_sli4_arm_cqeq_intr()
6756 for (eqidx = 0; eqidx < phba->cfg_fcp_io_channel; eqidx++) lpfc_sli4_process_missed_mbox_completions()
8157 && phba->cfg_fcp_io_channel > 1) { lpfc_sli4_scmd_to_wqidx_distr()
8166 chann = (chann % phba->cfg_fcp_io_channel); lpfc_sli4_scmd_to_wqidx_distr()
9130 psli->num_rings += phba->cfg_fcp_io_channel; lpfc_sli_setup()
12724 for (fcp_eqidx = 0; fcp_eqidx < phba->cfg_fcp_io_channel; fcp_eqidx++) { lpfc_sli4_intr_handler()
12901 if (startq >= phba->cfg_fcp_io_channel) lpfc_modify_fcp_eq_delay()
12915 result = phba->cfg_fcp_imax / phba->cfg_fcp_io_channel; lpfc_modify_fcp_eq_delay()
12922 for (fcp_eqidx = startq; fcp_eqidx < phba->cfg_fcp_io_channel; lpfc_modify_fcp_eq_delay()
H A Dlpfc_attr.c4239 for (i = 0; i < phba->cfg_fcp_io_channel; i += LPFC_MAX_EQ_DELAY) lpfc_fcp_imax_store()

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