Searched refs:cdclk (Results 1 – 5 of 5) sorted by relevance
/linux-4.1.27/drivers/clk/samsung/ |
D | clk-s5pv210-audss.c | 74 struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio; in s5pv210_audss_clk_probe() local 111 cdclk = devm_clk_get(&pdev->dev, "iiscdclk0"); in s5pv210_audss_clk_probe() 125 if (!IS_ERR(cdclk)) in s5pv210_audss_clk_probe() 126 mout_i2s_p[1] = __clk_get_name(cdclk); in s5pv210_audss_clk_probe()
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D | clk-exynos-audss.c | 113 struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in; in exynos_audss_clk_probe() local 166 cdclk = devm_clk_get(&pdev->dev, "cdclk"); in exynos_audss_clk_probe() 168 if (!IS_ERR(cdclk)) in exynos_audss_clk_probe() 169 mout_i2s_p[1] = __clk_get_name(cdclk); in exynos_audss_clk_probe()
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/linux-4.1.27/Documentation/devicetree/bindings/clock/ |
D | clk-exynos-audss.txt | 24 - cdclk: External i2s clock, parent of mout_i2s. "cdclk0" is used if not 32 "pll_in", "cdclk", "sclk_audio", and "sclk_pcm_in" respectively. 74 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in", "cdclk";
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/linux-4.1.27/arch/arm/boot/dts/ |
D | s3c64xx-pinctrl.dtsi | 339 i2s0_cdclk: i2s0-cdclk { 351 i2s1_cdclk: i2s1-cdclk { 365 i2s2_cdclk: i2s2-cdclk {
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/linux-4.1.27/drivers/gpu/drm/i915/ |
D | intel_display.c | 5030 static void valleyview_set_cdclk(struct drm_device *dev, int cdclk) in valleyview_set_cdclk() argument 5037 if (cdclk >= 320000) /* jump to highest voltage for 400MHz too */ in valleyview_set_cdclk() 5039 else if (cdclk == 266667) in valleyview_set_cdclk() 5056 if (cdclk == 400000) { in valleyview_set_cdclk() 5059 divider = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1; in valleyview_set_cdclk() 5084 if (cdclk == 400000) in valleyview_set_cdclk() 5094 static void cherryview_set_cdclk(struct drm_device *dev, int cdclk) in cherryview_set_cdclk() argument 5101 switch (cdclk) { in cherryview_set_cdclk() 5108 MISSING_CASE(cdclk); in cherryview_set_cdclk() 5117 cmd = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1; in cherryview_set_cdclk()
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