Searched refs:cacheop (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/arch/arc/mm/
H A Dcache_arc700.c203 unsigned long sz, const int cacheop) __cache_line_loop()
209 if (cacheop == OP_INV_IC) { __cache_line_loop()
217 aux_cmd = cacheop & OP_INV ? ARC_REG_DC_IVDL : ARC_REG_DC_FLDL; __cache_line_loop()
299 * @cacheop = {OP_INV, OP_FLUSH, OP_FLUSH_N_INV}
303 static inline void __dc_entire_op(const int cacheop) __dc_entire_op() argument
308 ctrl_reg = __before_dc_op(cacheop); __dc_entire_op()
310 if (cacheop & OP_INV) /* Inv or flush-n-inv use same cmd reg */ __dc_entire_op()
317 __after_dc_op(cacheop, ctrl_reg); __dc_entire_op()
327 unsigned long sz, const int cacheop) __dc_line_op()
334 ctrl_reg = __before_dc_op(cacheop); __dc_line_op()
336 __cache_line_loop(paddr, vaddr, sz, cacheop); __dc_line_op()
338 __after_dc_op(cacheop, ctrl_reg); __dc_line_op()
345 #define __dc_entire_op(cacheop)
346 #define __dc_line_op(paddr, vaddr, sz, cacheop)
347 #define __dc_line_op_k(paddr, sz, cacheop)
202 __cache_line_loop(unsigned long paddr, unsigned long vaddr, unsigned long sz, const int cacheop) __cache_line_loop() argument
326 __dc_line_op(unsigned long paddr, unsigned long vaddr, unsigned long sz, const int cacheop) __dc_line_op() argument
/linux-4.1.27/arch/mips/include/asm/
H A Dr4kcache.h198 * cacheop so we use Hit_Writeback_Inv_D which is supported by all R4000-style

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