Searched refs:bus_clk_rate (Results 1 – 4 of 4) sorted by relevance
104 u32 bus_clk_rate; member133 u32 divisor = clk_get_rate(idev->i2c_clk) / idev->bus_clk_rate; in axxia_i2c_init()142 idev->bus_clk_rate, clk_mhz, divisor); in axxia_i2c_init()157 if (idev->bus_clk_rate <= 100000) { in axxia_i2c_init()491 of_property_read_u32(np, "clock-frequency", &idev->bus_clk_rate); in axxia_i2c_probe()492 if (idev->bus_clk_rate == 0) in axxia_i2c_probe()493 idev->bus_clk_rate = 100000; /* default clock rate */ in axxia_i2c_probe()
223 u32 bus_clk_rate, divider; in bcm2835_i2c_probe() local246 &bus_clk_rate); in bcm2835_i2c_probe()250 bus_clk_rate = 100000; in bcm2835_i2c_probe()253 divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), bus_clk_rate); in bcm2835_i2c_probe()
174 u32 bus_clk_rate; member612 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); in tegra_i2c_xfer_msg()753 &i2c_dev->bus_clk_rate); in tegra_i2c_probe()755 i2c_dev->bus_clk_rate = 100000; /* default clock rate */ in tegra_i2c_probe()791 i2c_dev->bus_clk_rate * clk_multiplier); in tegra_i2c_probe()
746 u32 bus_clk_rate; in at91_twi_probe() local794 &bus_clk_rate); in at91_twi_probe()796 bus_clk_rate = DEFAULT_TWI_CLK_HZ; in at91_twi_probe()798 at91_calc_twi_clock(dev, bus_clk_rate); in at91_twi_probe()