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/linux-4.1.27/arch/x86/include/asm/
Dcpufeature.h291 #define test_cpu_cap(c, bit) \ argument
292 test_bit(bit, (unsigned long *)((c)->x86_capability))
294 #define REQUIRED_MASK_BIT_SET(bit) \ argument
295 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \
296 (((bit)>>5)==1 && (1UL<<((bit)&31) & REQUIRED_MASK1)) || \
297 (((bit)>>5)==2 && (1UL<<((bit)&31) & REQUIRED_MASK2)) || \
298 (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) || \
299 (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) || \
300 (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) || \
301 (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) || \
[all …]
/linux-4.1.27/arch/nios2/include/asm/
Dasm-macros.h89 .macro BT reg1, reg2, bit
90 .if \bit > 31
93 .if \bit < 16
94 andi \reg1, \reg2, (1 << \bit)
96 andhi \reg1, \reg2, (1 << (\bit - 16))
108 .macro BTBZ reg1, reg2, bit, label
109 BT \reg1, \reg2, \bit
120 .macro BTBNZ reg1, reg2, bit, label
121 BT \reg1, \reg2, \bit
132 .macro BTC reg1, reg2, bit
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/mfd/
Dmc13xxx.txt55 sw1a : regulator SW1A (register 24, bit 0)
56 sw1b : regulator SW1B (register 25, bit 0)
57 sw2a : regulator SW2A (register 26, bit 0)
58 sw2b : regulator SW2B (register 27, bit 0)
59 sw3 : regulator SW3 (register 29, bit 20)
60 vaudio : regulator VAUDIO (register 32, bit 0)
61 viohi : regulator VIOHI (register 32, bit 3)
62 violo : regulator VIOLO (register 32, bit 6)
63 vdig : regulator VDIG (register 32, bit 9)
64 vgen : regulator VGEN (register 32, bit 12)
[all …]
/linux-4.1.27/arch/sh/boards/mach-x3proto/
Dilsel.c49 static inline unsigned int ilsel_offset(unsigned int bit) in ilsel_offset() argument
51 return ILSEL_LEVELS - bit - 1; in ilsel_offset()
54 static inline unsigned long mk_ilsel_addr(unsigned int bit) in mk_ilsel_addr() argument
56 return ILSEL_BASE + ((ilsel_offset(bit) >> 1) & ~0x1); in mk_ilsel_addr()
59 static inline unsigned int mk_ilsel_shift(unsigned int bit) in mk_ilsel_shift() argument
61 return (ilsel_offset(bit) & 0x3) << 2; in mk_ilsel_shift()
64 static void __ilsel_enable(ilsel_source_t set, unsigned int bit) in __ilsel_enable() argument
71 addr = mk_ilsel_addr(bit); in __ilsel_enable()
72 shift = mk_ilsel_shift(bit); in __ilsel_enable()
75 __func__, bit, addr, shift, set); in __ilsel_enable()
[all …]
/linux-4.1.27/drivers/memory/tegra/
Dtegra124.c29 .bit = 1,
43 .bit = 2,
57 .bit = 3,
71 .bit = 4,
85 .bit = 5,
99 .bit = 6,
113 .bit = 14,
127 .bit = 15,
141 .bit = 16,
155 .bit = 17,
[all …]
Dtegra30.c29 .bit = 1,
43 .bit = 2,
57 .bit = 3,
71 .bit = 4,
85 .bit = 5,
99 .bit = 6,
113 .bit = 7,
127 .bit = 8,
141 .bit = 9,
155 .bit = 10,
[all …]
Dtegra114.c29 .bit = 1,
43 .bit = 2,
57 .bit = 3,
71 .bit = 4,
85 .bit = 5,
99 .bit = 6,
113 .bit = 9,
127 .bit = 10,
141 .bit = 11,
155 .bit = 15,
[all …]
/linux-4.1.27/arch/metag/include/asm/
Dbitops.h12 static inline void set_bit(unsigned int bit, volatile unsigned long *p) in set_bit() argument
15 unsigned long mask = 1UL << (bit & 31); in set_bit()
17 p += bit >> 5; in set_bit()
25 static inline void clear_bit(unsigned int bit, volatile unsigned long *p) in clear_bit() argument
28 unsigned long mask = 1UL << (bit & 31); in clear_bit()
30 p += bit >> 5; in clear_bit()
38 static inline void change_bit(unsigned int bit, volatile unsigned long *p) in change_bit() argument
41 unsigned long mask = 1UL << (bit & 31); in change_bit()
43 p += bit >> 5; in change_bit()
51 static inline int test_and_set_bit(unsigned int bit, volatile unsigned long *p) in test_and_set_bit() argument
[all …]
/linux-4.1.27/fs/omfs/
Dbitmap.c26 int addrlen, int bit, int max) in count_run() argument
32 x = find_next_bit(*addr, nbits, bit); in count_run()
33 count += x - bit; in count_run()
38 bit = 0; in count_run()
48 int nbits, int bit, int count, int set) in set_run() argument
60 for (i = 0; i < count; i++, bit++) { in set_run()
61 if (bit >= nbits) { in set_run()
62 bit = 0; in set_run()
73 set_bit(bit, sbi->s_imap[map]); in set_run()
74 set_bit(bit, (unsigned long *)bh->b_data); in set_run()
[all …]
/linux-4.1.27/drivers/acpi/pmic/
Dintel_pmic_xpower.c30 .bit = 0x05,
35 .bit = 0x06,
40 .bit = 0x07,
45 .bit = 0x03,
50 .bit = 0x04,
55 .bit = 0x05,
60 .bit = 0x06,
65 .bit = 0x00,
70 .bit = 0x01,
75 .bit = 0x02,
[all …]
Dintel_pmic_crc.c31 .bit = 0x00,
36 .bit = 0x00,
92 int bit, u64 *value) in intel_crc_pmic_get_power() argument
99 *value = (data & PWR_SOURCE_SELECT) && (data & BIT(bit)) ? 1 : 0; in intel_crc_pmic_get_power()
104 int bit, bool on) in intel_crc_pmic_update_power() argument
112 data |= PWR_SOURCE_SELECT | BIT(bit); in intel_crc_pmic_update_power()
114 data &= ~BIT(bit); in intel_crc_pmic_update_power()
Dintel_pmic.c33 int count, int *reg, int *bit) in pmic_get_reg_bit() argument
40 if (bit) in pmic_get_reg_bit()
41 *bit = table[i].bit; in pmic_get_reg_bit()
55 int reg, bit, result; in intel_pmic_power_handler() local
64 d->power_table_count, &reg, &bit); in intel_pmic_power_handler()
71 d->get_power(regmap, reg, bit, value64) : in intel_pmic_power_handler()
72 d->update_power(regmap, reg, bit, *value64 == 1); in intel_pmic_power_handler()
Dintel_pmic.h7 int bit; /* control bit for power */ member
11 int (*get_power)(struct regmap *r, int reg, int bit, u64 *value);
12 int (*update_power)(struct regmap *r, int reg, int bit, bool on);
/linux-4.1.27/drivers/net/wireless/zd1211rw/
Dzd_rf_rf2959.c51 static int bit(u32 rw, int bit)
53 return bits(rw, bit, bit);
66 bits(rw, 14, 15), bit(rw, 3), bit(rw, 2), bit(rw, 1),
67 bit(rw, 0));
73 bit(rw, 17), bit(rw, 16), bit(rw, 15), bit(rw, 14),
74 bit(rw, 13), bit(rw, 12), bit(rw, 11), bit(rw, 10),
92 bit(rw, 17), bit(rw, 16), bit(rw, 15), bit(rw, 14),
93 bit(rw, 13), bit(rw, 12), bit(rw, 11), bit(rw, 10),
116 bit(rw, 17), bits(rw, 15, 16), bits(rw, 10, 14),
117 bits(rw, 7, 9), bits(rw, 4, 6), bit(rw, 3), bit(rw, 2),
[all …]
/linux-4.1.27/fs/ocfs2/
Dheartbeat.c44 int bit);
46 int bit);
85 int bit) in __ocfs2_node_map_set_bit() argument
87 set_bit(bit, map->map); in __ocfs2_node_map_set_bit()
92 int bit) in ocfs2_node_map_set_bit() argument
94 if (bit==-1) in ocfs2_node_map_set_bit()
96 BUG_ON(bit >= map->num_nodes); in ocfs2_node_map_set_bit()
98 __ocfs2_node_map_set_bit(map, bit); in ocfs2_node_map_set_bit()
103 int bit) in __ocfs2_node_map_clear_bit() argument
105 clear_bit(bit, map->map); in __ocfs2_node_map_clear_bit()
[all …]
Docfs2.h856 static inline void _ocfs2_set_bit(unsigned int bit, unsigned long *bitmap) in _ocfs2_set_bit() argument
858 __set_bit_le(bit, bitmap); in _ocfs2_set_bit()
860 #define ocfs2_set_bit(bit, addr) _ocfs2_set_bit((bit), (unsigned long *)(addr)) argument
862 static inline void _ocfs2_clear_bit(unsigned int bit, unsigned long *bitmap) in _ocfs2_clear_bit() argument
864 __clear_bit_le(bit, bitmap); in _ocfs2_clear_bit()
866 #define ocfs2_clear_bit(bit, addr) _ocfs2_clear_bit((bit), (unsigned long *)(addr)) argument
872 static inline void *correct_addr_and_bit_unaligned(int *bit, void *addr) in correct_addr_and_bit_unaligned() argument
875 *bit += ((unsigned long) addr & 7UL) << 3; in correct_addr_and_bit_unaligned()
878 *bit += ((unsigned long) addr & 3UL) << 3; in correct_addr_and_bit_unaligned()
886 static inline void ocfs2_set_bit_unaligned(int bit, void *bitmap) in ocfs2_set_bit_unaligned() argument
[all …]
Dheartbeat.h37 int bit);
40 int bit);
43 int bit);
/linux-4.1.27/arch/alpha/kernel/
Dsys_sable.c42 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
43 void (*ack_irq_hw)(unsigned long bit);
93 sable_update_irq_hw(unsigned long bit, unsigned long mask) in sable_update_irq_hw() argument
97 if (bit >= 16) { in sable_update_irq_hw()
100 } else if (bit >= 8) { in sable_update_irq_hw()
109 sable_ack_irq_hw(unsigned long bit) in sable_ack_irq_hw() argument
113 if (bit >= 16) { in sable_ack_irq_hw()
115 val1 = 0xE0 | (bit - 16); in sable_ack_irq_hw()
117 } else if (bit >= 8) { in sable_ack_irq_hw()
119 val1 = 0xE0 | (bit - 8); in sable_ack_irq_hw()
[all …]
/linux-4.1.27/arch/xtensa/include/asm/
Dbitops.h103 static inline void set_bit(unsigned int bit, volatile unsigned long *p) in set_bit() argument
106 unsigned long mask = 1UL << (bit & 31); in set_bit()
108 p += bit >> 5; in set_bit()
121 static inline void clear_bit(unsigned int bit, volatile unsigned long *p) in clear_bit() argument
124 unsigned long mask = 1UL << (bit & 31); in clear_bit()
126 p += bit >> 5; in clear_bit()
139 static inline void change_bit(unsigned int bit, volatile unsigned long *p) in change_bit() argument
142 unsigned long mask = 1UL << (bit & 31); in change_bit()
144 p += bit >> 5; in change_bit()
158 test_and_set_bit(unsigned int bit, volatile unsigned long *p) in test_and_set_bit() argument
[all …]
/linux-4.1.27/arch/arm/mach-shmobile/
Dplatsmp-apmu.c30 int bit; member
37 static int __maybe_unused apmu_power_on(void __iomem *p, int bit) in apmu_power_on() argument
40 writel_relaxed(BIT(bit), p + WUPCR_OFFS); in apmu_power_on()
49 static int apmu_power_off(void __iomem *p, int bit) in apmu_power_off() argument
52 writel_relaxed(3, p + CPUNCR_OFFS(bit)); in apmu_power_off()
56 static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit) in apmu_power_off_poll() argument
61 if (((readl_relaxed(p + PSTR_OFFS) >> (bit * 4)) & 0x03) == 3) in apmu_power_off_poll()
74 return p ? fn(p, apmu_cpus[cpu].bit) : -EINVAL; in apmu_wrap()
77 static void apmu_init_cpu(struct resource *res, int cpu, int bit) in apmu_init_cpu() argument
83 apmu_cpus[cpu].bit = bit; in apmu_init_cpu()
[all …]
/linux-4.1.27/drivers/auxdisplay/
Dks0108.c73 #define bit(n) (((unsigned char)1)<<(n)) macro
83 parport_write_control(ks0108_parport, byte ^ (bit(0) | bit(1) | bit(3))); in ks0108_writecontrol()
88 ks0108_writedata((state ? bit(0) : 0) | bit(1) | bit(2) | bit(3) | bit(4) | bit(5)); in ks0108_displaystate()
93 ks0108_writedata(min(startline,(unsigned char)63) | bit(6) | bit(7)); in ks0108_startline()
98 ks0108_writedata(min(address,(unsigned char)63) | bit(6)); in ks0108_address()
103 ks0108_writedata(min(page,(unsigned char)7) | bit(3) | bit(4) | bit(5) | bit(7)); in ks0108_page()
/linux-4.1.27/security/selinux/ss/
Debitmap.h66 unsigned int bit) in ebitmap_next_positive() argument
70 ofs = find_next_bit((*n)->maps, EBITMAP_SIZE, bit - (*n)->startbit + 1); in ebitmap_next_positive()
82 #define EBITMAP_NODE_INDEX(node, bit) \ argument
83 (((bit) - (node)->startbit) / EBITMAP_UNIT_SIZE)
84 #define EBITMAP_NODE_OFFSET(node, bit) \ argument
85 (((bit) - (node)->startbit) % EBITMAP_UNIT_SIZE)
88 unsigned int bit) in ebitmap_node_get_bit() argument
90 unsigned int index = EBITMAP_NODE_INDEX(n, bit); in ebitmap_node_get_bit()
91 unsigned int ofs = EBITMAP_NODE_OFFSET(n, bit); in ebitmap_node_get_bit()
100 unsigned int bit) in ebitmap_node_set_bit() argument
[all …]
Debitmap.c239 int ebitmap_get_bit(struct ebitmap *e, unsigned long bit) in ebitmap_get_bit() argument
243 if (e->highbit < bit) in ebitmap_get_bit()
247 while (n && (n->startbit <= bit)) { in ebitmap_get_bit()
248 if ((n->startbit + EBITMAP_SIZE) > bit) in ebitmap_get_bit()
249 return ebitmap_node_get_bit(n, bit); in ebitmap_get_bit()
256 int ebitmap_set_bit(struct ebitmap *e, unsigned long bit, int value) in ebitmap_set_bit() argument
262 while (n && n->startbit <= bit) { in ebitmap_set_bit()
263 if ((n->startbit + EBITMAP_SIZE) > bit) { in ebitmap_set_bit()
265 ebitmap_node_set_bit(n, bit); in ebitmap_set_bit()
269 ebitmap_node_clr_bit(n, bit); in ebitmap_set_bit()
[all …]
/linux-4.1.27/arch/powerpc/sysdev/
Dipic.c41 .bit = 16,
48 .bit = 17,
55 .bit = 18,
62 .bit = 19,
69 .bit = 20,
76 .bit = 21,
83 .bit = 22,
90 .bit = 23,
97 .bit = 24,
104 .bit = 25,
[all …]
Dcpm2_pic.c81 int bit, word; in cpm2_mask_irq() local
84 bit = irq_to_siubit[irq_nr]; in cpm2_mask_irq()
87 ppc_cached_irq_mask[word] &= ~(1 << bit); in cpm2_mask_irq()
93 int bit, word; in cpm2_unmask_irq() local
96 bit = irq_to_siubit[irq_nr]; in cpm2_unmask_irq()
99 ppc_cached_irq_mask[word] |= 1 << bit; in cpm2_unmask_irq()
105 int bit, word; in cpm2_ack() local
108 bit = irq_to_siubit[irq_nr]; in cpm2_ack()
111 out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit); in cpm2_ack()
116 int bit, word; in cpm2_end_irq() local
[all …]
/linux-4.1.27/arch/s390/include/asm/
Dctl_reg.h31 static inline void __ctl_set_bit(unsigned int cr, unsigned int bit) in __ctl_set_bit() argument
36 reg |= 1UL << bit; in __ctl_set_bit()
40 static inline void __ctl_clear_bit(unsigned int cr, unsigned int bit) in __ctl_clear_bit() argument
45 reg &= ~(1UL << bit); in __ctl_clear_bit()
49 void smp_ctl_set_bit(int cr, int bit);
50 void smp_ctl_clear_bit(int cr, int bit);
68 # define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit) argument
69 # define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit) argument
71 # define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit) argument
72 # define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit) argument
Dairq.h48 void airq_iv_free(struct airq_iv *iv, unsigned long bit, unsigned long num);
57 static inline void airq_iv_free_bit(struct airq_iv *iv, unsigned long bit) in airq_iv_free_bit() argument
59 airq_iv_free(iv, bit, 1); in airq_iv_free_bit()
67 static inline void airq_iv_lock(struct airq_iv *iv, unsigned long bit) in airq_iv_lock() argument
70 bit_spin_lock(bit ^ be_to_le, iv->bitlock); in airq_iv_lock()
73 static inline void airq_iv_unlock(struct airq_iv *iv, unsigned long bit) in airq_iv_unlock() argument
76 bit_spin_unlock(bit ^ be_to_le, iv->bitlock); in airq_iv_unlock()
79 static inline void airq_iv_set_data(struct airq_iv *iv, unsigned long bit, in airq_iv_set_data() argument
82 iv->data[bit] = data; in airq_iv_set_data()
86 unsigned long bit) in airq_iv_get_data() argument
[all …]
Dbitops.h329 unsigned long bit = 0; in __flogr() local
335 bit += 32; in __flogr()
339 bit += 16; in __flogr()
343 bit += 8; in __flogr()
347 bit += 4; in __flogr()
351 bit += 2; in __flogr()
355 bit += 1; in __flogr()
357 return bit; in __flogr()
359 register unsigned long bit asm("4") = word; in __flogr()
364 : [bit] "+d" (bit), [out] "=d" (out) : : "cc"); in __flogr()
[all …]
/linux-4.1.27/include/linux/
Dbitops.h38 #define for_each_set_bit(bit, addr, size) \ argument
39 for ((bit) = find_first_bit((addr), (size)); \
40 (bit) < (size); \
41 (bit) = find_next_bit((addr), (size), (bit) + 1))
44 #define for_each_set_bit_from(bit, addr, size) \ argument
45 for ((bit) = find_next_bit((addr), (size), (bit)); \
46 (bit) < (size); \
47 (bit) = find_next_bit((addr), (size), (bit) + 1))
49 #define for_each_clear_bit(bit, addr, size) \ argument
50 for ((bit) = find_first_zero_bit((addr), (size)); \
[all …]
Dwait.h66 #define __WAIT_BIT_KEY_INITIALIZER(word, bit) \ argument
67 { .flags = word, .bit_nr = bit, }
930 #define DEFINE_WAIT_BIT(name, word, bit) \ argument
932 .key = __WAIT_BIT_KEY_INITIALIZER(word, bit), \
972 wait_on_bit(void *word, int bit, unsigned mode) in wait_on_bit() argument
975 if (!test_bit(bit, word)) in wait_on_bit()
977 return out_of_line_wait_on_bit(word, bit, in wait_on_bit()
997 wait_on_bit_io(void *word, int bit, unsigned mode) in wait_on_bit_io() argument
1000 if (!test_bit(bit, word)) in wait_on_bit_io()
1002 return out_of_line_wait_on_bit(word, bit, in wait_on_bit_io()
[all …]
/linux-4.1.27/arch/mips/alchemy/common/
Dirq.c290 unsigned int bit = d->irq - AU1000_INTC0_INT_BASE; in au1x_ic0_unmask() local
293 __raw_writel(1 << bit, base + IC_MASKSET); in au1x_ic0_unmask()
294 __raw_writel(1 << bit, base + IC_WAKESET); in au1x_ic0_unmask()
300 unsigned int bit = d->irq - AU1000_INTC1_INT_BASE; in au1x_ic1_unmask() local
303 __raw_writel(1 << bit, base + IC_MASKSET); in au1x_ic1_unmask()
304 __raw_writel(1 << bit, base + IC_WAKESET); in au1x_ic1_unmask()
310 unsigned int bit = d->irq - AU1000_INTC0_INT_BASE; in au1x_ic0_mask() local
313 __raw_writel(1 << bit, base + IC_MASKCLR); in au1x_ic0_mask()
314 __raw_writel(1 << bit, base + IC_WAKECLR); in au1x_ic0_mask()
320 unsigned int bit = d->irq - AU1000_INTC1_INT_BASE; in au1x_ic1_mask() local
[all …]
/linux-4.1.27/arch/mips/include/asm/
Dbitops.h71 int bit = nr & SZLONG_MASK; in set_bit() local
83 : "ir" (1UL << bit), GCC_OFF_SMALL_ASM() (*m)); in set_bit()
85 } else if (kernel_uses_llsc && __builtin_constant_p(bit)) { in set_bit()
92 : "ir" (bit), "r" (~0)); in set_bit()
104 : "ir" (1UL << bit)); in set_bit()
123 int bit = nr & SZLONG_MASK; in clear_bit() local
135 : "ir" (~(1UL << bit))); in clear_bit()
137 } else if (kernel_uses_llsc && __builtin_constant_p(bit)) { in clear_bit()
144 : "ir" (bit)); in clear_bit()
156 : "ir" (~(1UL << bit))); in clear_bit()
[all …]
/linux-4.1.27/arch/arm/boot/dts/
Domap24xx-clocks.dtsi15 ti,bit-shift = <2>;
29 ti,bit-shift = <6>;
81 ti,bit-shift = <23>;
97 ti,bit-shift = <6>;
106 ti,bit-shift = <6>;
135 ti,bit-shift = <2>;
145 ti,bit-shift = <6>;
155 ti,bit-shift = <5>;
183 ti,bit-shift = <3>;
199 ti,bit-shift = <7>;
[all …]
Domap44xx-clocks.dtsi27 ti,bit-shift = <8>;
53 ti,bit-shift = <10>;
157 ti,invert-autoidle-bit;
181 ti,bit-shift = <24>;
194 ti,invert-autoidle-bit;
201 ti,bit-shift = <23>;
226 ti,invert-autoidle-bit;
237 ti,invert-autoidle-bit;
256 ti,invert-autoidle-bit;
293 ti,invert-autoidle-bit;
[all …]
Domap3xxx-clocks.dtsi28 ti,bit-shift = <6>;
39 ti,bit-shift = <7>;
88 ti,bit-shift = <4>;
102 ti,bit-shift = <2>;
116 ti,bit-shift = <6>;
143 ti,bit-shift = <2>;
224 ti,bit-shift = <0x1b>;
226 ti,set-bit-to-disable;
248 ti,bit-shift = <16>;
266 ti,bit-shift = <0xc>;
[all …]
Domap54xx-clocks.dtsi21 ti,bit-shift = <8>;
41 ti,bit-shift = <10>;
148 ti,bit-shift = <24>;
174 ti,bit-shift = <23>;
309 ti,bit-shift = <23>;
388 ti,bit-shift = <4>;
406 ti,bit-shift = <8>;
416 ti,bit-shift = <11>;
424 ti,bit-shift = <24>;
433 ti,bit-shift = <26>;
[all …]
Domap2430-clocks.dtsi29 ti,bit-shift = <2>;
43 ti,bit-shift = <4>;
59 ti,bit-shift = <0>;
67 ti,bit-shift = <5>;
83 ti,bit-shift = <0>;
105 ti,bit-shift = <1>;
113 ti,bit-shift = <3>;
121 ti,bit-shift = <3>;
129 ti,bit-shift = <4>;
137 ti,bit-shift = <4>;
[all …]
Ddra7xx-clocks.dtsi212 ti,invert-autoidle-bit;
232 ti,invert-autoidle-bit;
243 ti,invert-autoidle-bit;
250 ti,bit-shift = <23>;
275 ti,invert-autoidle-bit;
301 ti,invert-autoidle-bit;
324 ti,bit-shift = <23>;
343 ti,invert-autoidle-bit;
358 ti,bit-shift = <23>;
377 ti,invert-autoidle-bit;
[all …]
Domap34xx-omap36xx-clocks.dtsi23 ti,bit-shift = <3>;
32 ti,bit-shift = <2>;
40 ti,bit-shift = <1>;
48 ti,bit-shift = <0>;
55 ti,bit-shift = <0>;
65 ti,bit-shift = <0>;
73 ti,bit-shift = <1>;
89 ti,bit-shift = <4>;
97 ti,bit-shift = <29>;
105 ti,bit-shift = <26>;
[all …]
Domap2420-clocks.dtsi16 ti,bit-shift = <15>;
24 ti,bit-shift = <8>;
38 ti,bit-shift = <11>;
48 ti,bit-shift = <1>;
56 ti,bit-shift = <5>;
72 ti,bit-shift = <10>;
80 ti,bit-shift = <8>;
103 ti,bit-shift = <8>;
111 ti,bit-shift = <28>;
119 ti,bit-shift = <28>;
[all …]
Domap36xx-clocks.dtsi22 ti,bit-shift = <0x1e>;
25 ti,set-bit-to-disable;
32 ti,bit-shift = <0x1b>;
34 ti,set-bit-to-disable;
41 ti,bit-shift = <0xc>;
43 ti,set-bit-to-disable;
50 ti,bit-shift = <0x1c>;
52 ti,set-bit-to-disable;
59 ti,bit-shift = <0x1f>;
61 ti,set-bit-to-disable;
[all …]
Domap3430es1-clocks.dtsi16 ti,bit-shift = <0>;
41 ti,bit-shift = <1>;
49 ti,bit-shift = <2>;
57 ti,bit-shift = <3>;
65 ti,bit-shift = <5>;
72 ti,bit-shift = <0>;
80 ti,bit-shift = <8>;
104 ti,bit-shift = <4>;
112 ti,bit-shift = <8>;
128 ti,bit-shift = <0>;
[all …]
Dam35xx-clocks.dtsi16 ti,bit-shift = <1>;
24 ti,bit-shift = <9>;
32 ti,bit-shift = <2>;
40 ti,bit-shift = <10>;
48 ti,bit-shift = <0>;
56 ti,bit-shift = <8>;
64 ti,bit-shift = <3>;
73 ti,bit-shift = <4>;
93 ti,bit-shift = <23>;
101 ti,bit-shift = <23>;
Dam43xx-clocks.dtsi15 ti,bit-shift = <31>;
23 ti,bit-shift = <29>;
31 ti,bit-shift = <22>;
111 ti,bit-shift = <0>;
119 ti,bit-shift = <1>;
127 ti,bit-shift = <2>;
135 ti,bit-shift = <4>;
143 ti,bit-shift = <5>;
151 ti,bit-shift = <6>;
219 ti,invert-autoidle-bit;
[all …]
Domap36xx-am35xx-omap3430es2plus-clocks.dtsi50 ti,bit-shift = <1>;
112 ti,bit-shift = <0>;
120 ti,bit-shift = <0>;
128 ti,bit-shift = <1>;
136 ti,bit-shift = <2>;
144 ti,bit-shift = <2>;
152 ti,bit-shift = <30>;
160 ti,bit-shift = <30>;
167 ti,bit-shift = <0>;
177 ti,bit-shift = <0>;
[all …]
Dam33xx-clocks.dtsi15 ti,bit-shift = <22>;
103 ti,bit-shift = <0>;
111 ti,bit-shift = <1>;
119 ti,bit-shift = <2>;
299 ti,bit-shift = <1>;
323 ti,bit-shift = <1>;
346 ti,bit-shift = <1>;
403 ti,bit-shift = <8>;
419 ti,bit-shift = <1>;
504 ti,bit-shift = <18>;
[all …]
Dwm8750.dtsi155 enable-bit = <24>;
163 enable-bit = <25>;
171 enable-bit = <26>;
179 enable-bit = <27>;
187 enable-bit = <28>;
195 enable-bit = <29>;
204 enable-bit = <17>;
214 enable-bit = <0>;
223 enable-bit = <8>;
232 enable-bit = <9>;
Dintegrator.dtsi14 compatible = "register-bit-led";
102 compatible = "register-bit-led";
110 compatible = "register-bit-led";
117 compatible = "register-bit-led";
124 compatible = "register-bit-led";
/linux-4.1.27/Documentation/devicetree/bindings/crypto/
Dfsl-sec2.txt14 (EUs) are available. It's a single 32-bit cell. EU information
18 bit 0 = reserved - should be 0
19 bit 1 = set if SEC has the ARC4 EU (AFEU)
20 bit 2 = set if SEC has the DES/3DES EU (DEU)
21 bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
22 bit 4 = set if SEC has the random number generator EU (RNG)
23 bit 5 = set if SEC has the public key EU (PKEU)
24 bit 6 = set if SEC has the AES EU (AESU)
25 bit 7 = set if SEC has the Kasumi EU (KEU)
26 bit 8 = set if SEC has the CRC EU (CRCU)
[all …]
/linux-4.1.27/tools/include/linux/
Dbitops.h35 #define for_each_set_bit(bit, addr, size) \ argument
36 for ((bit) = find_first_bit((addr), (size)); \
37 (bit) < (size); \
38 (bit) = find_next_bit((addr), (size), (bit) + 1))
41 #define for_each_set_bit_from(bit, addr, size) \ argument
42 for ((bit) = find_next_bit((addr), (size), (bit)); \
43 (bit) < (size); \
44 (bit) = find_next_bit((addr), (size), (bit) + 1))
/linux-4.1.27/arch/mips/lib/
Dbitops.c23 unsigned bit = nr & SZLONG_MASK; in __mips_set_bit() local
28 mask = 1UL << bit; in __mips_set_bit()
45 unsigned bit = nr & SZLONG_MASK; in __mips_clear_bit() local
50 mask = 1UL << bit; in __mips_clear_bit()
67 unsigned bit = nr & SZLONG_MASK; in __mips_change_bit() local
72 mask = 1UL << bit; in __mips_change_bit()
90 unsigned bit = nr & SZLONG_MASK; in __mips_test_and_set_bit() local
96 mask = 1UL << bit; in __mips_test_and_set_bit()
116 unsigned bit = nr & SZLONG_MASK; in __mips_test_and_set_bit_lock() local
122 mask = 1UL << bit; in __mips_test_and_set_bit_lock()
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/gpio/
Dgpio-74xx-mmio.txt5 "ti,741g125": for 741G125 (1-bit Input),
6 "ti,741g174": for 741G74 (1-bit Output),
7 "ti,742g125": for 742G125 (2-bit Input),
8 "ti,7474" : for 7474 (2-bit Output),
9 "ti,74125" : for 74125 (4-bit Input),
10 "ti,74175" : for 74175 (4-bit Output),
11 "ti,74365" : for 74365 (6-bit Input),
12 "ti,74174" : for 74174 (6-bit Output),
13 "ti,74244" : for 74244 (8-bit Input),
14 "ti,74273" : for 74273 (8-bit Output),
[all …]
Dspear_spics.txt20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
27 All the above bit offsets are within peripcfg register.
35 st-spics,sw-enable-bit = <12>;
36 st-spics,cs-value-bit = <11>;
/linux-4.1.27/drivers/s390/cio/
Dairq.c199 unsigned long bit, i, flags; in airq_iv_alloc() local
204 bit = find_first_bit_inv(iv->avail, iv->bits); in airq_iv_alloc()
205 while (bit + num <= iv->bits) { in airq_iv_alloc()
207 if (!test_bit_inv(bit + i, iv->avail)) in airq_iv_alloc()
212 clear_bit_inv(bit + i, iv->avail); in airq_iv_alloc()
213 if (bit + num >= iv->end) in airq_iv_alloc()
214 iv->end = bit + num + 1; in airq_iv_alloc()
217 bit = find_next_bit_inv(iv->avail, iv->bits, bit + i + 1); in airq_iv_alloc()
219 if (bit + num > iv->bits) in airq_iv_alloc()
220 bit = -1UL; in airq_iv_alloc()
[all …]
/linux-4.1.27/drivers/media/platform/vivid/
Dvivid-vbi-gen.c41 unsigned bit = 0; in vivid_vbi_gen_wss_raw() local
45 wss_insert(wss + bit, 0x1f1c71c7, 29); bit += 29; in vivid_vbi_gen_wss_raw()
46 wss_insert(wss + bit, 0x1e3c1f, 24); bit += 24; in vivid_vbi_gen_wss_raw()
49 for (i = 0; i <= 13; i++, bit += 6) in vivid_vbi_gen_wss_raw()
50 wss_insert(wss + bit, (wss_data & (1 << i)) ? one : zero, 6); in vivid_vbi_gen_wss_raw()
52 for (i = 0, bit = 0; bit < sizeof(wss); bit++) { in vivid_vbi_gen_wss_raw()
53 unsigned n = ((bit + 1) * sampling_rate) / rate; in vivid_vbi_gen_wss_raw()
56 buf[i++] = wss[bit]; in vivid_vbi_gen_wss_raw()
65 unsigned bit = 0; in vivid_vbi_gen_teletext_raw() local
72 for (i = 0, bit = 0; bit < sizeof(teletext) * 8; bit++) { in vivid_vbi_gen_teletext_raw()
[all …]
/linux-4.1.27/drivers/gpio/
Dgpio-sta2x11.c79 u32 bit = __bit(nr); in gsta_gpio_set() local
82 writel(bit, &regs->dats); in gsta_gpio_set()
84 writel(bit, &regs->datc); in gsta_gpio_set()
91 u32 bit = __bit(nr); in gsta_gpio_get() local
93 return readl(&regs->dat) & bit; in gsta_gpio_get()
101 u32 bit = __bit(nr); in gsta_gpio_direction_output() local
103 writel(bit, &regs->dirs); in gsta_gpio_direction_output()
106 writel(bit, &regs->dats); in gsta_gpio_direction_output()
108 writel(bit, &regs->datc); in gsta_gpio_direction_output()
116 u32 bit = __bit(nr); in gsta_gpio_direction_input() local
[all …]
Dgpio-it8761e.c81 u8 bit; in it8761e_gpio_get() local
83 bit = gpio_num % 8; in it8761e_gpio_get()
86 return !!(inb(reg) & (1 << bit)); in it8761e_gpio_get()
92 u8 io_reg, bit; in it8761e_gpio_direction_in() local
94 bit = gpio_num % 8; in it8761e_gpio_direction_in()
104 if (curr_dirs & (1 << bit)) in it8761e_gpio_direction_in()
105 write_reg(curr_dirs & ~(1 << bit), io_reg, port); in it8761e_gpio_direction_in()
116 u8 curr_vals, bit; in it8761e_gpio_set() local
119 bit = gpio_num % 8; in it8761e_gpio_set()
126 outb(curr_vals | (1 << bit) , reg); in it8761e_gpio_set()
[all …]
Dgpio-adp5588.c71 unsigned bit = ADP5588_BIT(off); in adp5588_gpio_get_value() local
76 if (dev->dir[bank] & bit) in adp5588_gpio_get_value()
83 return !!(val & bit); in adp5588_gpio_get_value()
89 unsigned bank, bit; in adp5588_gpio_set_value() local
94 bit = ADP5588_BIT(off); in adp5588_gpio_set_value()
98 dev->dat_out[bank] |= bit; in adp5588_gpio_set_value()
100 dev->dat_out[bank] &= ~bit; in adp5588_gpio_set_value()
128 unsigned bank, bit; in adp5588_gpio_direction_output() local
133 bit = ADP5588_BIT(off); in adp5588_gpio_direction_output()
136 dev->dir[bank] |= bit; in adp5588_gpio_direction_output()
[all …]
Dgpio-mc9s08dz60.c38 static void mc9s_gpio_to_reg_and_bit(int offset, u8 *reg, u8 *bit) in mc9s_gpio_to_reg_and_bit() argument
41 *bit = offset % GPIO_NUM_PER_GROUP; in mc9s_gpio_to_reg_and_bit()
46 u8 reg, bit; in mc9s08dz60_get_value() local
50 mc9s_gpio_to_reg_and_bit(offset, &reg, &bit); in mc9s08dz60_get_value()
53 return (value >= 0) ? (value >> bit) & 0x1 : 0; in mc9s08dz60_get_value()
58 u8 reg, bit; in mc9s08dz60_set() local
61 mc9s_gpio_to_reg_and_bit(offset, &reg, &bit); in mc9s08dz60_set()
65 value |= 1 << bit; in mc9s08dz60_set()
67 value &= ~(1 << bit); in mc9s08dz60_set()
Dgpio-sch.c69 unsigned short offset, bit; in sch_gpio_reg_get() local
73 bit = sch_gpio_bit(sch, gpio); in sch_gpio_reg_get()
75 reg_val = !!(inb(sch->iobase + offset) & BIT(bit)); in sch_gpio_reg_get()
84 unsigned short offset, bit; in sch_gpio_reg_set() local
88 bit = sch_gpio_bit(sch, gpio); in sch_gpio_reg_set()
93 outb(reg_val | BIT(bit), sch->iobase + offset); in sch_gpio_reg_set()
95 outb((reg_val & ~BIT(bit)), sch->iobase + offset); in sch_gpio_reg_set()
Dgpio-bcm-kona.c130 int bit = GPIO_BIT(gpio); in bcm_kona_gpio_set() local
149 val |= BIT(bit); in bcm_kona_gpio_set()
161 int bit = GPIO_BIT(gpio); in bcm_kona_gpio_get() local
181 return !!(val & BIT(bit)); in bcm_kona_gpio_get()
226 int bit = GPIO_BIT(gpio); in bcm_kona_gpio_direction_output() local
241 val |= BIT(bit); in bcm_kona_gpio_direction_output()
328 int bit = GPIO_BIT(gpio); in bcm_kona_gpio_irq_ack() local
337 val |= BIT(bit); in bcm_kona_gpio_irq_ack()
349 int bit = GPIO_BIT(gpio); in bcm_kona_gpio_irq_mask() local
358 val |= BIT(bit); in bcm_kona_gpio_irq_mask()
[all …]
/linux-4.1.27/arch/frv/include/asm/
Dbitops.h250 int bit; \
257 : "=&r"(bit) \
262 bit; \
280 int bit, x, y; in fls64() local
298 : "=&r"(bit), "=r"(x), "=r"(y) in fls64()
302 return bit; in fls64()
332 int bit; in __ffs() local
333 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(x & -x)); in __ffs()
334 return 31 - bit; in __ffs()
345 unsigned long bit; in __fls() local
[all …]
Dmath-emu.h108 #define dprint(bit, fmt, args...) ({ \ argument
109 if (fp_debugprint & (1 << (bit))) \
113 #define dprint(bit, fmt, args...) argument
237 .macro printf bit=-1,string,nr=0,arg1,arg2,arg3,arg4,arg5
245 .if \bit+1
247 moveq #\bit,%d0
249 btst %d0,fp_debugprint+((31-\bit)/8)
251 btst #\bit,fp_debugprint+((31-\bit)/8)
264 .macro printx bit,fp
273 .Lx1\@: printf \bit," %c",1,%d0
[all …]
/linux-4.1.27/arch/m68k/math-emu/
Dfp_emu.h52 #define fp_set_sr(bit) ({ \ argument
53 FPDATA->fpsr |= 1 << (bit); \
132 .macro fp_set_sr bit
133 bset #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
136 .macro fp_clr_sr bit
137 bclr #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
140 .macro fp_tst_sr bit
141 btst #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
/linux-4.1.27/arch/arm/include/asm/
Dbitops.h35 static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_set_bit() argument
38 unsigned long mask = 1UL << (bit & 31); in ____atomic_set_bit()
40 p += bit >> 5; in ____atomic_set_bit()
47 static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_clear_bit() argument
50 unsigned long mask = 1UL << (bit & 31); in ____atomic_clear_bit()
52 p += bit >> 5; in ____atomic_clear_bit()
59 static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_change_bit() argument
62 unsigned long mask = 1UL << (bit & 31); in ____atomic_change_bit()
64 p += bit >> 5; in ____atomic_change_bit()
72 ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_test_and_set_bit() argument
[all …]
/linux-4.1.27/arch/mips/cavium-octeon/
Docteon-irq.c41 u8 bit; member
52 u8 bit; member
59 static int octeon_irq_set_ciu_mapping(int irq, int line, int bit, int gpio_line, in octeon_irq_set_ciu_mapping() argument
72 cd->bit = bit; in octeon_irq_set_ciu_mapping()
76 octeon_irq_ciu_to_irq[line][bit] = irq; in octeon_irq_set_ciu_mapping()
90 int irq, int line, int bit) in octeon_irq_force_ciu_mapping() argument
92 return irq_domain_associate(domain, irq, line << 6 | bit); in octeon_irq_force_ciu_mapping()
116 unsigned int bit = cd->bit; in octeon_irq_core_ack() local
123 clear_c0_status(0x100 << bit); in octeon_irq_core_ack()
125 if (bit < 2) in octeon_irq_core_ack()
[all …]
/linux-4.1.27/drivers/pinctrl/meson/
Dpinctrl-meson.c132 unsigned int *reg, unsigned int *bit) in meson_calc_reg_and_bit() argument
137 *bit = desc->bit + pin - bank->first; in meson_calc_reg_and_bit()
210 BIT(group->bit), 0); in meson_pmx_disable_other_groups()
238 BIT(group->bit), BIT(group->bit)); in meson_pmx_set_mux()
296 unsigned int reg, bit; in meson_pinconf_set() local
312 meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit); in meson_pinconf_set()
314 BIT(bit), 0); in meson_pinconf_set()
322 &reg, &bit); in meson_pinconf_set()
324 BIT(bit), BIT(bit)); in meson_pinconf_set()
328 meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit); in meson_pinconf_set()
[all …]
/linux-4.1.27/Documentation/i2c/
Dten-bit-addresses1 The I2C protocol knows about two kinds of device addresses: normal 7 bit
2 addresses, and an extended set of 10 bit addresses. The sets of addresses
3 do not intersect: the 7 bit address 0x10 is not the same as the 10 bit
6 I2C messages to and from 10-bit address devices have a different format.
9 The current 10 bit address support is minimal. It should work, however
11 * Not all bus drivers support 10-bit addresses. Some don't because the
12 hardware doesn't support them (SMBus doesn't require 10-bit address
15 (i2c-algo-bit) is known to work.
16 * Some optional features do not support 10-bit addresses. This is the
20 10-bit addresses.
[all …]
Di2c-protocol6 S (1 bit) : Start bit
7 P (1 bit) : Stop bit
8 Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
9 A, NA (1 bit) : Accept and reverse accept bit.
10 Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
11 get a 10 bit I2C address.
15 for 16 bit data.
42 They are just like the above transactions, but instead of a stop bit P
43 a start bit S is sent and the transaction continues. An example of
63 In a read message, master A/NA bit is skipped.
/linux-4.1.27/drivers/irqchip/
Dirq-metag-ext.c179 unsigned int bit = 1 << meta_intc_offset(hw); in meta_intc_ack_irq() local
185 if (metag_in32(stat_addr) & bit) in meta_intc_ack_irq()
186 metag_out32(bit, stat_addr); in meta_intc_ack_irq()
268 unsigned int bit = 1 << meta_intc_offset(hw); in meta_intc_mask_irq() local
276 metag_out32(metag_in32(mask_addr) & ~bit, mask_addr); in meta_intc_mask_irq()
291 unsigned int bit = 1 << meta_intc_offset(hw); in meta_intc_unmask_irq() local
299 metag_out32(metag_in32(mask_addr) | bit, mask_addr); in meta_intc_unmask_irq()
335 unsigned int bit = 1 << meta_intc_offset(hw); in meta_intc_unmask_edge_irq_nomask() local
356 if (metag_in32(stat_addr) & bit) { in meta_intc_unmask_edge_irq_nomask()
357 metag_out32(bit, stat_addr); in meta_intc_unmask_edge_irq_nomask()
[all …]
Dirq-metag.c125 unsigned int bit = 1 << hw; in metag_internal_irq_ack() local
127 if (metag_in32(HWSTATMETA) & bit) in metag_internal_irq_ack()
128 metag_out32(bit, HWSTATMETA); in metag_internal_irq_ack()
161 unsigned int bit = 1 << hw; in metag_internal_irq_unmask() local
181 if (metag_in32(HWSTATMETA) & bit) { in metag_internal_irq_unmask()
182 metag_out32(bit, HWSTATMETA); in metag_internal_irq_unmask()
183 while (!(metag_in32(HWSTATMETA) & bit)) in metag_internal_irq_unmask()
184 metag_out32(bit, HWSTATMETA); in metag_internal_irq_unmask()
/linux-4.1.27/arch/mips/include/asm/mach-ar7/
Dar7.h167 static inline void ar7_device_enable(u32 bit) in ar7_device_enable() argument
171 writel(readl(reset_reg) | (1 << bit), reset_reg); in ar7_device_enable()
175 static inline void ar7_device_disable(u32 bit) in ar7_device_disable() argument
179 writel(readl(reset_reg) & ~(1 << bit), reset_reg); in ar7_device_disable()
183 static inline void ar7_device_reset(u32 bit) in ar7_device_reset() argument
185 ar7_device_disable(bit); in ar7_device_reset()
186 ar7_device_enable(bit); in ar7_device_reset()
189 static inline void ar7_device_on(u32 bit) in ar7_device_on() argument
192 writel(readl(power_reg) | (1 << bit), power_reg); in ar7_device_on()
196 static inline void ar7_device_off(u32 bit) in ar7_device_off() argument
[all …]
/linux-4.1.27/drivers/media/pci/cx25821/
Dcx25821-gpio.c30 int bit = pin_number; in cx25821_set_gpiopin_direction() local
40 bit = pin_number - 31; in cx25821_set_gpiopin_direction()
48 value = gpio_register | Set_GPIO_Bit(bit); in cx25821_set_gpiopin_direction()
50 value = gpio_register & Clear_GPIO_Bit(bit); in cx25821_set_gpiopin_direction()
59 int bit = pin_number; in cx25821_set_gpiopin_logicvalue() local
71 bit = pin_number - 31; in cx25821_set_gpiopin_logicvalue()
78 value &= Clear_GPIO_Bit(bit); in cx25821_set_gpiopin_logicvalue()
80 value |= Set_GPIO_Bit(bit); in cx25821_set_gpiopin_logicvalue()
Dcx25821-biffuncs.h33 static inline u32 clearBitAtPos(u32 value, u8 bit) in clearBitAtPos() argument
35 return value & ~(1 << bit); in clearBitAtPos()
38 static inline u32 setBitAtPos(u32 sample, u8 bit) in setBitAtPos() argument
40 sample |= (1 << bit); in setBitAtPos()
/linux-4.1.27/Documentation/ABI/testing/
Dsysfs-driver-sunxi-sid11 0x000 128 bit root-key (sun[457]i)
12 0x010 128 bit boot-key (sun7i)
13 0x020 64 bit security-jtag-key (sun7i)
14 0x028 16 bit key configuration (sun7i)
15 0x02b 16 bit custom-vendor-key (sun7i)
16 0x02c 320 bit low general key (sun7i)
17 0x040 32 bit read-control access (sun7i)
18 0x064 224 bit low general key (sun7i)
19 0x080 2304 bit HDCP-key (sun7i)
20 0x1a0 768 bit high general key (sun7i)
Dsysfs-class-backlight-driver-lm353343 bit 5 - PWM-input enabled in Zone 4
44 bit 4 - PWM-input enabled in Zone 3
45 bit 3 - PWM-input enabled in Zone 2
46 bit 2 - PWM-input enabled in Zone 1
47 bit 1 - PWM-input enabled in Zone 0
48 bit 0 - PWM-input enabled
Dsysfs-class-led-driver-lm353360 bit 5 - PWM-input enabled in Zone 4
61 bit 4 - PWM-input enabled in Zone 3
62 bit 3 - PWM-input enabled in Zone 2
63 bit 2 - PWM-input enabled in Zone 1
64 bit 1 - PWM-input enabled in Zone 0
65 bit 0 - PWM-input enabled
/linux-4.1.27/drivers/media/tuners/
Dmxl5005s.c237 u16 bit[25]; /* Array of bit pos in Reg Addr for each bit pos */ member
301 static void MXL_RegWriteBit(struct dvb_frontend *fe, u8 address, u8 bit,
730 state->Init_Ctrl[0].bit[0] = 7; in MXL5005_ControlInit()
736 state->Init_Ctrl[1].bit[0] = 2; in MXL5005_ControlInit()
742 state->Init_Ctrl[2].bit[0] = 1; in MXL5005_ControlInit()
745 state->Init_Ctrl[2].bit[1] = 0; in MXL5005_ControlInit()
751 state->Init_Ctrl[3].bit[0] = 0; in MXL5005_ControlInit()
757 state->Init_Ctrl[4].bit[0] = 5; in MXL5005_ControlInit()
760 state->Init_Ctrl[4].bit[1] = 6; in MXL5005_ControlInit()
763 state->Init_Ctrl[4].bit[2] = 7; in MXL5005_ControlInit()
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/timer/
Drenesas,cmt.txt3 The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
15 - "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT
17 - "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT
19 - "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT
21 - "renesas,cmt-32" for all 32-bit CMT without fast clock support
25 - "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast
27 - "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast
29 - "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast
31 - "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support
35 - "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT
[all …]
Dti,keystone-timer.txt3 This document provides bindings for the 64-bit timer in the KeyStone
4 architecture devices. The timer can be configured as a general-purpose 64-bit
5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
/linux-4.1.27/Documentation/
Dhighuid.txt1 Notes on the change from 16-bit UIDs to 32-bit UIDs:
10 What's left to be done for 32-bit UIDs on all Linux architectures:
17 properly with huge UIDs. If it can deal with 64-bit file offsets on all
22 (currently, the old 16-bit UID and GID are still written to disk, and
23 part of the former pad space is used to store separate 32-bit UID and
26 - Need to validate that OS emulation calls the 16-bit UID
27 compatibility syscalls, if the OS being emulated used 16-bit UIDs, or
28 uses the 32-bit UID system calls properly otherwise.
34 (need to support whatever new 32-bit UID system calls are added to
39 At present, 32-bit UIDs _should_ work for:
[all …]
Dcrc32.txt14 subtract, we just xor. Thus, we tend to get a bit sloppy about
18 To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
19 Since it's 33 bits long, bit 32 is always going to be set, so usually the
20 CRC is written in hex with the most significant bit omitted. (If you're
27 little-endian; the most significant bit (sometimes used for parity)
31 Just like with ordinary division, you proceed one digit (bit) at a time.
32 Each step of the division you take one more digit (bit) of the dividend
36 and to make the XOR cancel, it's just a copy of bit 32 of the remainder.
39 throw the quotient bit away, but subtract the appropriate multiple of
41 ready to process the next bit.
[all …]
/linux-4.1.27/arch/ia64/include/asm/
Dbitops.h41 __u32 bit, old, new; in set_bit() local
46 bit = 1 << (nr & 31); in set_bit()
50 new = old | bit; in set_bit()
163 __u32 bit, old, new; in change_bit() local
168 bit = (1 << (nr & 31)); in change_bit()
172 new = old ^ bit; in change_bit()
202 __u32 bit, old, new; in test_and_set_bit() local
207 bit = 1 << (nr & 31); in test_and_set_bit()
211 new = old | bit; in test_and_set_bit()
213 return (old & bit) != 0; in test_and_set_bit()
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/regulator/
Danatop-regulator.txt6 - anatop-vol-bit-shift: Bit shift for the register
7 - anatop-vol-bit-width: Number of bits used in the register
8 - anatop-min-bit-val: Minimum value of this register
14 - anatop-delay-bit-shift: Bit shift for the step time register
15 - anatop-delay-bit-width: Number of bits used in the step time register
29 anatop-vol-bit-shift = <9>;
30 anatop-vol-bit-width = <5>;
32 anatop-delay-bit-shift = <24>;
33 anatop-delay-bit-width = <2>;
34 anatop-min-bit-val = <1>;
Dlp872x.txt10 bit[2]: BUCK output voltage control by external DVS pin or register
12 bit[1]: sleep control by external DVS pin or register
14 bit[0]: time step unit(usec). 1 = 25, 0 = 50
17 bit[7:6]: time step unit(usec). 00 = 32, 01 = 64, 10 = 128, 11 = 256
18 bit[4]: BUCK2 enable control. 1 = enable, 0 = disable
19 bit[3]: BUCK2 output voltage register address. 1 = 0Ah, 0 = 0Bh
20 bit[2]: BUCK1 output voltage control by external DVS pin or register
22 bit[1]: LDO sleep control. 1 = sleep mode, 0 = normal
23 bit[0]: BUCK1 enable control, 1 = enable, 0 = disable
/linux-4.1.27/arch/x86/kvm/
Dcpuid.h38 return best && (best->ecx & bit(X86_FEATURE_XSAVE)); in guest_cpuid_has_xsave()
46 return best && (best->ebx & bit(X86_FEATURE_TSC_ADJUST)); in guest_cpuid_has_tsc_adjust()
54 return best && (best->ebx & bit(X86_FEATURE_SMEP)); in guest_cpuid_has_smep()
62 return best && (best->ebx & bit(X86_FEATURE_SMAP)); in guest_cpuid_has_smap()
70 return best && (best->ebx & bit(X86_FEATURE_FSGSBASE)); in guest_cpuid_has_fsgsbase()
78 return best && (best->ecx & bit(X86_FEATURE_OSVW)); in guest_cpuid_has_osvw()
86 return best && (best->ecx & bit(X86_FEATURE_PCID)); in guest_cpuid_has_pcid()
94 return best && (best->ecx & bit(X86_FEATURE_X2APIC)); in guest_cpuid_has_x2apic()
110 return best && (best->edx & bit(X86_FEATURE_GBPAGES)); in guest_cpuid_has_gbpages()
118 return best && (best->ebx & bit(X86_FEATURE_RTM)); in guest_cpuid_has_rtm()
[all …]
/linux-4.1.27/arch/x86/lib/
Dmsr.c58 static inline int __flip_bit(u32 msr, u8 bit, bool set) in __flip_bit() argument
63 if (bit > 63) in __flip_bit()
72 m1.q |= BIT_64(bit); in __flip_bit()
74 m1.q &= ~BIT_64(bit); in __flip_bit()
94 int msr_set_bit(u32 msr, u8 bit) in msr_set_bit() argument
96 return __flip_bit(msr, bit, true); in msr_set_bit()
107 int msr_clear_bit(u32 msr, u8 bit) in msr_clear_bit() argument
109 return __flip_bit(msr, bit, false); in msr_clear_bit()
/linux-4.1.27/fs/xfs/libxfs/
Dxfs_rtbitmap.c91 int bit; /* bit number in the word */ in xfs_rtfind_back() local
118 bit = (int)(start & (XFS_NBWORD - 1)); in xfs_rtfind_back()
124 want = (*b & ((xfs_rtword_t)1 << bit)) ? -1 : 0; in xfs_rtfind_back()
129 if (bit < XFS_NBWORD - 1) { in xfs_rtfind_back()
134 firstbit = XFS_RTMAX((xfs_srtblock_t)(bit - len + 1), 0); in xfs_rtfind_back()
135 mask = (((xfs_rtword_t)1 << (bit - firstbit + 1)) - 1) << in xfs_rtfind_back()
146 i = bit - XFS_RTHIBIT(wdiff); in xfs_rtfind_back()
150 i = bit - firstbit + 1; in xfs_rtfind_back()
266 int bit; /* bit number in the word */ in xfs_rtfind_forw() local
293 bit = (int)(start & (XFS_NBWORD - 1)); in xfs_rtfind_forw()
[all …]
/linux-4.1.27/fs/ntfs/
Dbitmap.c56 u8 bit; in __ntfs_bitmap_set_bits_in_run() local
88 bit = start_bit & 7; in __ntfs_bitmap_set_bits_in_run()
91 if (bit) { in __ntfs_bitmap_set_bits_in_run()
93 while ((bit & 7) && cnt) { in __ntfs_bitmap_set_bits_in_run()
96 *byte |= 1 << bit++; in __ntfs_bitmap_set_bits_in_run()
98 *byte &= ~(1 << bit++); in __ntfs_bitmap_set_bits_in_run()
149 bit = cnt; in __ntfs_bitmap_set_bits_in_run()
151 while (bit--) { in __ntfs_bitmap_set_bits_in_run()
153 *byte |= 1 << bit; in __ntfs_bitmap_set_bits_in_run()
155 *byte &= ~(1 << bit); in __ntfs_bitmap_set_bits_in_run()
Dbitmap.h97 static inline int ntfs_bitmap_set_bit(struct inode *vi, const s64 bit) in ntfs_bitmap_set_bit() argument
99 return ntfs_bitmap_set_run(vi, bit, 1); in ntfs_bitmap_set_bit()
111 static inline int ntfs_bitmap_clear_bit(struct inode *vi, const s64 bit) in ntfs_bitmap_clear_bit() argument
113 return ntfs_bitmap_clear_run(vi, bit, 1); in ntfs_bitmap_clear_bit()
/linux-4.1.27/drivers/clk/pxa/
Dclk-pxa25x.c101 bit, is_lp, flags) \ argument
102 PXA_CKEN(dev_id, con_id, bit, parents, mult, div, mult, div, \
103 is_lp, &CKEN, CKEN_ ## bit, flags)
104 #define PXA25X_PBUS95_CKEN(dev_id, con_id, bit, mult_hp, div_hp, delay) \ argument
106 div_hp, bit, NULL, 0)
107 #define PXA25X_PBUS147_CKEN(dev_id, con_id, bit, mult_hp, div_hp, delay)\ argument
109 div_hp, bit, NULL, 0)
110 #define PXA25X_OSC3_CKEN(dev_id, con_id, bit, mult_hp, div_hp, delay) \ argument
112 div_hp, bit, NULL, 0)
114 #define PXA25X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
[all …]
Dclk-pxa3xx.c129 #define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? &CKENB : &CKENA) argument
131 div_hp, bit, is_lp, flags) \ argument
132 PXA_CKEN(dev_id, con_id, bit, parents, mult_lp, div_lp, \
133 mult_hp, div_hp, is_lp, CKEN_AB(bit), \
134 (CKEN_ ## bit % 32), flags)
135 #define PXA3XX_PBUS_CKEN(dev_id, con_id, bit, mult_lp, div_lp, \ argument
138 div_lp, mult_hp, div_hp, bit, pxa3xx_is_ring_osc_forced, 0)
139 #define PXA3XX_CKEN_1RATE(dev_id, con_id, bit, parents) \ argument
140 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
141 CKEN_AB(bit), (CKEN_ ## bit % 32), 0)
Dclk-pxa27x.c94 bit, is_lp, flags) \ argument
95 PXA_CKEN(dev_id, con_id, bit, parents, 1, 1, mult_hp, div_hp, \
96 is_lp, &CKEN, CKEN_ ## bit, flags)
97 #define PXA27X_PBUS_CKEN(dev_id, con_id, bit, mult_hp, div_hp, delay) \ argument
99 div_hp, bit, pxa27x_is_ppll_disabled, 0)
107 #define PXA27X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
108 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
109 &CKEN, CKEN_ ## bit, 0)
110 #define PXA27X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ argument
111 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
[all …]
/linux-4.1.27/drivers/block/drbd/
Ddrbd_vli.h207 unsigned int bit; member
214 cur->bit = 0; in bitstream_cursor_reset()
221 bits += cur->bit; in bitstream_cursor_advance()
223 cur->bit = bits & 7; in bitstream_cursor_advance()
268 if ((bs->cur.b + ((bs->cur.bit + bits -1) >> 3)) - bs->buf >= bs->buf_len) in bitstream_put_bits()
275 *b++ |= (val & 0xff) << bs->cur.bit; in bitstream_put_bits()
277 for (tmp = 8 - bs->cur.bit; tmp < bits; tmp += 8) in bitstream_put_bits()
301 if (bs->cur.b + ((bs->cur.bit + bs->pad_bits + bits -1) >> 3) - bs->buf >= bs->buf_len) in bitstream_get_bits()
303 - bs->cur.bit - bs->pad_bits; in bitstream_get_bits()
312 n = (bs->cur.bit + bits + 7) >> 3; in bitstream_get_bits()
[all …]
/linux-4.1.27/arch/arm/lib/
Dfindbit.S33 bne .L_found @ any now set - found zero bit
34 add r2, r2, #8 @ next bit pointer
53 eor r3, r3, #0xff @ now looking for a 1 bit
57 add r2, r2, #1 @ align bit pointer
58 b 2b @ loop for next bit
74 bne .L_found @ any now set - found zero bit
75 add r2, r2, #8 @ next bit pointer
97 add r2, r2, #1 @ align bit pointer
98 b 2b @ loop for next bit
112 bne .L_found @ any now set - found zero bit
[all …]
/linux-4.1.27/arch/m68k/ifpsp060/
DCHANGES38 Inexact FPSR bit. Emulation now does not set Inexact for
86 bit 27 = 1 (misaligned bit)
87 bit 24 = 1 (read)
88 bit 23 = 0 (write)
89 bit 22:21 = 10 (SIZE = word)
90 bit 20:19 = 00 (TT)
91 bit 18:16 = x10 (TM; x = 1 for supervisor mode)
92 bit 15 = 1 (IO)
93 bit 0 = 1 (Software Emulation Error)
97 stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/leds/
Dregister-bit-led.txt3 Register bit leds are used with syscon multifunctional devices
5 single LED. The register bit LEDs appear as children to the
16 - compatible : must be "register-bit-led"
18 - mask : bit mask for the bit controlling this LED in the register
41 compatible = "register-bit-led";
49 compatible = "register-bit-led";
57 compatible = "register-bit-led";
65 compatible = "register-bit-led";
72 compatible = "register-bit-led";
79 compatible = "register-bit-led";
[all …]
/linux-4.1.27/arch/m68k/include/asm/
Dmath-emu.h108 #define dprint(bit, fmt, args...) ({ \ argument
109 if (fp_debugprint & (1 << (bit))) \
113 #define dprint(bit, fmt, args...) argument
252 .macro printf bit=-1,string,nr=0,arg1,arg2,arg3,arg4,arg5
260 .if \bit+1
262 moveq #\bit,%d0
264 btst %d0,fp_debugprint+((31-\bit)/8)
266 btst #\bit,fp_debugprint+((31-\bit)/8)
279 .macro printx bit,fp
288 .Lx1\@: printf \bit," %c",1,%d0
[all …]
/linux-4.1.27/drivers/leds/
Dleds-sunfire.c30 enum led_brightness led_val, u8 bit) in __clockboard_set() argument
35 switch (bit) { in __clockboard_set()
38 reg &= ~bit; in __clockboard_set()
40 reg |= bit; in __clockboard_set()
45 reg |= bit; in __clockboard_set()
47 reg &= ~bit; in __clockboard_set()
72 enum led_brightness led_val, u32 bit) in __fhc_set() argument
77 switch (bit) { in __fhc_set()
80 reg &= ~bit; in __fhc_set()
82 reg |= bit; in __fhc_set()
[all …]
/linux-4.1.27/drivers/char/
Dpc8736x_gpio.c154 int port, bit, val; in pc8736x_gpio_get() local
157 bit = minor & 7; in pc8736x_gpio_get()
159 val >>= bit; in pc8736x_gpio_get()
163 minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit, in pc8736x_gpio_get()
171 int port, bit, curval; in pc8736x_gpio_set() local
175 bit = minor & 7; in pc8736x_gpio_set()
180 curval, bit, (curval & ~(1 << bit)), val, (val << bit)); in pc8736x_gpio_set()
182 val = (curval & ~(1 << bit)) | (val << bit); in pc8736x_gpio_set()
185 " %2x -> %2x\n", minor, port, bit, curval, val); in pc8736x_gpio_set()
198 int port, bit; in pc8736x_gpio_current() local
[all …]
/linux-4.1.27/arch/powerpc/platforms/pasemi/
Ddma_lib.c114 int bit; in pasemi_alloc_tx_chan() local
132 bit = find_next_bit(txch_free, MAX_TXCH, start); in pasemi_alloc_tx_chan()
133 if (bit >= limit) in pasemi_alloc_tx_chan()
135 if (!test_and_clear_bit(bit, txch_free)) in pasemi_alloc_tx_chan()
138 return bit; in pasemi_alloc_tx_chan()
149 int bit; in pasemi_alloc_rx_chan() local
151 bit = find_first_bit(rxch_free, MAX_RXCH); in pasemi_alloc_rx_chan()
152 if (bit >= MAX_TXCH) in pasemi_alloc_rx_chan()
154 if (!test_and_clear_bit(bit, rxch_free)) in pasemi_alloc_rx_chan()
157 return bit; in pasemi_alloc_rx_chan()
[all …]
/linux-4.1.27/Documentation/powerpc/
Dcpu_families.txt12 - Mix of 32 & 64 bit
33 | 620 (64 bit) | | 7400 | | 750CL |
104 | PA6T (64 bit) |
112 - All 32 bit
159 - All 32 bit
171 - Mix of 32 & 64 bit
197 | e5500 (64 bit) |
211 - 64 bit
/linux-4.1.27/Documentation/input/
Delantech.txt123 calculating a parity bit for the last 3 bytes of each packet. The driver
189 bit 7 6 5 4 3 2 1 0
203 bit 7 6 5 4 3 2 1 0
245 bit 7 6 5 4 3 2 1 0
249 some models have M as byte 3 odd parity bit
251 p1..p2 = byte 1 and 2 odd parity bit
255 bit 7 6 5 4 3 2 1 0
262 bit 7 6 5 4 3 2 1 0
270 bit 7 6 5 4 3 2 1 0
291 bit 7 6 5 4 3 2 1 0
[all …]
Dsentelic.txt23 Bit5 => Y sign bit
24 Bit4 => X sign bit
29 Byte 2: X Movement(9-bit 2's complement integers)
30 Byte 3: Y Movement(9-bit 2's complement integers)
39 @ Set bit 1 in register 0x40 to 1
52 Bit5 => Y sign bit
53 Bit4 => X sign bit
58 Byte 2: X Movement(9-bit 2's complement integers)
59 Byte 3: Y Movement(9-bit 2's complement integers)
81 @ Set bit 2 or 3 in register 0x40 to 1
[all …]
/linux-4.1.27/arch/mips/include/asm/mach-au1x00/
Dgpio-au1300.h31 int bit; in au1300_gpio_get_value() local
35 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_get_value()
36 return __raw_readl(roff + AU1300_GPIC_PINVAL) & bit; in au1300_gpio_get_value()
42 unsigned long bit; in au1300_gpio_direction_input() local
47 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_direction_input()
48 __raw_writel(bit, roff + AU1300_GPIC_DEVCLR); in au1300_gpio_direction_input()
57 unsigned long bit; in au1300_gpio_set_value() local
62 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_set_value()
63 __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL in au1300_gpio_set_value()
/linux-4.1.27/drivers/pinctrl/
Dpinctrl-tegra.c306 s8 *bank, s16 *reg, s8 *bit, s8 *width) in tegra_pinconf_reg() argument
312 *bit = g->pupd_bit; in tegra_pinconf_reg()
318 *bit = g->tri_bit; in tegra_pinconf_reg()
324 *bit = g->einput_bit; in tegra_pinconf_reg()
330 *bit = g->odrain_bit; in tegra_pinconf_reg()
336 *bit = g->lock_bit; in tegra_pinconf_reg()
342 *bit = g->ioreset_bit; in tegra_pinconf_reg()
348 *bit = g->rcv_sel_bit; in tegra_pinconf_reg()
359 *bit = g->hsm_bit; in tegra_pinconf_reg()
370 *bit = g->schmitt_bit; in tegra_pinconf_reg()
[all …]
Dpinctrl-rockchip.c165 int *reg, u8 *bit);
388 u8 bit; in rockchip_get_mux() local
410 bit = (pin % 4) * 4; in rockchip_get_mux()
412 bit = (pin % 8) * 2; in rockchip_get_mux()
419 return ((val >> bit) & mask); in rockchip_get_mux()
442 u8 bit; in rockchip_set_mux() local
475 bit = (pin % 4) * 4; in rockchip_set_mux()
477 bit = (pin % 8) * 2; in rockchip_set_mux()
482 data = (mask << (bit + 16)); in rockchip_set_mux()
484 data |= (mux & mask) << bit; in rockchip_set_mux()
[all …]
/linux-4.1.27/drivers/spi/
Dspi-butterfly.c84 u8 bit, byte = pp->lastbyte; in setsck() local
86 bit = spi_sck_bit; in setsck()
89 byte |= bit; in setsck()
91 byte &= ~bit; in setsck()
100 u8 bit, byte = pp->lastbyte; in setmosi() local
102 bit = spi_mosi_bit; in setmosi()
105 byte |= bit; in setmosi()
107 byte &= ~bit; in setmosi()
116 u8 bit; in getmiso() local
118 bit = spi_miso_bit; in getmiso()
[all …]
/linux-4.1.27/fs/udf/
Dballoc.c116 unsigned long bit; in udf_bitmap_free_blocks() local
138 bit = block % (sb->s_blocksize << 3); in udf_bitmap_free_blocks()
143 if (bit + count > (sb->s_blocksize << 3)) { in udf_bitmap_free_blocks()
144 overflow = bit + count - (sb->s_blocksize << 3); in udf_bitmap_free_blocks()
153 if (udf_set_bit(bit + i, bh->b_data)) { in udf_bitmap_free_blocks()
154 udf_debug("bit %ld already set\n", bit + i); in udf_bitmap_free_blocks()
156 ((char *)bh->b_data)[(bit + i) >> 3]); in udf_bitmap_free_blocks()
178 int bit, block, block_group, group_start; in udf_bitmap_prealloc_blocks() local
202 bit = block % (sb->s_blocksize << 3); in udf_bitmap_prealloc_blocks()
204 while (bit < (sb->s_blocksize << 3) && block_count > 0) { in udf_bitmap_prealloc_blocks()
[all …]
/linux-4.1.27/arch/arm/nwfpe/
Dsoftfloat-macros35 bits are shifted off, they are ``jammed'' into the least significant bit of
36 the result by setting the least significant bit to 1. The value of `count'
60 bits are shifted off, they are ``jammed'' into the least significant bit of
61 the result by setting the least significant bit to 1. The value of `count'
87 Shifts the 128-bit value formed by concatenating `a0' and `a1' right by 64
90 bits shifted off form a second 64-bit result as follows: The _last_ bit
91 shifted off is the most-significant bit of the extra result, and the other
134 Shifts the 128-bit value formed by concatenating `a0' and `a1' right by the
137 than 128, the result will be 0. The result is broken into two 64-bit pieces
167 Shifts the 128-bit value formed by concatenating `a0' and `a1' right by the
[all …]
/linux-4.1.27/drivers/i2c/busses/
Di2c-simtec.c31 struct i2c_algo_bit_data bit; member
107 pd->adap.algo_data = &pd->bit; in simtec_i2c_probe()
112 pd->bit.data = pd; in simtec_i2c_probe()
113 pd->bit.setsda = simtec_i2c_setsda; in simtec_i2c_probe()
114 pd->bit.setscl = simtec_i2c_setscl; in simtec_i2c_probe()
115 pd->bit.getsda = simtec_i2c_getsda; in simtec_i2c_probe()
116 pd->bit.getscl = simtec_i2c_getscl; in simtec_i2c_probe()
117 pd->bit.timeout = HZ; in simtec_i2c_probe()
118 pd->bit.udelay = 20; in simtec_i2c_probe()
/linux-4.1.27/arch/mips/loongson1/common/
Dirq.c29 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_ack() local
33 | (1 << bit), LS1X_INTC_INTCLR(n)); in ls1x_irq_ack()
38 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_mask() local
42 & ~(1 << bit), LS1X_INTC_INTIEN(n)); in ls1x_irq_mask()
47 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_mask_ack() local
51 & ~(1 << bit), LS1X_INTC_INTIEN(n)); in ls1x_irq_mask_ack()
53 | (1 << bit), LS1X_INTC_INTCLR(n)); in ls1x_irq_mask_ack()
58 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_unmask() local
62 | (1 << bit), LS1X_INTC_INTIEN(n)); in ls1x_irq_unmask()
/linux-4.1.27/Documentation/devicetree/bindings/i2c/
Dmax6697.txt31 Alert bit mask. Alert disabled for bits set.
32 Select bit 0 for local temperature, bit 1..7 for remote temperatures.
35 Over-temperature bit mask. Over-temperature reporting disabled for
37 Select bit 0 for local temperature, bit 1..7 for remote temperatures.
44 specified as boolean, otherwise as per bit mask specified.
45 Only supported for remote temperatures (bit 1..7).
49 For MAX6581 only. Two values; first is bit mask, second is ideality
50 select value as per MAX6581 data sheet. Select bit 1..7 for remote
/linux-4.1.27/Documentation/devicetree/bindings/clock/ti/
Dgate.txt39 - ti,bit-shift : bit shift for programming the clock gate, invalid for
41 - ti,set-bit-to-disable : inverts default gate programming. Setting the bit
42 gates the clock and clearing the bit ungates the clock.
50 ti,bit-shift = <25>;
58 ti,bit-shift = <23>;
66 ti,bit-shift = <0>;
74 ti,bit-shift = <1>;
87 ti,bit-shift = <0x1b>;
89 ti,set-bit-to-disable;
96 ti,bit-shift = <3>;
[all …]
Dautoidle.txt7 and a configuration bit setting. Autoidle clock is never an individual
15 - ti,autoidle-shift : bit shift of the autoidle enable bit
16 - ti,invert-autoidle-bit : autoidle is enabled by setting the bit to 0
27 ti,invert-autoidle-bit;
38 ti,invert-autoidle-bit;
Dfixed-factor-clock.txt19 - ti,autoidle-shift: bit shift of the autoidle enable bit for the clock,
22 - ti,invert-autoidle-bit: autoidle is enabled by setting the bit to 0, see [2]
42 ti,invert-autoidle-bit;
Dinterface.txt31 - ti,bit-shift : bit shift for the bit enabling/disabling the clock (default 0)
39 ti,bit-shift = <3>;
47 ti,bit-shift = <0>;
55 ti,bit-shift = <0>;
/linux-4.1.27/arch/unicore32/lib/
Dfindbit.S26 bne .L_found @ any now set - found zero bit
27 add r2, r2, #8 @ next bit pointer
45 xor r3, r3, #0xff @ now looking for a 1 bit
49 add r2, r2, #1 @ align bit pointer
50 b 2b @ loop for next bit
64 bne .L_found @ any now set - found zero bit
65 add r2, r2, #8 @ next bit pointer
86 add r2, r2, #1 @ align bit pointer
87 b 2b @ loop for next bit
/linux-4.1.27/drivers/media/pci/tw68/
Dtw68.h204 #define tw_setl(reg, bit) tw_andorl((reg), (bit), (bit)) argument
205 #define tw_setb(reg, bit) tw_andorb((reg), (bit), (bit)) argument
206 #define tw_clearl(reg, bit) \ argument
207 writel((readl(dev->lmmio + ((reg) >> 2)) & ~(bit)), \
209 #define tw_clearb(reg, bit) \ argument
210 writeb((readb(dev->bmmio+(reg)) & ~(bit)), \
/linux-4.1.27/net/netfilter/
Dnf_conntrack_h323_asn1.c99 unsigned int bit; member
103 #define INC_BIT(bs) if((++(bs)->bit)>7){(bs)->cur++;(bs)->bit=0;}
104 #define INC_BITS(bs,b) if(((bs)->bit+=(b))>7){(bs)->cur+=(bs)->bit>>3;(bs)->bit&=7;}
105 #define BYTE_ALIGN(bs) if((bs)->bit){(bs)->cur++;(bs)->bit=0;}
171 unsigned int b = (*bs->cur) & (0x80 >> bs->bit); in get_bit()
184 v = (*bs->cur) & (0xffU >> bs->bit); in get_bits()
185 l = b + bs->bit; in get_bits()
189 bs->bit = l; in get_bits()
192 bs->bit = 0; in get_bits()
198 bs->bit = l - 8; in get_bits()
[all …]
Dnf_conntrack_labels.c23 bool nf_connlabel_match(const struct nf_conn *ct, u16 bit) in nf_connlabel_match() argument
30 return bit < label_bits(labels) && test_bit(bit, labels->bits); in nf_connlabel_match()
34 int nf_connlabel_set(struct nf_conn *ct, u16 bit) in nf_connlabel_set() argument
38 if (!labels || bit >= label_bits(labels)) in nf_connlabel_set()
41 if (test_bit(bit, labels->bits)) in nf_connlabel_set()
44 if (!test_and_set_bit(bit, labels->bits)) in nf_connlabel_set()
Dxt_connlabel.c34 return (nf_connlabel_set(ct, info->bit) == 0) ^ invert; in connlabel_mt()
36 return nf_connlabel_match(ct, info->bit) ^ invert; in connlabel_mt()
47 if (info->bit > XT_CONNLABEL_MAXBIT) in connlabel_mt_check()
63 words = BITS_TO_LONGS(info->bit+1); in connlabel_mt_check()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Dbit.c28 bit_entry(struct nvkm_bios *bios, u8 id, struct bit_entry *bit) in bit_entry() argument
35 bit->id = nv_ro08(bios, entry + 0); in bit_entry()
36 bit->version = nv_ro08(bios, entry + 1); in bit_entry()
37 bit->length = nv_ro16(bios, entry + 2); in bit_entry()
38 bit->offset = nv_ro16(bios, entry + 4); in bit_entry()
/linux-4.1.27/arch/powerpc/perf/
Dpower5+-pmu.c140 int bit, fmask; in power5p_get_constraint() local
170 bit = event & 7; in power5p_get_constraint()
171 fmask = (bit == 6)? 7: 3; in power5p_get_constraint()
172 sh = grsel_shift[bit]; in power5p_get_constraint()
408 int bit, byte, unit; in power5p_marked_instr_event() local
416 bit = -1; in power5p_marked_instr_event()
421 bit = 4; in power5p_marked_instr_event()
423 bit = pmc - 1; in power5p_marked_instr_event()
425 bit = 4 - pmc; in power5p_marked_instr_event()
427 bit = 4; in power5p_marked_instr_event()
[all …]
Dpower5-pmu.c144 int bit, fmask; in power5_get_constraint() local
177 bit = event & 7; in power5_get_constraint()
178 fmask = (bit == 6)? 7: 3; in power5_get_constraint()
179 sh = grsel_shift[bit]; in power5_get_constraint()
344 int bit, byte, unit; in power5_marked_instr_event() local
352 bit = -1; in power5_marked_instr_event()
357 bit = 4; in power5_marked_instr_event()
359 bit = pmc - 1; in power5_marked_instr_event()
361 bit = 4 - pmc; in power5_marked_instr_event()
363 bit = 4; in power5_marked_instr_event()
[all …]
/linux-4.1.27/drivers/pinctrl/nomadik/
Dpinctrl-nomadik.c294 u32 bit = 1 << offset; in __nmk_gpio_set_mode() local
297 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit; in __nmk_gpio_set_mode()
298 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit; in __nmk_gpio_set_mode()
300 afunc |= bit; in __nmk_gpio_set_mode()
302 bfunc |= bit; in __nmk_gpio_set_mode()
310 u32 bit = 1 << offset; in __nmk_gpio_set_slpm() local
315 slpm |= bit; in __nmk_gpio_set_slpm()
317 slpm &= ~bit; in __nmk_gpio_set_slpm()
324 u32 bit = 1 << offset; in __nmk_gpio_set_pull() local
329 pdis |= bit; in __nmk_gpio_set_pull()
[all …]
/linux-4.1.27/drivers/gpu/drm/mgag200/
Dmgag200_i2c.c131 i2c->adapter.algo_data = &i2c->bit; in mgag200_i2c_create()
133 i2c->bit.udelay = 10; in mgag200_i2c_create()
134 i2c->bit.timeout = 2; in mgag200_i2c_create()
135 i2c->bit.data = i2c; in mgag200_i2c_create()
136 i2c->bit.setsda = mga_gpio_setsda; in mgag200_i2c_create()
137 i2c->bit.setscl = mga_gpio_setscl; in mgag200_i2c_create()
138 i2c->bit.getsda = mga_gpio_getsda; in mgag200_i2c_create()
139 i2c->bit.getscl = mga_gpio_getscl; in mgag200_i2c_create()
/linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/
Drtl_eeprom.c28 static void eprom_cs(struct net_device *dev, short bit) in eprom_cs() argument
30 if (bit) in eprom_cs()
53 static void eprom_w(struct net_device *dev, short bit) in eprom_w() argument
55 if (bit) in eprom_w()
68 short bit; in eprom_r() local
70 bit = (read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT)); in eprom_r()
73 if (bit) in eprom_r()
/linux-4.1.27/Documentation/devicetree/bindings/clock/
Dkeystone-pll.txt47 - bit-shift : number of bits to shift the bit-mask
48 - bit-mask : arbitrary bitmask for programming the mux
59 bit-shift = <23>;
60 bit-mask = <1>;
69 - bit-shift : number of bits to shift the bit-mask
70 - bit-mask : arbitrary bitmask for programming the divider
81 bit-shift = <0>;
82 bit-mask = <8>;
/linux-4.1.27/arch/mips/loongson/common/
Dmem.c31 int bit; in prom_init_memory() local
33 bit = fls(memsize + highmemsize); in prom_init_memory()
34 if (bit != ffs(memsize + highmemsize)) in prom_init_memory()
35 bit += 20; in prom_init_memory()
37 bit = bit + 20 - 1; in prom_init_memory()
41 0x80000000ul, (1 << bit)); in prom_init_memory()
/linux-4.1.27/Documentation/video4linux/cx2341x/
Dfw-calling.txt16 The firmware implements 20 mailboxes of 20 32-bit words. The first 10 are
39 The command is a 32-bit enumerator. The API specifics may be found in the
42 The return value is a 32-bit enumerator. Only two values are currently defined:
45 There are 16 parameters/results 32-bit fields. The driver populates these fields
55 first one available (bit 0 has been cleared). The driver sets that bit, fills
57 driver then sets the parameter ready bit (bit 1). The firmware scans the
60 complete bit (bit 2). Once bit 2 is set, the driver should retrieve the results
Dfw-decoder-regs.txt20 bit 0
223 bit 8
228 bit 16
235 bit 0
238 bit 1
243 bit 2
251 bit 5
273 bit 0
278 bit 4
281 bit 8
[all …]
Dfw-osd-api.txt24 0=8bit index
25 1=16bit RGB 5:6:5
26 2=16bit ARGB 1:5:5:5
27 3=16bit ARGB 1:4:4:4
28 4=32bit ARGB 8:8:8:8
37 0=8bit index
38 1=16bit RGB 5:6:5
39 2=16bit ARGB 1:5:5:5
40 3=16bit ARGB 1:4:4:4
41 4=32bit ARGB 8:8:8:8
[all …]
/linux-4.1.27/arch/mips/
DMakefile21 32bit-tool-archpref = mipsel
22 64bit-tool-archpref = mips64el
23 32bit-bfd = elf32-tradlittlemips
24 64bit-bfd = elf64-tradlittlemips
25 32bit-emul = elf32ltsmip
26 64bit-emul = elf64ltsmip
28 32bit-tool-archpref = mips
29 64bit-tool-archpref = mips64
30 32bit-bfd = elf32-tradbigmips
31 64bit-bfd = elf64-tradbigmips
[all …]
/linux-4.1.27/drivers/staging/rtl8192u/
Dr8180_93cx6.c23 static void eprom_cs(struct net_device *dev, short bit) in eprom_cs() argument
28 if (bit) in eprom_cs()
56 static void eprom_w(struct net_device *dev, short bit) in eprom_w() argument
61 if (bit) in eprom_w()
73 u8 bit; in eprom_r() local
75 read_nic_byte_E(dev, EPROM_CMD, &bit); in eprom_r()
78 if (bit & EPROM_R_BIT) in eprom_r()
/linux-4.1.27/drivers/usb/musb/
Dmusbhsdma.c46 u8 bit; in dma_controller_stop() local
52 for (bit = 0; bit < MUSB_HSDMA_CHANNELS; bit++) { in dma_controller_stop()
53 if (controller->used_channels & (1 << bit)) { in dma_controller_stop()
54 channel = &controller->channel[bit].channel; in dma_controller_stop()
71 u8 bit; in dma_channel_allocate() local
73 for (bit = 0; bit < MUSB_HSDMA_CHANNELS; bit++) { in dma_channel_allocate()
74 if (!(controller->used_channels & (1 << bit))) { in dma_channel_allocate()
75 controller->used_channels |= (1 << bit); in dma_channel_allocate()
76 musb_channel = &(controller->channel[bit]); in dma_channel_allocate()
78 musb_channel->idx = bit; in dma_channel_allocate()
/linux-4.1.27/fs/ufs/
Dialloc.c63 unsigned ino, cg, bit; in ufs_free_inode() local
81 bit = ufs_inotocgoff (ino); in ufs_free_inode()
95 if (ubh_isclr (UCPI_UBH(ucpi), ucpi->c_iusedoff, bit)) in ufs_free_inode()
98 ubh_clrbit (UCPI_UBH(ucpi), ucpi->c_iusedoff, bit); in ufs_free_inode()
179 unsigned cg, bit, i, j, start; in ufs_new_inode() local
247 bit = ubh_find_next_zero_bit (UCPI_UBH(ucpi), ucpi->c_iusedoff, uspi->s_ipg, start); in ufs_new_inode()
248 if (!(bit < uspi->s_ipg)) { in ufs_new_inode()
249 bit = ubh_find_first_zero_bit (UCPI_UBH(ucpi), ucpi->c_iusedoff, start); in ufs_new_inode()
250 if (!(bit < start)) { in ufs_new_inode()
257 UFSD("start = %u, bit = %u, ipg = %u\n", start, bit, uspi->s_ipg); in ufs_new_inode()
[all …]
Dutil.h350 #define ubh_blkmap(ubh,begin,bit) \ argument
351 …((*ubh_get_addr(ubh, (begin) + ((bit) >> 3)) >> ((bit) & 7)) & (0xff >> (UFS_MAXFRAG - uspi->s_fpb…
383 #define ubh_setbit(ubh,begin,bit) \ argument
384 (*ubh_get_addr(ubh, (begin) + ((bit) >> 3)) |= (1 << ((bit) & 7)))
386 #define ubh_clrbit(ubh,begin,bit) \ argument
387 (*ubh_get_addr (ubh, (begin) + ((bit) >> 3)) &= ~(1 << ((bit) & 7)))
389 #define ubh_isset(ubh,begin,bit) \ argument
390 (*ubh_get_addr (ubh, (begin) + ((bit) >> 3)) & (1 << ((bit) & 7)))
392 #define ubh_isclr(ubh,begin,bit) (!ubh_isset(ubh,begin,bit)) argument
423 unsigned bit, i; in find_last_zero_bit() local
[all …]
/linux-4.1.27/Documentation/metag/
Dkernel-ABI.txt61 D0.0 (D0Re0) 32bit result D1.0 (D1Re0) Top half of 64bit result
138 aligned 64-bit arguments, 64-bit values are always packed in consecutive
146 But for metag fadvise64_64 is wrapped so that the 64-bit arguments are packed:
168 times be 64-bit aligned. The following registers are effective at the point of a
173 D0.0 (D0Re0) 32bit return value
174 D1.0 (D1Re0) Upper half of 64bit return value
175 D0.1 (D0Ar6) 32bit argument #6 Clobbered
176 D1.1 (D1Ar5) 32bit argument #5 Clobbered
177 D0.2 (D0Ar4) 32bit argument #4 Clobbered
178 D1.2 (D1Ar3) 32bit argument #3 Clobbered
[all …]
/linux-4.1.27/arch/arm/mach-s3c64xx/
Dpm.c288 { .irq = IRQ_RTC_ALARM, .bit = S3C64XX_PWRCFG_RTC_ALARM_DISABLE, },
289 { .irq = IRQ_RTC_TIC, .bit = S3C64XX_PWRCFG_RTC_TICK_DISABLE, },
290 { .irq = IRQ_PENDN, .bit = S3C64XX_PWRCFG_TS_DISABLE, },
291 { .irq = IRQ_HSMMC0, .bit = S3C64XX_PWRCFG_MMC0_DISABLE, },
292 { .irq = IRQ_HSMMC1, .bit = S3C64XX_PWRCFG_MMC1_DISABLE, },
293 { .irq = IRQ_HSMMC2, .bit = S3C64XX_PWRCFG_MMC2_DISABLE, },
294 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_BATF_DISABLE},
295 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE },
296 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_HSI_DISABLE },
297 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE },
/linux-4.1.27/Documentation/devicetree/bindings/powerpc/4xx/
Dcpm.txt17 bit in the cell, the corresponding bit
21 bit in the cell, the corresponding bit
25 bit in the cell, the corresponding bit
29 bit in the cell, the corresponding bit
/linux-4.1.27/arch/m68k/fpsp040/
Dfpsp.h122 | fsave offsets and bit definitions
160 .set guard_bit,1 | guard bit is bit number 1
161 .set round_bit,0 | round bit is bit number 0
163 .set denorm_bit,7 | bit determines if denorm or unnorm
164 .set etemp15_bit,4 | etemp exponent bit #15
165 .set wbtemp66_bit,2 | wbtemp mantissa bit #66
166 .set wbtemp1_bit,1 | wbtemp mantissa bit #1
167 .set wbtemp0_bit,0 | wbtemp mantissa bit #0
169 .set STICKY,LV-39 | holds sticky bit
179 .set direction_bit,5 | bit 0 in opclass
[all …]
Dkernel_ex.S51 | set FPSR exception status dz bit, condition code
52 | inf bit, and accrued dz bit
57 | set exception status bit & accrued bits in FPSR
67 bsetb #neg_bit,FPSR_CC(%a6) |set neg bit in FPSR
84 bsetb #neg_bit,FPSR_CC(%a6) |set neg bit in FPSR
97 bsetb #neg_bit,FPSR_CC(%a6) |set neg bit in FPSR
106 | set FPSR exception status operr bit, condition code
107 | nan bit; Store default NAN into fp0
111 | set FPSR exception status operr bit, accrued operr bit
288 bsetb #neg_bit,FPSR_CC(%a6) |set N bit
[all …]
Dround.S40 | The INEX bit of USER_FPSR will be set if the rounded result was
117 asll #1,%d0 |shift g-bit to c-bit
151 movel LOCAL_HI(%a0),%d2 |get word 2 for s-bit test
152 andil #0x0000003f,%d2 |s bit is the or of all other
163 movel LOCAL_LO(%a0),%d2 |get lower mantissa for s-bit test
164 andil #0x000001ff,%d2 |s bit is the or-ing of all
179 .set ad_1_sgl,0x00000100 | constant to add 1 to l-bit in sgl prec
180 .set ad_1_dbl,0x00000800 | constant to add 1 to l-bit in dbl prec
183 |Jump table for adding 1 to the l-bit indexed by rnd prec
196 roxrw LOCAL_HI(%a0) |shift v-bit back in
[all …]
/linux-4.1.27/arch/powerpc/include/asm/
Dbitops.h51 #define PPC_BIT(bit) (1UL << PPC_BITLSHIFT(bit)) argument
181 int bit; in __ilog2_u32() local
182 asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n)); in __ilog2_u32()
183 return 31 - bit; in __ilog2_u32()
190 int bit; in __ilog2_u64() local
191 asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n)); in __ilog2_u64()
192 return 63 - bit; in __ilog2_u64()
/linux-4.1.27/arch/arm/mach-pxa/
Dpxa_cplds_irqs.c42 unsigned int bit; in cplds_irq_handler() local
45 for_each_set_bit(bit, &pending, CPLDS_NB_IRQ) in cplds_irq_handler()
46 generic_handle_irq(irq_find_mapping(fpga->irqdomain, bit)); in cplds_irq_handler()
55 unsigned int set, bit = BIT(cplds_irq); in cplds_irq_mask_ack() local
57 fpga->irq_mask &= ~bit; in cplds_irq_mask_ack()
60 writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR); in cplds_irq_mask_ack()
67 unsigned int bit = BIT(cplds_irq); in cplds_irq_unmask() local
69 fpga->irq_mask |= bit; in cplds_irq_unmask()
/linux-4.1.27/arch/blackfin/include/asm/
Dmmu_context.h126 unsigned long bit; in protect_page() local
133 bit = 1 << (page & 31); in protect_page()
136 mask[idx] |= bit; in protect_page()
138 mask[idx] &= ~bit; in protect_page()
141 mask[idx] |= bit; in protect_page()
143 mask[idx] &= ~bit; in protect_page()
146 mask[idx] |= bit; in protect_page()
148 mask[idx] &= ~bit; in protect_page()
/linux-4.1.27/arch/sh/boards/mach-cayman/
Dirq.c62 unsigned char bit; in enable_cayman_irq() local
66 bit = 1<<(irq % 8); in enable_cayman_irq()
69 mask |= bit; in enable_cayman_irq()
80 unsigned char bit; in disable_cayman_irq() local
84 bit = 1<<(irq % 8); in disable_cayman_irq()
87 mask &= ~bit; in disable_cayman_irq()
/linux-4.1.27/arch/mn10300/include/asm/
Dbitops.h165 int bit; in __ffs() local
166 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x) : "cc"); in __ffs()
167 return bit; in __ffs()
177 int bit; in __ilog2_u32() local
178 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n) : "cc"); in __ilog2_u32()
179 return bit; in __ilog2_u32()
/linux-4.1.27/arch/cris/arch-v10/drivers/
DKconfig77 …int "Ser0 DTR on PA bit (-1 = not used)" if ETRAX_SER0_DTR_RI_DSR_CD_ON_PA || ETRAX_SER0_DTR_RI_DS…
83 …int "Ser0 RI on PA bit (-1 = not used)" if ETRAX_SER0_DTR_RI_DSR_CD_ON_PA || ETRAX_SER0_DTR_RI_DS…
89 …int "Ser0 DSR on PA bit (-1 = not used)" if ETRAX_SER0_DTR_RI_DSR_CD_ON_PA || ETRAX_SER0_DTR_RI_DS…
95 …int "Ser0 CD on PA bit (-1 = not used)" if ETRAX_SER0_DTR_RI_DSR_CD_ON_PA || ETRAX_SER0_DTR_RI_DS…
101 …int "Ser0 DTR on PB bit (-1 = not used)" if ETRAX_SER0_DTR_RI_DSR_CD_ON_PB || ETRAX_SER0_DTR_RI_DS…
110 …int "Ser0 RI on PB bit (-1 = not used)" if ETRAX_SER0_DTR_RI_DSR_CD_ON_PB || ETRAX_SER0_DTR_RI_DS…
119 …int "Ser0 DSR on PB bit (-1 = not used)" if ETRAX_SER0_DTR_RI_DSR_CD_ON_PB || ETRAX_SER0_DTR_RI_DS…
128 …int "Ser0 CD on PB bit (-1 = not used)" if ETRAX_SER0_DTR_RI_DSR_CD_ON_PB || ETRAX_SER0_DTR_RI_DS…
165 …int "Ser1 DTR on PA bit (-1 = not used)" if ETRAX_SER1_DTR_RI_DSR_CD_ON_PA || ETRAX_SER1_DTR_RI_DS…
171 …int "Ser1 RI on PA bit (-1 = not used)" if ETRAX_SER1_DTR_RI_DSR_CD_ON_PA || ETRAX_SER1_DTR_RI_DS…
[all …]
/linux-4.1.27/arch/sh/drivers/
Dheartbeat.c36 unsigned bit, unsigned int inverted) in heartbeat_toggle_bit() argument
40 new = (1 << hd->bit_pos[bit]); in heartbeat_toggle_bit()
65 static unsigned bit = 0, up = 1; in heartbeat_timer() local
67 heartbeat_toggle_bit(hd, bit, hd->flags & HEARTBEAT_INVERTED); in heartbeat_timer()
69 bit += up; in heartbeat_timer()
70 if ((bit == 0) || (bit == (hd->nr_bits)-1)) in heartbeat_timer()
/linux-4.1.27/drivers/pinctrl/sh-pfc/
Dgpio.c53 unsigned int *bit) in gpio_get_data_reg() argument
59 *bit = gpio_pin->dbit; in gpio_get_data_reg()
86 unsigned int bit; in gpio_setup_data_reg() local
90 for (bit = 0; bit < dreg->reg_width; bit++) { in gpio_setup_data_reg()
91 if (dreg->enum_ids[bit] == pin->enum_id) { in gpio_setup_data_reg()
93 gpio_pin->dbit = bit; in gpio_setup_data_reg()
158 unsigned int bit; in gpio_pin_set_value() local
161 gpio_get_data_reg(chip, offset, &reg, &bit); in gpio_pin_set_value()
163 pos = reg->info->reg_width - (bit + 1); in gpio_pin_set_value()
190 unsigned int bit; in gpio_pin_get() local
[all …]
/linux-4.1.27/drivers/pinctrl/vt8500/
Dpinctrl-wmt.c97 u32 bit = WMT_BIT_FROM_PIN(pin); in wmt_set_pinmux() local
114 wmt_setbits(data, reg_en, BIT(bit)); in wmt_set_pinmux()
115 wmt_clearbits(data, reg_dir, BIT(bit)); in wmt_set_pinmux()
119 wmt_setbits(data, reg_en, BIT(bit)); in wmt_set_pinmux()
120 wmt_setbits(data, reg_dir, BIT(bit)); in wmt_set_pinmux()
128 wmt_clearbits(data, reg_en, BIT(bit)); in wmt_set_pinmux()
434 u32 bit = WMT_BIT_FROM_PIN(pin); in wmt_pinconf_set() local
457 wmt_clearbits(data, reg_pull_en, BIT(bit)); in wmt_pinconf_set()
460 wmt_clearbits(data, reg_pull_cfg, BIT(bit)); in wmt_pinconf_set()
461 wmt_setbits(data, reg_pull_en, BIT(bit)); in wmt_pinconf_set()
[all …]
/linux-4.1.27/net/netlabel/
Dnetlabel_kapi.c484 u32 bit; in netlbl_catmap_walk() local
493 bit = offset % NETLBL_CATMAP_MAPSIZE; in netlbl_catmap_walk()
496 bit = 0; in netlbl_catmap_walk()
498 bitmap = iter->bitmap[idx] >> bit; in netlbl_catmap_walk()
504 bit++; in netlbl_catmap_walk()
507 (NETLBL_CATMAP_MAPSIZE * idx) + bit; in netlbl_catmap_walk()
517 bit = 0; in netlbl_catmap_walk()
539 u32 bit; in netlbl_catmap_walkrng() local
549 bit = offset % NETLBL_CATMAP_MAPSIZE; in netlbl_catmap_walkrng()
552 bit = 0; in netlbl_catmap_walkrng()
[all …]
/linux-4.1.27/arch/cris/include/arch-v32/arch/
Dio.h27 int bit; member
51 *iopin->port->data |= iopin->bit; in crisv32_io_set()
53 *iopin->port->data &= ~iopin->bit; in crisv32_io_set()
67 *iopin->port->oe &= ~iopin->bit; in crisv32_io_set_dir()
69 *iopin->port->oe |= iopin->bit; in crisv32_io_set_dir()
77 return ((*iopin->port->data_in & iopin->bit) ? 1 : 0); in crisv32_io_rd()
/linux-4.1.27/Documentation/virtual/kvm/devices/
Dxics.txt11 sources, each identified by a 20-bit source number, and a set of
20 KVM_GET_ONE_REG and KVM_SET_ONE_REG ioctls on the vcpu. The 64 bit
42 the interrupt source number. The 64 bit state word has the following
54 * Level sensitive flag, 1 bit
55 This bit is 1 for a level-sensitive interrupt source, or 0 for
58 * Masked flag, 1 bit
59 This bit is set to 1 if the interrupt is masked (cannot be delivered
63 * Pending flag, 1 bit
64 This bit is 1 if the source has a pending interrupt, otherwise 0.
/linux-4.1.27/arch/sh/boards/mach-highlander/
Dpsw.c37 if (mask & (1 << psw_info->bit)) { in psw_irq_handler()
38 psw->state = !!(mask & (1 << psw_info->bit)); in psw_irq_handler()
62 .bit = 6,
80 .bit = 5,
98 .bit = 4,
/linux-4.1.27/kernel/trace/
Dtrace.h320 u32 bit; /* Mask assigned in val field in tracer_flags */ member
333 #define TRACER_OPT(s, b) .name = #s, .bit = b
384 u32 old_flags, u32 bit, int set);
458 #define trace_recursion_set(bit) do { (current)->trace_recursion |= (1<<(bit)); } while (0) argument
459 #define trace_recursion_clear(bit) do { (current)->trace_recursion &= ~(1<<(bit)); } while (0) argument
460 #define trace_recursion_test(bit) ((current)->trace_recursion & (1<<(bit))) argument
474 int bit; in trace_get_context_bit() local
478 bit = 0; in trace_get_context_bit()
481 bit = 1; in trace_get_context_bit()
483 bit = 2; in trace_get_context_bit()
[all …]
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/
Dbase.c46 struct i2c_algo_bit_data *bit = adap->algo_data; in nvkm_i2c_pre_xfer() local
47 struct nvkm_i2c_port *port = bit->data; in nvkm_i2c_pre_xfer()
48 return nvkm_i2c(port)->acquire(port, bit->timeout); in nvkm_i2c_pre_xfer()
54 struct i2c_algo_bit_data *bit = adap->algo_data; in nvkm_i2c_post_xfer() local
55 struct nvkm_i2c_port *port = bit->data; in nvkm_i2c_post_xfer()
136 struct i2c_algo_bit_data *bit; in nvkm_i2c_port_create_() local
138 bit = kzalloc(sizeof(*bit), GFP_KERNEL); in nvkm_i2c_port_create_()
139 if (!bit) in nvkm_i2c_port_create_()
142 bit->udelay = 10; in nvkm_i2c_port_create_()
143 bit->timeout = usecs_to_jiffies(2200); in nvkm_i2c_port_create_()
[all …]
/linux-4.1.27/kernel/sched/
Dwait.c402 int __sched out_of_line_wait_on_bit(void *word, int bit, in out_of_line_wait_on_bit() argument
405 wait_queue_head_t *wq = bit_waitqueue(word, bit); in out_of_line_wait_on_bit()
406 DEFINE_WAIT_BIT(wait, word, bit); in out_of_line_wait_on_bit()
413 void *word, int bit, wait_bit_action_f *action, in out_of_line_wait_on_bit_timeout() argument
416 wait_queue_head_t *wq = bit_waitqueue(word, bit); in out_of_line_wait_on_bit_timeout()
417 DEFINE_WAIT_BIT(wait, word, bit); in out_of_line_wait_on_bit_timeout()
445 int __sched out_of_line_wait_on_bit_lock(void *word, int bit, in out_of_line_wait_on_bit_lock() argument
448 wait_queue_head_t *wq = bit_waitqueue(word, bit); in out_of_line_wait_on_bit_lock()
449 DEFINE_WAIT_BIT(wait, word, bit); in out_of_line_wait_on_bit_lock()
455 void __wake_up_bit(wait_queue_head_t *wq, void *word, int bit) in __wake_up_bit() argument
[all …]
/linux-4.1.27/drivers/media/usb/pwc/
Dpwc-dec23.c83 unsigned int bit, byte, mask, val; in build_bit_powermask_table() local
86 for (bit = 0; bit < 8; bit++) { in build_bit_powermask_table()
88 p = pdec->table_bitpowermask[bit]; in build_bit_powermask_table()
104 int compression_mode, j, k, bit, pw; in build_table_color() local
118 bit = 1; in build_table_color()
120 bit = (r[0] >> 15) & 7; in build_table_color()
122 bit = (r[0] >> 12) & 7; in build_table_color()
124 bit = (r[0] >> 9) & 7; in build_table_color()
126 bit = (r[0] >> 6) & 7; in build_table_color()
128 bit = (r[0] >> 3) & 7; in build_table_color()
[all …]
/linux-4.1.27/Documentation/video4linux/
Dradiotrack.txt36 The RadioTrack card is an ISA 8-bit FM radio card. The radio frequency (RF)
54 the ioports appears to be the "Stereo Detect" bit.
61 | (+) | (-) | | Detect | Audio | (bit) | (latch) | Update |
88 0 0 : "zero" bit phase 1
89 0 1 : "zero" bit phase 2
91 1 0 : "one" bit phase 1
92 1 1 : "one" bit phase 2
94 24-bit code, where bits = (freq*40) + 10486188.
136 to write a "zero" bit,
138 disable, "zero" bit phase 1, tuner adjust)
[all …]
/linux-4.1.27/Documentation/misc-devices/
Disl2900316 The ISL29003 is an integrated light sensor with a 16-bit integrating type
19 provides 16-bit resolution while rejecting 50Hz and 60Hz flicker caused by
22 The driver allows to set the lux range, the bit resolution, the operational
52 0: diode1's current (unsigned 16bit) (default)
53 1: diode1's current (unsigned 16bit)
54 2: difference between diodes (l1 - l2, signed 15bit)
/linux-4.1.27/arch/cris/arch-v10/kernel/
Dirq.c137 int bit; in do_multiple_IRQ() local
168 for (bit = 2; bit < 32; bit++) { in do_multiple_IRQ()
169 if (masked & (1 << bit)) { in do_multiple_IRQ()
170 do_IRQ(bit, regs); in do_multiple_IRQ()
/linux-4.1.27/Documentation/devicetree/bindings/dma/
Datmel-xdma.txt13 - bit 13: SIF, source interface identifier, used to get the memory
15 - bit 14: DIF, destination interface identifier, used to get the peripheral
17 - bit 30-24: PERID, peripheral identifier.
35 - bit 13: SIF, source interface identifier, used to get the memory
37 - bit 14: DIF, destination interface identifier, used to get the peripheral
39 - bit 30-24: PERID, peripheral identifier.
/linux-4.1.27/drivers/pinctrl/mediatek/
Dpinctrl-mtk-common.c77 unsigned int bit; in mtk_pmx_gpio_set_direction() local
81 bit = BIT(offset & 0xf); in mtk_pmx_gpio_set_direction()
89 regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); in mtk_pmx_gpio_set_direction()
96 unsigned int bit; in mtk_gpio_set() local
100 bit = BIT(offset & 0xf); in mtk_gpio_set()
107 regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); in mtk_gpio_set()
114 unsigned int bit; in mtk_pconf_set_ies_smt() local
129 bit = BIT(pin & 0xf); in mtk_pconf_set_ies_smt()
141 regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit); in mtk_pconf_set_ies_smt()
179 shift = pin_drv->bit + drv_grp->low_bit; in mtk_pconf_set_driving()
[all …]
/linux-4.1.27/arch/mips/sgi-ip32/
Dip32-irq.c132 unsigned int bit = d->irq - CRIME_IRQ_BASE; in crime_enable_irq() local
134 crime_mask |= 1 << bit; in crime_enable_irq()
140 unsigned int bit = d->irq - CRIME_IRQ_BASE; in crime_disable_irq() local
142 crime_mask &= ~(1 << bit); in crime_disable_irq()
155 unsigned int bit = d->irq - CRIME_IRQ_BASE; in crime_edge_mask_and_ack_irq() local
160 crime_int &= ~(1 << bit); in crime_edge_mask_and_ack_irq()
319 unsigned int bit = d->irq - CRIME_IRQ_BASE; in enable_mace_irq() local
321 crime_mask |= (1 << bit); in enable_mace_irq()
327 unsigned int bit = d->irq - CRIME_IRQ_BASE; in disable_mace_irq() local
329 crime_mask &= ~(1 << bit); in disable_mace_irq()
/linux-4.1.27/drivers/hid/
Dhid-microsoft.c58 #define ms_map_key_clear(c) hid_map_usage_clear(hi, usage, bit, max, \
61 unsigned long **bit, int *max) in ms_ergonomy_kb_quirk() argument
95 hid_map_usage_clear(hi, usage, bit, max, EV_REL, REL_WHEEL); in ms_ergonomy_kb_quirk()
123 unsigned long **bit, int *max) in ms_presenter_8k_quirk() argument
143 unsigned long **bit, int *max) in ms_input_mapping() argument
148 int ret = ms_ergonomy_kb_quirk(hi, usage, bit, max); in ms_input_mapping()
154 ms_presenter_8k_quirk(hi, usage, bit, max)) in ms_input_mapping()
162 unsigned long **bit, int *max) in ms_input_mapped() argument
167 clear_bit(usage->code, *bit); in ms_input_mapped()
/linux-4.1.27/arch/sh/boards/mach-landisk/
Dpsw.c37 if (sw_value & (1 << psw_info->bit)) { in psw_irq_handler()
66 .bit = 4,
73 .bit = 0,
80 .bit = 2,
87 .bit = 1,
/linux-4.1.27/drivers/gpu/ipu-v3/
Dipu-ic.c146 const struct ic_task_bitfields *bit; member
340 ic_conf |= ic->bit->ic_conf_en; in ipu_ic_task_enable()
343 ic_conf |= ic->bit->ic_conf_rot_en; in ipu_ic_task_enable()
346 ic_conf |= ic->bit->ic_conf_csc1_en; in ipu_ic_task_enable()
349 ic_conf |= ic->bit->ic_conf_cmb_en; in ipu_ic_task_enable()
350 ic_conf |= ic->bit->ic_conf_csc1_en; in ipu_ic_task_enable()
353 ic_conf |= ic->bit->ic_conf_csc2_en; in ipu_ic_task_enable()
372 ic_conf &= ~(ic->bit->ic_conf_en | in ipu_ic_task_disable()
373 ic->bit->ic_conf_csc1_en | in ipu_ic_task_disable()
374 ic->bit->ic_conf_rot_en); in ipu_ic_task_disable()
[all …]
/linux-4.1.27/arch/x86/boot/
Dpmjump.S43 # Transition to 32-bit mode
52 # Set up data segments for flat 32-bit mode
58 # The 32-bit code sets up its own stack, but this way we do have
66 # 32-bit boot protocol
76 jmpl *%eax # Jump to the 32-bit entrypoint
/linux-4.1.27/sound/i2c/
Di2c.c173 if (bus->hw_ops.bit->start) in snd_i2c_bit_hw_start()
174 bus->hw_ops.bit->start(bus); in snd_i2c_bit_hw_start()
179 if (bus->hw_ops.bit->stop) in snd_i2c_bit_hw_stop()
180 bus->hw_ops.bit->stop(bus); in snd_i2c_bit_hw_stop()
185 if (bus->hw_ops.bit->direction) in snd_i2c_bit_direction()
186 bus->hw_ops.bit->direction(bus, clock, data); in snd_i2c_bit_direction()
191 bus->hw_ops.bit->setlines(bus, clock, data); in snd_i2c_bit_set()
197 if (bus->hw_ops.bit->getclock)
198 return bus->hw_ops.bit->getclock(bus);
205 return bus->hw_ops.bit->getdata(bus, ack); in snd_i2c_bit_data()
/linux-4.1.27/arch/cris/arch-v10/
DKconfig61 int "First green LED bit"
66 Most Axis products use bit 2 here.
69 int "First red LED bit"
74 Most Axis products use bit 3 here.
79 int "Second green LED bit"
84 Most Axis products use bit 4 here.
89 int "Second red LED bit"
94 Most Axis products use bit 5 here.
99 int "Third green LED bit"
108 int "Third red LED bit"
[all …]
/linux-4.1.27/drivers/infiniband/hw/qib/
Dqib_twsi.c89 static void scl_out(struct qib_devdata *dd, u8 bit) in scl_out() argument
98 dd->f_gpio_mod(dd, 0, bit ? 0 : mask, mask); in scl_out()
104 if (!bit) in scl_out()
121 static void sda_out(struct qib_devdata *dd, u8 bit) in sda_out() argument
128 dd->f_gpio_mod(dd, 0, bit ? 0 : mask, mask); in sda_out()
208 u8 bit; in wr_byte() local
211 bit = (data >> bit_cntr) & 1; in wr_byte()
212 sda_out(dd, bit); in wr_byte()
/linux-4.1.27/drivers/input/keyboard/
Dadp5589-keys.c225 u8 (*bit) (u8 offset); member
287 .bit = adp5589_bit,
368 .bit = adp5585_bit,
392 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); in adp5589_gpio_get_value() local
396 bit); in adp5589_gpio_get_value()
404 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); in adp5589_gpio_set_value() local
409 kpad->dat_out[bank] |= bit; in adp5589_gpio_set_value()
411 kpad->dat_out[bank] &= ~bit; in adp5589_gpio_set_value()
423 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); in adp5589_gpio_direction_input() local
428 kpad->dir[bank] &= ~bit; in adp5589_gpio_direction_input()
[all …]
/linux-4.1.27/fs/affs/
Dbitmap.c43 u32 blk, bmap, bit, mask, tmp; in affs_free_block() local
53 bit = blk % sbi->s_bmap_bits; in affs_free_block()
68 mask = 1 << (bit & 31); in affs_free_block()
69 data = (__be32 *)bh->b_data + bit / 32 + 1; in affs_free_block()
121 u32 blk, bmap, bit, mask, mask2, tmp; in affs_alloc_block() local
181 bit = blk % sbi->s_bmap_bits; in affs_alloc_block()
182 data = (__be32 *)bh->b_data + bit / 32 + 1; in affs_alloc_block()
184 mask = ~0UL << (bit & 31); in affs_alloc_block()
205 bit = ffs(tmp & mask) - 1; in affs_alloc_block()
206 blk += bit + sbi->s_reserved; in affs_alloc_block()
[all …]
/linux-4.1.27/arch/mips/paravirt/
Dparavirt-irq.c31 u8 bit; member
39 unsigned int bit = cd->bit; in irq_core_ack() local
46 clear_c0_status(0x100 << bit); in irq_core_ack()
48 if (bit < 2) in irq_core_ack()
49 clear_c0_cause(0x100 << bit); in irq_core_ack()
61 set_c0_status(0x100 << cd->bit); in irq_core_eoi()
68 unsigned int mask = 0x100 << cd->bit; in irq_core_set_enable_local()
139 cd->bit = i; in irq_init_core()
/linux-4.1.27/arch/mips/txx9/jmr3927/
Dirq.c55 unsigned int bit = 1 << irq_nr; in mask_irq_ioc() local
56 jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR); in mask_irq_ioc()
65 unsigned int bit = 1 << irq_nr; in unmask_irq_ioc() local
66 jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR); in unmask_irq_ioc()
/linux-4.1.27/arch/arm/mach-omap1/include/mach/
Dmux.h45 #define PULL_REG(reg, bit, status) .pull_name = "PULL_DWN_CTRL_"#reg, \ argument
47 .pull_bit = bit, \
59 #define PULL_REG_7XX(reg, bit, status) .pull_name = "OMAP7XX_IO_CONF_"#reg, \ argument
61 .pull_bit = bit, \
70 #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, \ argument
71 .pull_bit = bit, \
82 #define PULL_REG_7XX(reg, bit, status) .pull_reg = OMAP7XX_IO_CONF_##reg, \ argument
83 .pull_bit = bit, \
/linux-4.1.27/drivers/infiniband/hw/ehca/
Dipz_pt_fn.c131 unsigned long bit; in alloc_small_queue_page() local
152 bit = find_first_zero_bit(page->bitmap, IPZ_SPAGE_PER_KPAGE >> order); in alloc_small_queue_page()
153 __set_bit(bit, page->bitmap); in alloc_small_queue_page()
161 queue->queue_pages[0] = (void *)(page->page | (bit << (order + 9))); in alloc_small_queue_page()
163 queue->offset = bit << (order + 9); in alloc_small_queue_page()
176 unsigned long bit; in free_small_queue_page() local
179 bit = ((unsigned long)queue->queue_pages[0] & ~PAGE_MASK) in free_small_queue_page()
184 __clear_bit(bit, page->bitmap); in free_small_queue_page()
/linux-4.1.27/Documentation/parisc/
Ddebugging29 3. Q bit fun
31 Certain, very critical code has to clear the Q bit in the PSW. What
32 happens when the Q bit is cleared is the CPU does not update the
35 that clears the Q bit and the RFI that sets it again you don't know
37 instruction that cleared the Q bit, if you're not it points anywhere
38 at all. Usually Q bit problems will show themselves in unexplainable
/linux-4.1.27/net/ceph/
Dpagelist.c56 size_t bit = pl->room; in ceph_pagelist_append() local
60 buf, bit); in ceph_pagelist_append()
61 pl->length += bit; in ceph_pagelist_append()
62 pl->room -= bit; in ceph_pagelist_append()
63 buf += bit; in ceph_pagelist_append()
64 len -= bit; in ceph_pagelist_append()
/linux-4.1.27/arch/arm/mm/
Dabort-lv4t.S57 tst r8, #1 << 21 @ check writeback bit
73 tst r8, #1 << 23 @ Check U bit
80 tst r8, #1 << 21 @ Check writeback bit
91 tst r8, #1 << 23 @ Check U bit
98 tst r8, #1 << 21 @ check writeback bit
105 tst r8, #1 << 23 @ Check U bit
112 tst r8, #1 << 21 @ check writeback bit
184 tst r8, #1 << 10 @ If 'S' (signed) bit is set
191 and r6, r8, #0x55 @ hweight8(r8) + R bit
197 movs r7, r8, lsr #9 @ C = r8 bit 8 (R bit)
[all …]
/linux-4.1.27/arch/metag/lib/
Dmodsi3.S7 !! 32-bit modulus unsigned i/p - passed unsigned 32-bit numbers
22 !! 32-bit modulus signed i/p - passed signed 32-bit numbers
/linux-4.1.27/arch/arm/plat-samsung/
Dpm.c52 unsigned long bit = 1L << IRQ_EINT_BIT(data->irq); in s3c_irqext_wake() local
54 if (!(s3c_irqwake_eintallow & bit)) in s3c_irqext_wake()
61 s3c_irqwake_eintmask |= bit; in s3c_irqext_wake()
63 s3c_irqwake_eintmask &= ~bit; in s3c_irqext_wake()
Dwakeup-mask.c32 val |= mask->bit; in samsung_sync_wakemask()
40 val &= ~mask->bit; in samsung_sync_wakemask()
42 val |= mask->bit; in samsung_sync_wakemask()
/linux-4.1.27/drivers/acpi/acpica/
Dutownerid.c175 u32 bit; in acpi_ut_release_owner_id() local
204 bit = 1 << ACPI_MOD_32(owner_id); in acpi_ut_release_owner_id()
208 if (acpi_gbl_owner_id_mask[index] & bit) { in acpi_ut_release_owner_id()
209 acpi_gbl_owner_id_mask[index] ^= bit; in acpi_ut_release_owner_id()
/linux-4.1.27/sound/pci/oxygen/
Dxonar_lib.c106 u16 bit = ctl->private_value; in xonar_gpio_bit_switch_get() local
110 !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & bit) ^ invert; in xonar_gpio_bit_switch_get()
118 u16 bit = ctl->private_value; in xonar_gpio_bit_switch_put() local
126 new_bits = old_bits | bit; in xonar_gpio_bit_switch_put()
128 new_bits = old_bits & ~bit; in xonar_gpio_bit_switch_put()
/linux-4.1.27/arch/mips/kernel/
Dbranch.c63 unsigned int bit; in __mm_isBranchInstr() local
158 bit = (insn.mm_i_format.rs >> 2); in __mm_isBranchInstr()
159 bit += (bit != 0); in __mm_isBranchInstr()
160 bit += 23; in __mm_isBranchInstr()
161 if (fcr31 & (1 << bit)) in __mm_isBranchInstr()
419 unsigned int bit, fcr31, dspcontrol, reg; in __compute_return_epc_for_insn() local
691 bit = 0; in __compute_return_epc_for_insn()
697 bit = 1; in __compute_return_epc_for_insn()
703 bit = 1; in __compute_return_epc_for_insn()
707 if (bit) in __compute_return_epc_for_insn()
[all …]
/linux-4.1.27/arch/arm/mach-omap2/
Dboard-n8x0.c331 int bit, *openp, index; in n8x0_mmc_callback() local
334 bit = 1 << 1; in n8x0_mmc_callback()
338 bit = 1; in n8x0_mmc_callback()
343 if (card_mask & bit) in n8x0_mmc_callback()
357 int r, bit, *openp; in n8x0_mmc_late_init() local
390 bit = 1 << 1; in n8x0_mmc_late_init()
393 bit = 1; in n8x0_mmc_late_init()
399 if (r == 0xf || r == (0xf & ~bit)) in n8x0_mmc_late_init()
402 if (r & bit) in n8x0_mmc_late_init()
/linux-4.1.27/arch/blackfin/kernel/cplb-mpu/
Dcplbmgr.c128 int bit = 1 << (page & 31); in dcplb_miss() local
130 if (mask[idx] & bit) in dcplb_miss()
150 int bit = 1 << (page & 31); in dcplb_miss() local
152 if (mask[idx] & bit) in dcplb_miss()
156 if (mask[idx] & bit) in dcplb_miss()
228 int bit = 1 << (page & 31); in icplb_miss() local
231 if (mask[idx] & bit) in icplb_miss()
259 int bit = 1 << (page & 31); in icplb_miss() local
262 if (mask[idx] & bit) in icplb_miss()
/linux-4.1.27/drivers/media/usb/au0828/
Dau0828-input.c113 #define au8522_rc_set(ir, reg, bit) au8522_rc_andor(ir, (reg), (bit), (bit)) argument
114 #define au8522_rc_clear(ir, reg, bit) au8522_rc_andor(ir, (reg), (bit), 0) argument
129 int prv_bit, bit, width; in au0828_get_key_au8522() local
163 bit = (buf[i] >> j) & 0x01; in au0828_get_key_au8522()
164 if (bit == prv_bit) { in au0828_get_key_au8522()
209 prv_bit = bit; in au0828_get_key_au8522()
/linux-4.1.27/arch/powerpc/platforms/powermac/
Dpic.c82 unsigned long bit = 1UL << (src & 0x1f); in pmac_mask_and_ack_irq() local
91 out_le32(&pmac_irq_hw[i]->ack, bit); in pmac_mask_and_ack_irq()
96 } while((in_le32(&pmac_irq_hw[i]->enable) & bit) in pmac_mask_and_ack_irq()
97 != (ppc_cached_irq_mask[i] & bit)); in pmac_mask_and_ack_irq()
104 unsigned long bit = 1UL << (src & 0x1f); in pmac_ack_irq() local
111 out_le32(&pmac_irq_hw[i]->ack, bit); in pmac_ack_irq()
118 unsigned long bit = 1UL << (irq_nr & 0x1f); in __pmac_set_irq_mask() local
131 } while((in_le32(&pmac_irq_hw[i]->enable) & bit) in __pmac_set_irq_mask()
132 != (ppc_cached_irq_mask[i] & bit)); in __pmac_set_irq_mask()
139 if (bit & ppc_cached_irq_mask[i] & in_le32(&pmac_irq_hw[i]->level)) in __pmac_set_irq_mask()
[all …]
/linux-4.1.27/drivers/dma/ioat/
Ddca.c200 int i, apic_id, bit, value; in ioat_dca_get_tag() local
209 bit = entry & ~DCA_TAG_MAP_VALID; in ioat_dca_get_tag()
210 value = (apic_id & (1 << bit)) ? 1 : 0; in ioat_dca_get_tag()
418 u8 bit; in ioat2_dca_init() local
462 bit = (tag_map >> (4 * i)) & 0x0f; in ioat2_dca_init()
463 if (bit < 8) in ioat2_dca_init()
464 ioatdca->tag_map[i] = bit | DCA_TAG_MAP_VALID; in ioat2_dca_init()
555 int i, apic_id, bit, value; in ioat3_dca_get_tag() local
564 bit = entry & in ioat3_dca_get_tag()
566 value = (apic_id & (1 << bit)) ? 1 : 0; in ioat3_dca_get_tag()
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/input/
Datmel,maxtouch.txt15 on GPIO bit changes. An array of up to 8 entries can be provided
16 indicating the Linux keycode mapped to each bit of the status byte,
20 Note: the numbering of the GPIOs and the bit they start at varies between
22 experiment to determine which bit corresponds to which input. Use
/linux-4.1.27/drivers/mfd/
Dasic3.c127 u32 base, int bit) in asic3_irq_flip_edge() argument
135 edge ^= bit; in asic3_irq_flip_edge()
182 int bit = (1 << i); in asic3_irq_demux() local
185 if (!(istat & bit)) in asic3_irq_demux()
192 if (asic->irq_bothedge[bank] & bit) in asic3_irq_demux()
194 bit); in asic3_irq_demux()
303 u16 trigger, level, edge, bit; in asic3_gpio_irq_type() local
308 bit = 1<<index; in asic3_gpio_irq_type()
317 asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] &= ~bit; in asic3_gpio_irq_type()
320 trigger |= bit; in asic3_gpio_irq_type()
[all …]
/linux-4.1.27/Documentation/vm/
Dsoft-dirty.txt3 The soft-dirty is a bit on a PTE which helps to track which pages a task
15 This is done by reading from the /proc/PID/pagemap. The bit 55 of the
16 64-bit qword is the soft-dirty one. If set, the respective PTE was
20 Internally, to do this tracking, the writable bit is cleared from PTEs
21 when the soft-dirty bit is cleared. So, after this, when the task tries to
23 the soft-dirty bit on the respective PTE.
/linux-4.1.27/arch/sh/boards/mach-dreamcast/
Dirq.c109 __u32 j, bit; in systemasic_irq_demux() local
132 for (bit = 1, j = 0; j < 32; bit <<= 1, j++) { in systemasic_irq_demux()
133 if (status & bit) { in systemasic_irq_demux()
/linux-4.1.27/Documentation/fb/
Dvt8623fb.txt18 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
19 * 8 bpp pseudocolor mode (with 18bit palette)
30 driver. Text mode supports 8bit wide fonts only (hardware limitation) and
31 16bit tall fonts (driver limitation).
36 8bit wide fonts only (driver limitation).
/linux-4.1.27/arch/m32r/lib/
Dchecksum.S64 ; clear c-bit || Alignment uses up bytes.
72 ; clear c-bit || Alignment uses up two bytes.
85 cmp r0, r0 ; clear c-bit
104 cmp r0, r0 ; This clears c-bit
116 cmp r0, r0 ; This clears c-bit
182 cmp r0, r0 ; clear c-bit
191 cmp r0, r0 ; clear c-bit
206 cmp r0, r0 ; clear c-bit
230 cmp r0, r0 ; This clears c-bit
243 cmp r0, r0 ; This clears c-bit

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