Searched refs:at1 (Results 1 - 8 of 8) sorted by relevance

/linux-4.1.27/arch/xtensa/variants/dc232b/include/variant/
H A Dtie-asm.h35 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
41 rsr \at1, ACCLO // MAC16 accumulator variable
43 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
49 rsr \at1, M0 // MAC16 registers variable
51 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
53 rsr \at1, M2
55 s32i \at1, \ptr, .Lxchal_ofs_ + 8 variable
61 rsr \at1, SCOMPARE1 // conditional store option variable
62 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
67 rur \at1, THREADPTR // threadptr option variable
68 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
76 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
78 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
82 l32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
84 wsr \at1, ACCLO // MAC16 accumulator
90 l32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
92 wsr \at1, M0 // MAC16 registers
94 l32i \at1, \ptr, .Lxchal_ofs_ + 8 variable
96 wsr \at1, M2
102 l32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
103 wsr \at1, SCOMPARE1 // conditional store option
108 l32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
109 wur \at1, THREADPTR // threadptr option
/linux-4.1.27/arch/xtensa/variants/dc233c/include/variant/
H A Dtie-asm.h63 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
77 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
82 rur.THREADPTR \at1 // threadptr option
83 s32i \at1, \ptr, .Lxchal_ofs_+0
92 rsr \at1, ACCLO // MAC16 option variable
93 s32i \at1, \ptr, .Lxchal_ofs_+0 variable
94 rsr \at1, ACCHI // MAC16 option
95 s32i \at1, \ptr, .Lxchal_ofs_+4 variable
104 rsr \at1, M0 // MAC16 option variable
105 s32i \at1, \ptr, .Lxchal_ofs_+0 variable
106 rsr \at1, M1 // MAC16 option
107 s32i \at1, \ptr, .Lxchal_ofs_+4 variable
108 rsr \at1, M2 // MAC16 option
109 s32i \at1, \ptr, .Lxchal_ofs_+8 variable
110 rsr \at1, M3 // MAC16 option
111 s32i \at1, \ptr, .Lxchal_ofs_+12 variable
112 rsr \at1, SCOMPARE1 // conditional store option
113 s32i \at1, \ptr, .Lxchal_ofs_+16 variable
127 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
141 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL alloc=0
146 l32i \at1, \ptr, .Lxchal_ofs_+0 variable
147 wur.THREADPTR \at1 // threadptr option
156 l32i \at1, \ptr, .Lxchal_ofs_+0 variable
157 wsr \at1, ACCLO // MAC16 option
158 l32i \at1, \ptr, .Lxchal_ofs_+4 variable
159 wsr \at1, ACCHI // MAC16 option
168 l32i \at1, \ptr, .Lxchal_ofs_+0 variable
169 wsr \at1, M0 // MAC16 option
170 l32i \at1, \ptr, .Lxchal_ofs_+4 variable
171 wsr \at1, M1 // MAC16 option
172 l32i \at1, \ptr, .Lxchal_ofs_+8 variable
173 wsr \at1, M2 // MAC16 option
174 l32i \at1, \ptr, .Lxchal_ofs_+12 variable
175 wsr \at1, M3 // MAC16 option
176 l32i \at1, \ptr, .Lxchal_ofs_+16 variable
177 wsr \at1, SCOMPARE1 // conditional store option
/linux-4.1.27/arch/xtensa/variants/fsf/include/variant/
H A Dtie-asm.h35 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
37 .macro xchal_ncp_store ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
41 rur \at1, THREADPTR // threadptr option variable
42 s32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
50 * Scratch regs (clobbered): at1..at4 (only first XCHAL_NCP_NUM_ATMPS needed)
52 .macro xchal_ncp_load ptr at1 at2 at3 at4 continue=0 ofs=-1 select=XTHAL_SAS_ALL
56 l32i \at1, \ptr, .Lxchal_ofs_ + 0 variable
57 wur \at1, THREADPTR // threadptr option
/linux-4.1.27/arch/xtensa/include/asm/
H A Dcoprocessor.h37 .macro save_xtregs_opt ptr clb at1 at2 at3 at4 offset
40 xchal_ncp_store \clb \at1 \at2 \at3 \at4 select=_SELECT
44 .macro load_xtregs_opt ptr clb at1 at2 at3 at4 offset
47 xchal_ncp_load \clb \at1 \at2 \at3 \at4 select=_SELECT
56 .macro save_xtregs_user ptr clb at1 at2 at3 at4 offset
59 xchal_ncp_store \clb \at1 \at2 \at3 \at4 select=_SELECT
63 .macro load_xtregs_user ptr clb at1 at2 at3 at4 offset
66 xchal_ncp_load \clb \at1 \at2 \at3 \at4 select=_SELECT
/linux-4.1.27/drivers/pinctrl/
H A Dpinctrl-tegra114.c1798 DRV_PINGROUP(at1, 0x870, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, Y),
H A Dpinctrl-tegra124.c2005 DRV_PINGROUP(at1, 0x870, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, Y),
H A Dpinctrl-tegra20.c2177 DRV_PG(at1, 0x870),
H A Dpinctrl-tegra30.c2430 DRV_PINGROUP(at1, 0x870, 2, 3, 4, 14, 5, 19, 5, 24, 2, 28, 2),

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