Searched refs:areg (Results 1 - 19 of 19) sorted by relevance

/linux-4.1.27/arch/mn10300/kernel/
H A Dfpu-low.S54 .macro FPU_SAVE_ALL areg,dreg
55 fmov fs0,(\areg+)
56 fmov fs1,(\areg+)
57 fmov fs2,(\areg+)
58 fmov fs3,(\areg+)
59 fmov fs4,(\areg+)
60 fmov fs5,(\areg+)
61 fmov fs6,(\areg+)
62 fmov fs7,(\areg+)
63 fmov fs8,(\areg+)
64 fmov fs9,(\areg+)
65 fmov fs10,(\areg+)
66 fmov fs11,(\areg+)
67 fmov fs12,(\areg+)
68 fmov fs13,(\areg+)
69 fmov fs14,(\areg+)
70 fmov fs15,(\areg+)
71 fmov fs16,(\areg+)
72 fmov fs17,(\areg+)
73 fmov fs18,(\areg+)
74 fmov fs19,(\areg+)
75 fmov fs20,(\areg+)
76 fmov fs21,(\areg+)
77 fmov fs22,(\areg+)
78 fmov fs23,(\areg+)
79 fmov fs24,(\areg+)
80 fmov fs25,(\areg+)
81 fmov fs26,(\areg+)
82 fmov fs27,(\areg+)
83 fmov fs28,(\areg+)
84 fmov fs29,(\areg+)
85 fmov fs30,(\areg+)
86 fmov fs31,(\areg+)
88 mov \dreg,(\areg)
91 .macro FPU_RESTORE_ALL areg,dreg
92 fmov (\areg+),fs0
93 fmov (\areg+),fs1
94 fmov (\areg+),fs2
95 fmov (\areg+),fs3
96 fmov (\areg+),fs4
97 fmov (\areg+),fs5
98 fmov (\areg+),fs6
99 fmov (\areg+),fs7
100 fmov (\areg+),fs8
101 fmov (\areg+),fs9
102 fmov (\areg+),fs10
103 fmov (\areg+),fs11
104 fmov (\areg+),fs12
105 fmov (\areg+),fs13
106 fmov (\areg+),fs14
107 fmov (\areg+),fs15
108 fmov (\areg+),fs16
109 fmov (\areg+),fs17
110 fmov (\areg+),fs18
111 fmov (\areg+),fs19
112 fmov (\areg+),fs20
113 fmov (\areg+),fs21
114 fmov (\areg+),fs22
115 fmov (\areg+),fs23
116 fmov (\areg+),fs24
117 fmov (\areg+),fs25
118 fmov (\areg+),fs26
119 fmov (\areg+),fs27
120 fmov (\areg+),fs28
121 fmov (\areg+),fs29
122 fmov (\areg+),fs30
123 fmov (\areg+),fs31
124 mov (\areg),\dreg
/linux-4.1.27/arch/xtensa/kernel/
H A Dasm-offsets.c46 DEFINE(PT_AREG, offsetof (struct pt_regs, areg[0])); main()
47 DEFINE(PT_AREG0, offsetof (struct pt_regs, areg[0])); main()
48 DEFINE(PT_AREG1, offsetof (struct pt_regs, areg[1])); main()
49 DEFINE(PT_AREG2, offsetof (struct pt_regs, areg[2])); main()
50 DEFINE(PT_AREG3, offsetof (struct pt_regs, areg[3])); main()
51 DEFINE(PT_AREG4, offsetof (struct pt_regs, areg[4])); main()
52 DEFINE(PT_AREG5, offsetof (struct pt_regs, areg[5])); main()
53 DEFINE(PT_AREG6, offsetof (struct pt_regs, areg[6])); main()
54 DEFINE(PT_AREG7, offsetof (struct pt_regs, areg[7])); main()
55 DEFINE(PT_AREG8, offsetof (struct pt_regs, areg[8])); main()
56 DEFINE(PT_AREG9, offsetof (struct pt_regs, areg[9])); main()
57 DEFINE(PT_AREG10, offsetof (struct pt_regs, areg[10])); main()
58 DEFINE(PT_AREG11, offsetof (struct pt_regs, areg[11])); main()
59 DEFINE(PT_AREG12, offsetof (struct pt_regs, areg[12])); main()
60 DEFINE(PT_AREG13, offsetof (struct pt_regs, areg[13])); main()
61 DEFINE(PT_AREG14, offsetof (struct pt_regs, areg[14])); main()
62 DEFINE(PT_AREG15, offsetof (struct pt_regs, areg[15])); main()
66 DEFINE(PT_AREG_END, offsetof (struct pt_regs, areg[XCHAL_NUM_AREGS])); main()
67 DEFINE(PT_USER_SIZE, offsetof(struct pt_regs, areg[XCHAL_NUM_AREGS])); main()
H A Dsignal.c77 if (__get_user(sp, (int*)(regs->areg[base * 4 + 1] - 12))) flush_window_regs_user()
94 &regs->areg[(base + 1) * 4], 16)) flush_window_regs_user()
100 &regs->areg[(base + 1) * 4], 32)) flush_window_regs_user()
107 sp = regs->areg[((base + inc) * 4 + 1) % XCHAL_NUM_AREGS]; flush_window_regs_user()
108 if (copy_to_user((void*)(sp - 16), &regs->areg[base * 4], 16)) flush_window_regs_user()
113 sp = regs->areg[base * 4 + 1]; flush_window_regs_user()
151 err |= __copy_to_user (sc->sc_a, regs->areg, 16 * 4); setup_sigcontext()
210 err |= __copy_from_user(regs->areg, sc->sc_a, 16 * 4); restore_sigcontext()
253 frame = (struct rt_sigframe __user *) regs->areg[1]; xtensa_rt_sigreturn()
266 ret = regs->areg[2]; xtensa_rt_sigreturn()
341 sp = regs->areg[1]; setup_frame()
364 err |= __save_altstack(&frame->uc.uc_stack, regs->areg[1]); setup_frame()
395 regs->areg[4] = (((unsigned long) ra) & 0x3fffffff) | 0x40000000; setup_frame()
396 regs->areg[6] = (unsigned long) sig; setup_frame()
397 regs->areg[7] = (unsigned long) &frame->info; setup_frame()
398 regs->areg[8] = (unsigned long) &frame->uc; setup_frame()
433 switch (regs->areg[2]) { do_signal()
436 regs->areg[2] = -EINTR; do_signal()
441 regs->areg[2] = -EINTR; do_signal()
446 regs->areg[2] = regs->syscall; do_signal()
452 if (regs->areg[2] != 0) do_signal()
470 switch (regs->areg[2]) { do_signal()
474 regs->areg[2] = regs->syscall; do_signal()
478 regs->areg[2] = __NR_restart_syscall; do_signal()
H A Dprocess.c209 usp_thread_fn : regs->areg[1]; copy_thread()
219 childregs->areg[1] = usp; copy_thread()
220 childregs->areg[2] = 0; copy_thread()
238 if (regs->areg[1] == usp && len != 0) { copy_thread()
239 int callinc = (regs->areg[0] >> 30) & 3; copy_thread()
241 put_user(regs->areg[caller_ars+1], copy_thread()
249 memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4], copy_thread()
250 &regs->areg[XCHAL_NUM_AREGS - len/4], len); copy_thread()
255 childregs->threadptr = childregs->areg[5]; copy_thread()
349 memcpy(elfregs->a, regs->areg, live * 4); xtensa_elf_core_copy_regs()
350 memcpy(elfregs->a + last, regs->areg + last, (wm >> 4) * 16); xtensa_elf_core_copy_regs()
H A Dptrace.c72 __put_user(regs->areg[i], ptrace_getregs()
115 if (wb != 0 && __copy_from_user(regs->areg + XCHAL_NUM_AREGS - wb * 4, ptrace_setregs()
119 if (__copy_from_user(regs->areg, gregset->a + wb * 4, ptrace_setregs()
188 tmp = regs->areg[regno - REG_AR_BASE]; ptrace_peekusr()
192 tmp = regs->areg[regno - REG_A_BASE]; ptrace_peekusr()
249 regs->areg[regno - REG_AR_BASE] = val; ptrace_pokeusr()
253 regs->areg[regno - REG_A_BASE] = val; ptrace_pokeusr()
H A Dtraps.c405 printk(KERN_CONT " %08lx", regs->areg[i]); show_regs()
505 show_stack(NULL, (unsigned long*)regs->areg[1]); die()
H A Dentry.S1757 /* regs->syscall = regs->areg[2] */
1791 1: /* regs->areg[2] = return_value */
/linux-4.1.27/arch/xtensa/include/asm/
H A Delf.h172 do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0; _r->areg[3]=0; \
173 _r->areg[4]=0; _r->areg[5]=0; _r->areg[6]=0; _r->areg[7]=0; \
174 _r->areg[8]=0; _r->areg[9]=0; _r->areg[10]=0; _r->areg[11]=0; \
175 _r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \
H A Dptrace.h46 /* Make sure the areg field is 16 bytes aligned. */
52 unsigned long areg[16]; member in struct:pt_regs
62 # define return_pointer(regs) (MAKE_PC_FROM_RA((regs)->areg[0], \
63 (regs)->areg[1]))
75 #define user_stack_pointer(regs) ((regs)->areg[1])
H A Dprocessor.h158 regs->areg[1] = new_sp; \
159 regs->areg[0] = 0; \
182 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1])
/linux-4.1.27/arch/powerpc/include/asm/
H A Dkvm_asm.h25 #define PPC_STD(sreg, offset, areg) std sreg, (offset)(areg)
26 #define PPC_LD(treg, offset, areg) ld treg, (offset)(areg)
28 #define PPC_STD(sreg, offset, areg) stw sreg, (offset+4)(areg)
29 #define PPC_LD(treg, offset, areg) lwz treg, (offset+4)(areg)
/linux-4.1.27/arch/xtensa/oprofile/
H A Dbacktrace.c33 unsigned long a0 = regs->areg[0]; xtensa_backtrace_user()
34 unsigned long a1 = regs->areg[1]; xtensa_backtrace_user()
66 a0 = regs->areg[index * 4]; xtensa_backtrace_user()
67 a1 = regs->areg[index * 4 + 1]; xtensa_backtrace_user()
84 /* a1 = regs->areg[1]; */ xtensa_backtrace_user()
119 unsigned long a0 = regs->areg[0]; xtensa_backtrace_kernel()
120 unsigned long a1 = regs->areg[1]; xtensa_backtrace_kernel()
146 a0 = regs->areg[0]; xtensa_backtrace_kernel()
147 a1 = regs->areg[1]; xtensa_backtrace_kernel()
/linux-4.1.27/sound/pci/
H A Drme96.c237 u32 areg; /* cached additional register value */ member in struct:rme96
505 rme96->areg |= RME96_AR_CDATA; snd_rme96_write_SPI()
507 rme96->areg &= ~RME96_AR_CDATA; snd_rme96_write_SPI()
509 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CLATCH); snd_rme96_write_SPI()
510 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_write_SPI()
512 rme96->areg |= RME96_AR_CCLK; snd_rme96_write_SPI()
513 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_write_SPI()
517 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CDATA); snd_rme96_write_SPI()
518 rme96->areg |= RME96_AR_CLATCH; snd_rme96_write_SPI()
519 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_write_SPI()
521 rme96->areg &= ~RME96_AR_CLATCH; snd_rme96_write_SPI()
522 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_write_SPI()
612 if (rme96->areg & RME96_AR_ANALOG) { snd_rme96_capture_getrate()
614 n = ((rme96->areg >> RME96_AR_BITPOS_F0) & 1) + snd_rme96_capture_getrate()
615 (((rme96->areg >> RME96_AR_BITPOS_F1) & 1) << 1); snd_rme96_capture_getrate()
629 return (rme96->areg & RME96_AR_BITPOS_F2) ? rate << 1 : rate; snd_rme96_capture_getrate()
757 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) & snd_rme96_capture_analog_setrate()
761 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) | snd_rme96_capture_analog_setrate()
765 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) | snd_rme96_capture_analog_setrate()
772 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) & snd_rme96_capture_analog_setrate()
779 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) | snd_rme96_capture_analog_setrate()
783 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) | snd_rme96_capture_analog_setrate()
789 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_capture_analog_setrate()
801 rme96->areg &= ~RME96_AR_WSEL; snd_rme96_setclockmode()
806 rme96->areg &= ~RME96_AR_WSEL; snd_rme96_setclockmode()
811 rme96->areg |= RME96_AR_WSEL; snd_rme96_setclockmode()
817 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_setclockmode()
824 if (rme96->areg & RME96_AR_WSEL) { snd_rme96_getclockmode()
866 rme96->areg |= RME96_AR_ANALOG; snd_rme96_setinputtype()
867 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_setinputtype()
885 rme96->areg &= ~RME96_AR_ANALOG; snd_rme96_setinputtype()
886 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_setinputtype()
895 if (rme96->areg & RME96_AR_ANALOG) { snd_rme96_getinputtype()
1568 rme96->areg &= ~RME96_AR_DAC_EN; snd_rme96_free()
1569 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_free()
1682 rme96->areg = RME96_AR_FREQPAD_1; /* set 44.1 kHz analog capture */ snd_rme96_create()
1685 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_create()
1688 writel(rme96->areg | RME96_AR_PD2, snd_rme96_create()
1690 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_create()
1694 rme96->areg |= RME96_AR_DAC_EN; snd_rme96_create()
1695 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); snd_rme96_create()
1790 if (rme96->areg & RME96_AR_WSEL) { snd_rme96_proc_read()
2389 rme96->areg &= ~RME96_AR_DAC_EN; rme96_suspend()
2390 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); rme96_suspend()
2412 writel(rme96->areg | RME96_AR_PD2, rme96_resume()
2414 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); rme96_resume()
2418 rme96->areg |= RME96_AR_DAC_EN; rme96_resume()
2419 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); rme96_resume()
/linux-4.1.27/arch/powerpc/kernel/
H A Dalign.c645 unsigned int areg, struct pt_regs *regs, emulate_vsx()
713 regs->gpr[areg] = regs->dar; emulate_vsx()
739 unsigned int reg, areg; fix_alignment() local
795 areg = dsisr & 0x1f; /* register to update */ fix_alignment()
875 return emulate_vsx(addr, reg, areg, regs, flags, nb, elsize); fix_alignment()
1039 regs->gpr[areg] = regs->dar; fix_alignment()
644 emulate_vsx(unsigned char __user *addr, unsigned int reg, unsigned int areg, struct pt_regs *regs, unsigned int flags, unsigned int length, unsigned int elsize) emulate_vsx() argument
/linux-4.1.27/arch/xtensa/mm/
H A Dfault.c257 address, regs->pc, regs->areg[0]); bad_page_fault()
/linux-4.1.27/drivers/net/ethernet/ti/
H A Dtlan.c184 static void tlan_set_mac(struct net_device *, int areg, char *mac);
2370 * areg The AREG to set the address in (0 - 3).
2383 static void tlan_set_mac(struct net_device *dev, int areg, char *mac) tlan_set_mac() argument
2387 areg *= 6; tlan_set_mac()
2392 TLAN_AREG_0 + areg + i, mac[i]); tlan_set_mac()
2396 TLAN_AREG_0 + areg + i, 0); tlan_set_mac()
/linux-4.1.27/arch/m68k/ifpsp060/src/
H A Disp.S294 set EXC_SAVVAL, LV+12 # offset of old areg value
295 set EXC_SAVREG, LV+11 # offset of old areg index
H A Dfpsp.S17454 # dec_areg() - decrement an areg for -(an) mode #
17455 # inc_areg() - increment an areg for (an)+ mode #
18892 bsr.l fetch_dreg # fetch base areg
H A Dpfpsp.S4941 bsr.l fetch_dreg # fetch base areg

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