Searched refs:WR_ACCESS (Results 1 - 3 of 3) sorted by relevance

/linux-4.1.27/drivers/video/fbdev/omap/
H A Dsossi.c54 #define WR_ACCESS 1 macro
356 sossi.clk_tw0[WR_ACCESS] = t->tim[2]; sossi_set_timings()
357 sossi.clk_tw1[WR_ACCESS] = t->tim[3]; sossi_set_timings()
461 set_timing(WR_ACCESS); sossi_write_command()
476 set_timing(WR_ACCESS); sossi_write_data()
497 set_timing(WR_ACCESS); sossi_transfer_area()
/linux-4.1.27/drivers/clk/bcm/
H A Dclk-kona.h474 * must be written to its WR_ACCESS register (located at the base
H A Dclk-kona.c155 * WR_ACCESS register for all CCUs is at offset 0.

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