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Searched refs:WR (Results 1 – 17 of 17) sorted by relevance

/linux-4.1.27/drivers/block/paride/
Dbpck.c105 #define WR(r,v) bpck_write_regr(pi,2,r,v) macro
114 case 0: WR(4,0x40); in bpck_write_block()
117 WR(4,0); in bpck_write_block()
120 case 1: WR(4,0x50); in bpck_write_block()
123 WR(4,0x10); in bpck_write_block()
126 case 2: WR(4,0x48); in bpck_write_block()
130 WR(4,8); in bpck_write_block()
133 case 3: WR(4,0x48); in bpck_write_block()
137 WR(4,8); in bpck_write_block()
140 case 4: WR(4,0x48); in bpck_write_block()
[all …]
Depia.c104 #define WR(r,v) epia_write_regr(pi,0,r,v) macro
124 WR(0x86,8); in epia_connect()
175 case 3: if (count > 512) WR(0x84,3); in epia_read_block()
178 w2(4); WR(0x84,0); in epia_read_block()
181 case 4: if (count > 512) WR(0x84,3); in epia_read_block()
184 w2(4); WR(0x84,0); in epia_read_block()
187 case 5: if (count > 512) WR(0x84,3); in epia_read_block()
190 w2(4); WR(0x84,0); in epia_read_block()
215 case 3: if (count < 512) WR(0x84,1); in epia_write_block()
218 if (count < 512) WR(0x84,0); in epia_write_block()
[all …]
Depat.c200 #define WR(r,v) epat_write_regr(pi,2,r,v) macro
224 WR(0x8,0x12);WR(0xc,0x14);WR(0x12,0x10); in epat_connect()
225 WR(0xe,0xf);WR(0xf,4); in epat_connect()
227 WR(0xe,0xd);WR(0xf,0); in epat_connect()
241 WR(8,0x10); WR(0xc,0x14); WR(0xa,0x38); WR(0x12,0x10); in epat_connect()
273 WR(0x13,1); WR(0x13,0); WR(0xa,0x11); in epat_test_proto()
297 WR(0xa,0x38); /* read the version code */ in epat_log_adapter()
/linux-4.1.27/include/linux/ceph/
Drados.h216 f(WRITE, __CEPH_OSD_OP(WR, DATA, 1), "write") \
217 f(WRITEFULL, __CEPH_OSD_OP(WR, DATA, 2), "writefull") \
218 f(TRUNCATE, __CEPH_OSD_OP(WR, DATA, 3), "truncate") \
219 f(ZERO, __CEPH_OSD_OP(WR, DATA, 4), "zero") \
220 f(DELETE, __CEPH_OSD_OP(WR, DATA, 5), "delete") \
223 f(APPEND, __CEPH_OSD_OP(WR, DATA, 6), "append") \
224 f(STARTSYNC, __CEPH_OSD_OP(WR, DATA, 7), "startsync") \
225 f(SETTRUNC, __CEPH_OSD_OP(WR, DATA, 8), "settrunc") \
226 f(TRIMTRUNC, __CEPH_OSD_OP(WR, DATA, 9), "trimtrunc") \
229 f(TMAPPUT, __CEPH_OSD_OP(WR, DATA, 11), "tmapput") \
[all …]
/linux-4.1.27/drivers/i2c/busses/
Di2c-au1550.c54 static inline void WR(struct i2c_au1550_data *a, int r, unsigned long v) in WR() function
115 WR(adap, PSC_SMBEVNT, PSC_SMBEVNT_ALLCLR); in do_address()
118 WR(adap, PSC_SMBPCR, PSC_SMBPCR_DC); in do_address()
134 WR(adap, PSC_SMBTXRX, addr); in do_address()
135 WR(adap, PSC_SMBPCR, PSC_SMBPCR_MS); in do_address()
179 WR(adap, PSC_SMBTXRX, 0); in i2c_read()
187 WR(adap, PSC_SMBTXRX, PSC_SMBTXRX_STP); in i2c_read()
207 WR(adap, PSC_SMBTXRX, data); in i2c_write()
216 WR(adap, PSC_SMBTXRX, data); in i2c_write()
229 WR(adap, PSC_CTRL, PSC_CTRL_ENABLE); in au1550_xfer()
[all …]
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dgddr3.c73 int CL, WR, CWL, DLL = 0, ODT = 0, hi; in nvkm_gddr3_calc() local
79 WR = ram->next->bios.timing_10_WR; in nvkm_gddr3_calc()
86 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_gddr3_calc()
99 WR = ramxlat(ramgddr3_wr_lo, WR); in nvkm_gddr3_calc()
100 if (CL < 0 || CWL < 1 || CWL > 7 || WR < 0) in nvkm_gddr3_calc()
111 ram->mr[1] |= (WR & 0x03) << 4; in nvkm_gddr3_calc()
112 ram->mr[1] |= (WR & 0x04) << 5; in nvkm_gddr3_calc()
Dsddr2.c62 int CL, WR, DLL = 0, ODT = 0; in nvkm_sddr2_calc() local
67 WR = ram->next->bios.timing_10_WR; in nvkm_sddr2_calc()
73 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_sddr2_calc()
80 WR = ramxlat(ramddr2_wr, WR); in nvkm_sddr2_calc()
81 if (CL < 0 || WR < 0) in nvkm_sddr2_calc()
85 ram->mr[0] |= (WR & 0x07) << 9; in nvkm_sddr2_calc()
Dsddr3.c71 int CWL, CL, WR, DLL = 0, ODT = 0; in nvkm_sddr3_calc() local
81 WR = ram->next->bios.timing_10_WR; in nvkm_sddr3_calc()
88 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_sddr3_calc()
101 WR = ramxlat(ramddr3_wr, WR); in nvkm_sddr3_calc()
102 if (CL < 0 || CWL < 0 || WR < 0) in nvkm_sddr3_calc()
106 ram->mr[0] |= (WR & 0x07) << 9; in nvkm_sddr3_calc()
Dgddr5.c38 int WL, CL, WR, at[2], dt, ds; in nvkm_gddr5_calc() local
59 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_gddr5_calc()
69 if (WL < 1 || WL > 7 || CL < 5 || CL > 36 || WR < 4 || WR > 35) in nvkm_gddr5_calc()
72 WR -= 4; in nvkm_gddr5_calc()
75 ram->mr[0] |= (WR & 0x0f) << 8; in nvkm_gddr5_calc()
117 ram->mr[8] |= (WR & 0x10) >> 3; in nvkm_gddr5_calc()
Dramgt215.c376 timing[1] = (T(WR) + 1 + T(CWL)) << 24 | in gt215_ram_timing_calc()
/linux-4.1.27/sound/soc/au1x/
Dac97c.c76 static inline void WR(struct au1xpsc_audio_data *ctx, int reg, unsigned long v) in WR() function
102 WR(ctx, AC97_CMDRESP, CMD_IDX(r) | CMD_READ); in au1xac97c_ac97_read()
141 WR(ctx, AC97_CMDRESP, CMD_WRITE | CMD_IDX(r) | CMD_SET_DATA(v)); in au1xac97c_ac97_write()
158 WR(ctx, AC97_CONFIG, ctx->cfg | CFG_SG | CFG_SN); in au1xac97c_ac97_warm_reset()
160 WR(ctx, AC97_CONFIG, ctx->cfg | CFG_SG); in au1xac97c_ac97_warm_reset()
161 WR(ctx, AC97_CONFIG, ctx->cfg); in au1xac97c_ac97_warm_reset()
169 WR(ctx, AC97_CONFIG, ctx->cfg | CFG_RS); in au1xac97c_ac97_cold_reset()
171 WR(ctx, AC97_CONFIG, ctx->cfg); in au1xac97c_ac97_cold_reset()
266 WR(ctx, AC97_ENABLE, EN_D | EN_CE); in au1xac97c_drvprobe()
267 WR(ctx, AC97_ENABLE, EN_CE); in au1xac97c_drvprobe()
[all …]
Di2sc.c74 static inline void WR(struct au1xpsc_audio_data *ctx, int reg, unsigned long v) in WR() function
145 WR(ctx, I2S_ENABLE, EN_D | EN_CE); in au1xi2s_trigger()
146 WR(ctx, I2S_ENABLE, EN_CE); in au1xi2s_trigger()
148 WR(ctx, I2S_CFG, ctx->cfg); in au1xi2s_trigger()
153 WR(ctx, I2S_CFG, ctx->cfg); in au1xi2s_trigger()
154 WR(ctx, I2S_ENABLE, EN_D); /* power off */ in au1xi2s_trigger()
277 WR(ctx, I2S_ENABLE, EN_D); /* clock off, disable */ in au1xi2s_drvremove()
287 WR(ctx, I2S_ENABLE, EN_D); /* clock off, disable */ in au1xi2s_drvsuspend()
/linux-4.1.27/Documentation/spi/
Dspidev84 return (RD) or assign (WR) the SPI transfer mode. Use the constants
92 which will return (RD) or assign (WR) the full SPI transfer mode,
96 which will return (RD) or assign (WR) the bit justification used to
103 a byte which will return (RD) or assign (WR) the number of bits in
107 u32 which will return (RD) or assign (WR) the maximum SPI transfer
/linux-4.1.27/Documentation/fmc/
Dparameters.txt46 spec 0000:02:00.0: SDB: 0000ce42:ff07fc47 WR-Periph-Syscon (00000000-000000ff)
/linux-4.1.27/arch/blackfin/include/asm/
Dbfin_can.h121 #define WR 0x0002 /* RX Warning Flag */ macro
/linux-4.1.27/Documentation/filesystems/
Daffs.txt195 rm /wb/WR*
/linux-4.1.27/arch/x86/lib/
Dx86-opcode-map.txt116 4c: DEC eSP (i64) | REX.WR (o64)