Searched refs:VIDEO_DIP_ENABLE_VSC_HSW (Results 1 – 3 of 3) sorted by relevance
100 I915_WRITE(ctl_reg, VIDEO_DIP_ENABLE_VSC_HSW); in intel_psr_write_vsc()
687 val &= ~(VIDEO_DIP_ENABLE_VSC_HSW | VIDEO_DIP_ENABLE_GCP_HSW | in hsw_set_infoframes()
3084 #define VIDEO_DIP_ENABLE_VSC_HSW (1 << 20) macro