Searched refs:VF610_CLK_PLL5_ENET (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dvf610-clock.h40 #define VF610_CLK_PLL5_ENET 27 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dvf610-clock.h40 #define VF610_CLK_PLL5_ENET 27 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dvf610-clock.h40 #define VF610_CLK_PLL5_ENET 27 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dvf610-clock.h40 #define VF610_CLK_PLL5_ENET 27 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dvf610-clock.h40 #define VF610_CLK_PLL5_ENET 27 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dvf610-clock.h40 #define VF610_CLK_PLL5_ENET 27 macro
/linux-4.1.27/arch/arm/mach-imx/
H A Dclk-vf610.c202 clk[VF610_CLK_PLL5_ENET] = imx_clk_gate("pll5_enet", "pll5_bypass", PLL5_CTRL, 13); vf610_clocks_init()

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