Searched refs:UTSR1_TBY (Results 1 - 4 of 4) sorted by relevance

/linux-4.1.27/arch/arm/include/debug/
H A Dsa1100.S18 #define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ define
66 tst \rd, #UTSR1_TBY
/linux-4.1.27/drivers/tty/serial/
H A Dsa1100.c333 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT; sa1100_tx_empty()
498 while (UART_GET_UTSR1(sport) & UTSR1_TBY) sa1100_set_termios()
740 } while (status & UTSR1_TBY); sa1100_console_write()
/linux-4.1.27/drivers/net/irda/
H A Dsa1100_ir.c240 while (Ser2UTSR1 & UTSR1_TBY); sa1100_irda_sirtxdma_irq()
/linux-4.1.27/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h393 #define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ macro

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