Searched refs:UTMIPLL_HW_PWRDN_CFG0 (Results 1 – 2 of 2) sorted by relevance
134 #define UTMIPLL_HW_PWRDN_CFG0 0x52c macro1018 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()1022 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()1033 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()1036 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()1041 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()1043 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra114_utmi_param_configure()
113 #define UTMIPLL_HW_PWRDN_CFG0 0x52c macro1078 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()1082 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()1093 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()1096 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()1101 reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()1103 writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0); in tegra124_utmi_param_configure()