Searched refs:USB_EP_NI5_TXCSR (Results 1 – 7 of 7) sorted by relevance
214 #define USB_EP_NI5_TXCSR 0xffc03f44 /* Control Status register for endpoint5 */ macro
328 #define USB_EP_NI5_TXCSR 0xffc03f44 /* Control Status register for endpoint5 */ macro
368 #define bfin_read_USB_EP_NI5_TXCSR() bfin_read16(USB_EP_NI5_TXCSR)369 #define bfin_write_USB_EP_NI5_TXCSR(val) bfin_write16(USB_EP_NI5_TXCSR, val)
535 #define bfin_read_USB_EP_NI5_TXCSR() bfin_read16(USB_EP_NI5_TXCSR)536 #define bfin_write_USB_EP_NI5_TXCSR(val) bfin_write16(USB_EP_NI5_TXCSR, val)
151 #define USB_EP_NI5_TXCSR 0xffc03b44 /* Control Status register for endpoint5 */ macro
249 #define bfin_read_USB_EP_NI5_TXCSR() bfin_read16(USB_EP_NI5_TXCSR)250 #define bfin_write_USB_EP_NI5_TXCSR(val) bfin_write16(USB_EP_NI5_TXCSR, val)
1676 D16(USB_EP_NI5_TXCSR); in bfin_debug_mmrs_init()