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Searched refs:TXS (Results 1 – 9 of 9) sorted by relevance

/linux-4.1.27/drivers/net/wan/
Dhd64570.h68 #define TXS 0x17 /* TX Clock Source */ macro
Dhd64572.h71 #define TXS 0x13d /* TX clock source */ macro
Dhd64572.c412 sca_out(port->txs, msci + TXS, card); in sca_set_port()
472 sca_out(port->txs, msci + TXS, card); in sca_open()
Dhd64570.c448 sca_out(port->txs, msci + TXS, card); in sca_set_port()
516 sca_out(port->txs, msci + TXS, card); in sca_open()
Dc101.c182 sca_out(txs, MSCI1_OFFSET + TXS, port); in c101_set_iface()
Dpci200syn.c154 sca_out(txs, msci + TXS, card); in pci200_set_iface()
Dpc300too.c155 sca_out(txs, msci + TXS, card); in pc300_set_iface()
Dn2.c205 sca_out(txs, msci + TXS, card); in n2_set_iface()
/linux-4.1.27/drivers/tty/
Dsynclinkmp.c332 #define TXS 0x37 macro
4047 write_reg(info, TXS, 0x40); in enable_loopback()
4061 write_reg(info, TXS, 0x00); in enable_loopback()
4107 write_reg(info, TXS, in set_rate()
4108 (unsigned char)((read_reg(info, TXS) & 0xf0) | BRValue)); in set_rate()
4114 write_reg(info, TXS,0); in set_rate()
4455 write_reg(info, TXS, RegValue); in async_mode()
4626 write_reg(info, TXS, RegValue); in hdlc_mode()