Searched refs:TTM_PL_MASK_CACHING (Results 1 – 11 of 11) sorted by relevance
79 #define TTM_PL_MASK_CACHING (TTM_PL_FLAG_CACHED | \ macro83 #define TTM_PL_MASK_MEMTYPE (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING)
119 man->available_caching = TTM_PL_MASK_CACHING; in cirrus_bo_init_mem_type()307 bo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in cirrus_ttm_placement()309 bo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in cirrus_ttm_placement()
119 man->available_caching = TTM_PL_MASK_CACHING; in mgag200_bo_init_mem_type()303 bo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in mgag200_ttm_placement()305 bo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in mgag200_ttm_placement()
167 man->available_caching = TTM_PL_MASK_CACHING; in qxl_init_mem_type()177 man->available_caching = TTM_PL_MASK_CACHING; in qxl_init_mem_type()194 .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM in qxl_evict_flags()
66 qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM | pflag; in qxl_ttm_placement_from_domain()68 qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in qxl_ttm_placement_from_domain()
96 man->available_caching = TTM_PL_MASK_CACHING; in bochs_bo_init_mem_type()270 bo->placements[c++].flags = TTM_PL_MASK_CACHING in bochs_ttm_placement()274 bo->placements[c++].flags = TTM_PL_MASK_CACHING in bochs_ttm_placement()
138 man->available_caching = TTM_PL_MASK_CACHING; in radeon_init_mem_type()144 man->available_caching = TTM_PL_MASK_CACHING; in radeon_init_mem_type()184 .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM in radeon_evict_flags()330 placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; in radeon_move_vram_ram()377 placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; in radeon_move_ram_vram()
160 rbo->placements[c++].flags = TTM_PL_MASK_CACHING | in radeon_ttm_placement_from_domain()
289 ((mem->placement & bo->mem.placement & TTM_PL_MASK_CACHING) == 0)) { in ttm_bo_handle_move_mem()814 uint32_t caching = proposed_placement & TTM_PL_MASK_CACHING; in ttm_bo_select_caching()815 uint32_t result = proposed_placement & ~TTM_PL_MASK_CACHING; in ttm_bo_select_caching()1017 if ((*new_flags & mem->placement & TTM_PL_MASK_CACHING) && in ttm_bo_mem_compat()1030 if ((*new_flags & mem->placement & TTM_PL_MASK_CACHING) && in ttm_bo_mem_compat()
298 TTM_PL_MASK_CACHING) | in nouveau_bo_placement_set()611 man->available_caching = TTM_PL_MASK_CACHING; in nouveau_bo_init_mem_type()652 man->available_caching = TTM_PL_MASK_CACHING; in nouveau_bo_init_mem_type()1168 .flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING in nouveau_bo_move_flipd()1204 .flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING in nouveau_bo_move_flips()
119 man->available_caching = TTM_PL_MASK_CACHING; in ast_bo_init_mem_type()