Searched refs:TIMER_CTRL (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/drivers/clocksource/
H A Dtimer-integrator-ap.c50 writel(ctrl, base + TIMER_CTRL); integrator_clocksource_init()
79 u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE; clkevt_set_mode()
82 writel(ctrl, clkevt_base + TIMER_CTRL); clkevt_set_mode()
89 writel(ctrl, clkevt_base + TIMER_CTRL); clkevt_set_mode()
94 writel(ctrl, clkevt_base + TIMER_CTRL); clkevt_set_mode()
108 unsigned long ctrl = readl(clkevt_base + TIMER_CTRL); clkevt_set_next_event()
110 writel(ctrl & ~TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL); clkevt_set_next_event()
112 writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL); clkevt_set_next_event()
148 writel(ctrl, clkevt_base + TIMER_CTRL); integrator_clockevent_init()
179 writel(0, base + TIMER_CTRL); integrator_ap_timer_init_of()
H A Dtime-orion.c24 #define TIMER_CTRL 0x00 macro
57 atomic_io_modify(timer_base + TIMER_CTRL, orion_clkevt_next_event()
70 atomic_io_modify(timer_base + TIMER_CTRL, orion_clkevt_mode()
75 atomic_io_modify(timer_base + TIMER_CTRL, orion_clkevt_mode()
124 atomic_io_modify(timer_base + TIMER_CTRL, orion_timer_init()
/linux-4.1.27/arch/arm/common/
H A Dtimer-sp.c96 writel(0, base + TIMER_CTRL); __sp804_clocksource_and_sched_clock_init()
100 base + TIMER_CTRL); __sp804_clocksource_and_sched_clock_init()
135 writel(ctrl, clkevt_base + TIMER_CTRL); sp804_set_mode()
154 writel(ctrl, clkevt_base + TIMER_CTRL); sp804_set_mode()
160 unsigned long ctrl = readl(clkevt_base + TIMER_CTRL); sp804_set_next_event()
163 writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL); sp804_set_next_event()
206 writel(0, base + TIMER_CTRL); __sp804_clockevents_init()
226 writel(0, base + TIMER_CTRL); sp804_of_init()
227 writel(0, base + TIMER_2_BASE + TIMER_CTRL); sp804_of_init()
284 writel(0, base + TIMER_CTRL); integrator_cp_of_init()
/linux-4.1.27/drivers/watchdog/
H A Dorion_wdt.c37 #define TIMER_CTRL 0x0000 macro
109 atomic_io_modify(dev->reg + TIMER_CTRL, armada370_wdt_clock_init()
130 atomic_io_modify(dev->reg + TIMER_CTRL, armada375_wdt_clock_init()
149 atomic_io_modify(dev->reg + TIMER_CTRL, armada375_wdt_clock_init()
172 atomic_io_modify(dev->reg + TIMER_CTRL, armadaxp_wdt_clock_init()
202 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, armada375_start()
227 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, armada370_start()
246 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, orion_start()
272 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); orion_stop()
290 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); armada375_stop()
306 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); armada370_stop()
323 running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit; orion_enabled()
334 running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit; armada375_enabled()
/linux-4.1.27/arch/arm/include/asm/hardware/
H A Darm_timer.h20 #define TIMER_CTRL 0x08 /* ACVR rw */ macro
/linux-4.1.27/arch/arm/mach-realview/
H A Dcore.c384 writel(0, timer0_va_base + TIMER_CTRL); realview_timer_init()
385 writel(0, timer1_va_base + TIMER_CTRL); realview_timer_init()
386 writel(0, timer2_va_base + TIMER_CTRL); realview_timer_init()
387 writel(0, timer3_va_base + TIMER_CTRL); realview_timer_init()
/linux-4.1.27/arch/arm/mach-versatile/
H A Dcore.c801 writel(0, TIMER0_VA_BASE + TIMER_CTRL); versatile_timer_init()
802 writel(0, TIMER1_VA_BASE + TIMER_CTRL); versatile_timer_init()
803 writel(0, TIMER2_VA_BASE + TIMER_CTRL); versatile_timer_init()
804 writel(0, TIMER3_VA_BASE + TIMER_CTRL); versatile_timer_init()

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